From f90db59d00378a4999389b75cb66a38db2eb9aa1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 11:34:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3326 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/Makefile | 204 +++++++++++++++ testhal/STM32L1xx/SPI/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/SPI/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/SPI/main.c | 142 +++++++++++ testhal/STM32L1xx/SPI/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/SPI/readme.txt | 26 ++ 6 files changed, 1420 insertions(+) create mode 100644 testhal/STM32L1xx/SPI/Makefile create mode 100644 testhal/STM32L1xx/SPI/chconf.h create mode 100644 testhal/STM32L1xx/SPI/halconf.h create mode 100644 testhal/STM32L1xx/SPI/main.c create mode 100644 testhal/STM32L1xx/SPI/mcuconf.h create mode 100644 testhal/STM32L1xx/SPI/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile new file mode 100644 index 000000000..73c1d3811 --- /dev/null +++ b/testhal/STM32L1xx/SPI/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h new file mode 100644 index 000000000..a825e65c5 --- /dev/null +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c new file mode 100644 index 000000000..b5466bcae --- /dev/null +++ b/testhal/STM32L1xx/SPI/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (16MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0 +}; + +/* + * Low speed SPI configuration (256KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOA, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* NSS. */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + PAL_STM32_OSPEED_HIGHEST); /* SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | + PAL_STM32_OSPEED_HIGHEST); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h new file mode 100644 index 000000000..a87325ff7 --- /dev/null +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt new file mode 100644 index 000000000..eead6ffd9 --- /dev/null +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx SPI driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 68a4911f7341c86752e50d1d2498698fa2c466db Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 15:12:48 +0000 Subject: SPI driver working on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3327 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index b5466bcae..14e97bd20 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -36,7 +36,7 @@ static const SPIConfig hs_spicfg = { */ static const SPIConfig ls_spicfg = { NULL, - GPIOA, + GPIOB, 12, SPI_CR1_BR_2 | SPI_CR1_BR_1 }; @@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) { (void)p; chRegSetThreadName("SPI thread 1"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) { (void)p; chRegSetThreadName("SPI thread 2"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -112,8 +112,7 @@ int main(void) { PAL_STM32_OSPEED_HIGHEST); /* NSS. */ palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | - PAL_STM32_OSPEED_HIGHEST); /* MISO. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */ palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ palSetPad(GPIOB, 12); -- cgit v1.2.3 From eefe7fbc1bd9cf3f50e580ff44f977a08dafa107 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 15:50:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3328 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/Makefile | 2 - testhal/STM32L1xx/UART/Makefile | 202 ++++++++++++++ testhal/STM32L1xx/UART/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/UART/halconf.h | 321 +++++++++++++++++++++++ testhal/STM32L1xx/UART/main.c | 147 +++++++++++ testhal/STM32L1xx/UART/mcuconf.h | 185 +++++++++++++ testhal/STM32L1xx/UART/readme.txt | 26 ++ 7 files changed, 1416 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32L1xx/UART/Makefile create mode 100644 testhal/STM32L1xx/UART/chconf.h create mode 100644 testhal/STM32L1xx/UART/halconf.h create mode 100644 testhal/STM32L1xx/UART/main.c create mode 100644 testhal/STM32L1xx/UART/mcuconf.h create mode 100644 testhal/STM32L1xx/UART/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index 73c1d3811..5efd8bf02 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -72,8 +72,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile new file mode 100644 index 000000000..5efd8bf02 --- /dev/null +++ b/testhal/STM32L1xx/UART/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h new file mode 100644 index 000000000..2dd31e012 --- /dev/null +++ b/testhal/STM32L1xx/UART/halconf.h @@ -0,0 +1,321 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c new file mode 100644 index 000000000..87efcab74 --- /dev/null +++ b/testhal/STM32L1xx/UART/main.c @@ -0,0 +1,147 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); +} + +static void ledoff(void *p) { + + (void)p; + palSetPad(GPIOB, GPIOB_LED4); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palClearPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 2 using the driver default configuration. + * PA9 and PA10 are routed to USART1. + */ + uartStart(&UARTD1, &uart_cfg_1); + palSetPadMode(GPIOA, 9, PAL_MODE_ALT_OUTPUT_PUSHPULL(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALT_INPUT(7)); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD1, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h new file mode 100644 index 000000000..a210c468b --- /dev/null +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt new file mode 100644 index 000000000..e52a79d4a --- /dev/null +++ b/testhal/STM32L1xx/UART/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F1xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx UART driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From baabff16e61179d497fe986d63e325e83272d4ed Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 16:56:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3329 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/UART/chconf.h | 12 ++++++------ testhal/STM32L1xx/UART/main.c | 9 ++++----- 2 files changed, 10 insertions(+), 11 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index a5d129956..9dd831c96 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#define CH_DBG_SYSTEM_STATE_CHECK FALSE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE +#define CH_DBG_ENABLE_CHECKS FALSE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE +#define CH_DBG_ENABLE_ASSERTS FALSE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE +#define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE +#define CH_DBG_FILL_THREADS FALSE #endif /** diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 87efcab74..1039b781d 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -32,7 +32,7 @@ static void restart(void *p) { static void ledoff(void *p) { (void)p; - palSetPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOB, GPIOB_LED4); } /* @@ -42,7 +42,7 @@ static void ledoff(void *p) { static void txend1(UARTDriver *uartp) { (void)uartp; - palClearPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOB, GPIOB_LED4); } /* @@ -51,7 +51,7 @@ static void txend1(UARTDriver *uartp) { static void txend2(UARTDriver *uartp) { (void)uartp; - palSetPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); if (chVTIsArmedI(&vt1)) chVTResetI(&vt1); @@ -78,7 +78,7 @@ static void rxchar(UARTDriver *uartp, uint16_t c) { (void)uartp; (void)c; /* Flashing the LED each time a character is received.*/ - palClearPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); if (chVTIsArmedI(&vt2)) chVTResetI(&vt2); @@ -143,5 +143,4 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(500); } - return 0; } -- cgit v1.2.3 From 278fc39f993660a8d7ebf4df4a89f6beb10c7f7b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 17:53:57 +0000 Subject: UART driver tested with STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3330 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 6 +++--- testhal/STM32L1xx/UART/main.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 14e97bd20..7a96f0e22 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -110,10 +110,10 @@ int main(void) { */ palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); /* NSS. */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */ - palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ palSetPad(GPIOB, 12); diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 1039b781d..30f4c3326 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -129,8 +129,8 @@ int main(void) { * PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); - palSetPadMode(GPIOA, 9, PAL_MODE_ALT_OUTPUT_PUSHPULL(7)); - palSetPadMode(GPIOA, 10, PAL_MODE_ALT_INPUT(7)); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); /* * Starts the transmission, it will be handled entirely in background. -- cgit v1.2.3 From c86f3377feac7c6342974cf6e147067bf33d4782 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 09:15:07 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3333 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/Makefile | 202 +++++++++++++++ testhal/STM32L1xx/GPT/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/GPT/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/GPT/main.c | 94 +++++++ testhal/STM32L1xx/GPT/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/GPT/readme.txt | 26 ++ 6 files changed, 1370 insertions(+) create mode 100644 testhal/STM32L1xx/GPT/Makefile create mode 100644 testhal/STM32L1xx/GPT/chconf.h create mode 100644 testhal/STM32L1xx/GPT/halconf.h create mode 100644 testhal/STM32L1xx/GPT/main.c create mode 100644 testhal/STM32L1xx/GPT/mcuconf.h create mode 100644 testhal/STM32L1xx/GPT/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile new file mode 100644 index 000000000..5efd8bf02 --- /dev/null +++ b/testhal/STM32L1xx/GPT/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h new file mode 100644 index 000000000..ff9202a66 --- /dev/null +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c new file mode 100644 index 000000000..b7e84e557 --- /dev/null +++ b/testhal/STM32L1xx/GPT/main.c @@ -0,0 +1,94 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * GPT1 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD3, 200); /* 0.02 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + + (void)gptp; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 10000, /* 10KHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the GPT drivers 2 and 3. + */ + gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small delay.*/ + gptStart(&GPTD3, &gpt3cfg); + gptPolledDelay(&GPTD3, 10); /* Small delay.*/ + + /* + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. + */ + while (TRUE) { + gptStartContinuous(&GPTD2, 5000); + chThdSleepMilliseconds(5000); + gptStartContinuous(&GPTD2, 2500); + chThdSleepMilliseconds(5000); + } +} diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h new file mode 100644 index 000000000..b07cb9f6d --- /dev/null +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt new file mode 100644 index 000000000..e1302e645 --- /dev/null +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - GPT driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx GPT driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From e2d701317cc34a5fb669fe816c13364bd136005e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 09:44:10 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3334 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index b7e84e557..90e06879a 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -22,7 +22,7 @@ #include "hal.h" /* - * GPT1 callback. + * GPT2 callback. */ static void gpt2cb(GPTDriver *gptp) { @@ -34,7 +34,7 @@ static void gpt2cb(GPTDriver *gptp) { } /* - * GPT2 callback. + * GPT3 callback. */ static void gpt3cb(GPTDriver *gptp) { -- cgit v1.2.3 From 634578f7c1dd2e63a4664d6bf0438f05236a4311 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 09:57:10 +0000 Subject: Fixed bug 3411180. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3335 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/Makefile | 2 +- testhal/STM32L1xx/SPI/Makefile | 2 +- testhal/STM32L1xx/UART/Makefile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 5efd8bf02..9209b441d 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -199,4 +199,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index 5efd8bf02..9209b441d 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -199,4 +199,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile index 5efd8bf02..9209b441d 100644 --- a/testhal/STM32L1xx/UART/Makefile +++ b/testhal/STM32L1xx/UART/Makefile @@ -199,4 +199,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk -- cgit v1.2.3 From acd4d7c7725e15fdca0422cab7a86b792eb6c245 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 10:07:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3338 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index b07cb9f6d..d214c9d12 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -123,7 +123,7 @@ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE -- cgit v1.2.3 From 07f868d3792cadd6377fdb5039c7cbf27f68bd92 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 18:23:50 +0000 Subject: GPT driver tested on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3341 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/Makefile | 2 +- testhal/STM32L1xx/GPT/main.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 9209b441d..10a6ed0e8 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 90e06879a..49247bac6 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -86,8 +86,12 @@ int main(void) { * five seconds. */ while (TRUE) { + palSetPad(GPIOB, GPIOB_LED3); + gptStopTimer(&GPTD2); gptStartContinuous(&GPTD2, 5000); chThdSleepMilliseconds(5000); + palClearPad(GPIOB, GPIOB_LED3); + gptStopTimer(&GPTD2); gptStartContinuous(&GPTD2, 2500); chThdSleepMilliseconds(5000); } -- cgit v1.2.3 From 2ce24aa56732a6b80efa461f8a6db4f37fa4215a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 08:56:23 +0000 Subject: PWM and ICU drivers tested on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3345 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/readme.txt | 4 + testhal/STM32L1xx/PWM-ICU/Makefile | 202 +++++++++++++ testhal/STM32L1xx/PWM-ICU/chconf.h | 535 +++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 328 +++++++++++++++++++++ testhal/STM32L1xx/PWM-ICU/main.c | 140 +++++++++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 185 ++++++++++++ testhal/STM32L1xx/PWM-ICU/readme.txt | 31 ++ testhal/STM32L1xx/SPI/readme.txt | 5 + testhal/STM32L1xx/UART/readme.txt | 6 + 9 files changed, 1436 insertions(+) create mode 100644 testhal/STM32L1xx/PWM-ICU/Makefile create mode 100644 testhal/STM32L1xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32L1xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32L1xx/PWM-ICU/main.c create mode 100644 testhal/STM32L1xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32L1xx/PWM-ICU/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt index e1302e645..7b561e8f8 100644 --- a/testhal/STM32L1xx/GPT/readme.txt +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -10,6 +10,10 @@ The demo will on an STMicroelectronics STM32L-Discovery board. The application demonstrates the use of the STM32L1xx GPT driver. +** Board Setup ** + +None required. + ** Build Procedure ** The demo has been tested by using the free Codesourcery GCC-based toolchain diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile new file mode 100644 index 000000000..10a6ed0e8 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..e5eeb8b7a --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c new file mode 100644 index 000000000..bc33ecb0e --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -0,0 +1,140 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOB, GPIOB_LED4); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOB, GPIOB_LED4); +} + +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOB, GPIOB_LED3); + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOB, GPIOB_LED3); + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOB, GPIOB_LED3); + palClearPad(GPIOB, GPIOB_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..ac551ee4f --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PWM-ICU/readme.txt b/testhal/STM32L1xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..f55cf8471 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx PWM-ICU drivers. + +** Board Setup ** + +- Remove the LCD module. +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt index eead6ffd9..1d0499baa 100644 --- a/testhal/STM32L1xx/SPI/readme.txt +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -10,6 +10,11 @@ The demo runs on an STMicroelectronics STM32L-Discovery board. The application demonstrates the use of the STM32L1xx SPI driver. +** Board Setup ** + +- Remove the LCD module. +- Connect PB14 and PB15 together for SPI loop-back. + ** Build Procedure ** The demo has been tested by using the free Codesourcery GCC-based toolchain diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index e52a79d4a..ac65242ac 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -10,6 +10,12 @@ The demo runs on an STMicroelectronics STM32L-Discovery board. The application demonstrates the use of the STM32L1xx UART driver. +** Board Setup ** + +- Remove the LCD module. +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + ** Build Procedure ** The demo has been tested by using the free Codesourcery GCC-based toolchain -- cgit v1.2.3 From 3b722ddd33c72c9101bd622a0ae6f8699d1fd46a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 09:33:03 +0000 Subject: IRQ_STORM test added to STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3346 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/Makefile | 2 +- testhal/STM32L1xx/IRQ_STORM/Makefile | 202 ++ testhal/STM32L1xx/IRQ_STORM/chconf.h | 535 +++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 328 ++ testhal/STM32L1xx/IRQ_STORM/main.c | 326 ++ testhal/STM32L1xx/IRQ_STORM/main.lst | 6048 ++++++++++++++++++++++++++++++++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 185 + testhal/STM32L1xx/IRQ_STORM/readme.txt | 31 + testhal/STM32L1xx/PWM-ICU/Makefile | 2 +- 9 files changed, 7657 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32L1xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32L1xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32L1xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32L1xx/IRQ_STORM/main.c create mode 100644 testhal/STM32L1xx/IRQ_STORM/main.lst create mode 100644 testhal/STM32L1xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32L1xx/IRQ_STORM/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 10a6ed0e8..9209b441d 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..f5e7cc1ed --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c new file mode 100644 index 000000000..d3c7a6521 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -0,0 +1,326 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOB, GPIOB_LED4); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } + chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 1 and GPT drivers 2 and 3. + */ + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32L1xx/IRQ_STORM/main.lst b/testhal/STM32L1xx/IRQ_STORM/main.lst new file mode 100644 index 000000000..7b4c43cc3 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/main.lst @@ -0,0 +1,6048 @@ +ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 1 + + + 1 .syntax unified + 2 .cpu cortex-m3 + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 18, 4 + 12 .thumb + 13 .file "main.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .section .text.println,"ax",%progbits + 18 .align 2 + 19 .p2align 4,,15 + 20 .thumb + 21 .thumb_func + 22 .type println, %function + 23 println: + 24 .LFB66: + 25 .file 1 "main.c" + 26 .loc 1 177 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 38B5 push {r3, r4, r5, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 14, -4 + 35 .cfi_offset 5, -8 + 36 .cfi_offset 4, -12 + 37 .cfi_offset 3, -16 + 38 .loc 1 179 0 + 39 0002 0178 ldrb r1, [r0, #0] @ zero_extendqisi2 + 40 0004 0A4D ldr r5, .L8 + 41 0006 0446 mov r4, r0 + 42 0008 49B1 cbz r1, .L2 + 43 .LVL1: + 44 .L3: + 45 .loc 1 180 0 + 46 000a 2B68 ldr r3, [r5, #0] + 47 000c 0848 ldr r0, .L8 + 48 000e 1B69 ldr r3, [r3, #16] + 49 0010 4FF0FF32 mov r2, #-1 + 50 0014 9847 blx r3 + 51 .loc 1 179 0 + 52 0016 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 53 001a 0029 cmp r1, #0 + 54 001c F5D1 bne .L3 + 55 .L2: + 56 .loc 1 182 0 + 57 001e 2B68 ldr r3, [r5, #0] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 2 + + + 58 0020 0449 ldr r1, .L8+4 + 59 0022 9C69 ldr r4, [r3, #24] + 60 0024 0222 movs r2, #2 + 61 0026 4FF0FF33 mov r3, #-1 + 62 002a 0148 ldr r0, .L8 + 63 002c A047 blx r4 + 64 .loc 1 183 0 + 65 002e 38BD pop {r3, r4, r5, pc} + 66 .L9: + 67 .align 2 + 68 .L8: + 69 0030 00000000 .word SD1 + 70 0034 00000000 .word .LC0 + 71 .cfi_endproc + 72 .LFE66: + 73 .size println, .-println + 74 0038 AFF30080 .section .text.gpt3cb,"ax",%progbits + 74 AFF30080 + 75 .align 2 + 76 .p2align 4,,15 + 77 .thumb + 78 .thumb_func + 79 .type gpt3cb, %function + 80 gpt3cb: + 81 .LFB64: + 82 .loc 1 138 0 + 83 .cfi_startproc + 84 @ args = 0, pretend = 0, frame = 0 + 85 @ frame_needed = 0, uses_anonymous_args = 0 + 86 .LVL2: + 87 0000 08B5 push {r3, lr} + 88 .LCFI1: + 89 .cfi_def_cfa_offset 8 + 90 .cfi_offset 14, -4 + 91 .cfi_offset 3, -8 + 92 .LBB34: + 93 .loc 1 142 0 + 94 0002 2023 movs r3, #32 + 95 .LVL3: + 96 @ 142 "main.c" 1 + 97 0004 83F31188 msr BASEPRI, r3 + 98 @ 0 "" 2 + 99 .LVL4: + 100 .thumb + 101 .LBE34: + 102 .loc 1 143 0 + 103 0008 0548 ldr r0, .L12 + 104 .LVL5: + 105 000a 0021 movs r1, #0 + 106 000c FFF7FEFF bl chMBPostI + 107 .LVL6: + 108 .loc 1 144 0 + 109 0010 10B1 cbz r0, .L11 + 110 .loc 1 145 0 + 111 0012 044B ldr r3, .L12+4 + 112 0014 0122 movs r2, #1 + 113 0016 1A60 str r2, [r3, #0] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 3 + + + 114 .L11: + 115 .LBB35: + 116 .loc 1 146 0 + 117 0018 0023 movs r3, #0 + 118 .LVL7: + 119 @ 146 "main.c" 1 + 120 001a 83F31188 msr BASEPRI, r3 + 121 @ 0 "" 2 + 122 .LVL8: + 123 .thumb + 124 .LBE35: + 125 .loc 1 147 0 + 126 001e 08BD pop {r3, pc} + 127 .L13: + 128 .align 2 + 129 .L12: + 130 0020 78000000 .word .LANCHOR0+120 + 131 0024 00000000 .word .LANCHOR1 + 132 .cfi_endproc + 133 .LFE64: + 134 .size gpt3cb, .-gpt3cb + 135 0028 AFF30080 .section .text.gpt2cb,"ax",%progbits + 135 AFF30080 + 136 .align 2 + 137 .p2align 4,,15 + 138 .thumb + 139 .thumb_func + 140 .type gpt2cb, %function + 141 gpt2cb: + 142 .LFB63: + 143 .loc 1 124 0 + 144 .cfi_startproc + 145 @ args = 0, pretend = 0, frame = 0 + 146 @ frame_needed = 0, uses_anonymous_args = 0 + 147 .LVL9: + 148 0000 08B5 push {r3, lr} + 149 .LCFI2: + 150 .cfi_def_cfa_offset 8 + 151 .cfi_offset 14, -4 + 152 .cfi_offset 3, -8 + 153 .LBB36: + 154 .loc 1 128 0 + 155 0002 2023 movs r3, #32 + 156 .LVL10: + 157 @ 128 "main.c" 1 + 158 0004 83F31188 msr BASEPRI, r3 + 159 @ 0 "" 2 + 160 .LVL11: + 161 .thumb + 162 .LBE36: + 163 .loc 1 129 0 + 164 0008 0548 ldr r0, .L16 + 165 .LVL12: + 166 000a 0121 movs r1, #1 + 167 000c FFF7FEFF bl chMBPostI + 168 .LVL13: + 169 .loc 1 130 0 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 4 + + + 170 0010 10B1 cbz r0, .L15 + 171 .loc 1 131 0 + 172 0012 044B ldr r3, .L16+4 + 173 0014 0122 movs r2, #1 + 174 0016 1A60 str r2, [r3, #0] + 175 .L15: + 176 .LBB37: + 177 .loc 1 132 0 + 178 0018 0023 movs r3, #0 + 179 .LVL14: + 180 @ 132 "main.c" 1 + 181 001a 83F31188 msr BASEPRI, r3 + 182 @ 0 "" 2 + 183 .LVL15: + 184 .thumb + 185 .LBE37: + 186 .loc 1 133 0 + 187 001e 08BD pop {r3, pc} + 188 .L17: + 189 .align 2 + 190 .L16: + 191 0020 00000000 .word .LANCHOR0 + 192 0024 00000000 .word .LANCHOR1 + 193 .cfi_endproc + 194 .LFE63: + 195 .size gpt2cb, .-gpt2cb + 196 0028 AFF30080 .section .text.WorkerThread,"ax",%progbits + 196 AFF30080 + 197 .align 2 + 198 .p2align 4,,15 + 199 .thumb + 200 .thumb_func + 201 .type WorkerThread, %function + 202 WorkerThread: + 203 .LFB62: + 204 .loc 1 65 0 + 205 .cfi_startproc + 206 @ args = 0, pretend = 0, frame = 8 + 207 @ frame_needed = 0, uses_anonymous_args = 0 + 208 .LVL16: + 209 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 210 .LCFI3: + 211 .cfi_def_cfa_offset 36 + 212 .cfi_offset 14, -4 + 213 .cfi_offset 11, -8 + 214 .cfi_offset 10, -12 + 215 .cfi_offset 9, -16 + 216 .cfi_offset 8, -20 + 217 .cfi_offset 7, -24 + 218 .cfi_offset 6, -28 + 219 .cfi_offset 5, -32 + 220 .cfi_offset 4, -36 + 221 .loc 1 73 0 + 222 0004 244B ldr r3, .L31 + 223 0006 DFF8A0B0 ldr fp, .L31+16 + 224 000a DB69 ldr r3, [r3, #28] + 225 000c 234E ldr r6, .L31+4 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 5 + + + 226 000e 244A ldr r2, .L31+8 + 227 .loc 1 78 0 + 228 0010 00EB8007 add r7, r0, r0, lsl #2 + 229 0014 234C ldr r4, .L31+12 + 230 .loc 1 65 0 + 231 0016 83B0 sub sp, sp, #12 + 232 .LCFI4: + 233 .cfi_def_cfa_offset 48 + 234 .loc 1 73 0 + 235 0018 9A61 str r2, [r3, #24] + 236 001a 0509 lsrs r5, r0, #4 + 237 001c 00F1FF39 add r9, r0, #-1 + 238 0020 00F10108 add r8, r0, #1 + 239 .loc 1 78 0 + 240 0024 0BEBC707 add r7, fp, r7, lsl #3 + 241 .loc 1 113 0 + 242 0028 B246 mov sl, r6 + 243 .LVL17: + 244 .L29: + 245 .loc 1 78 0 + 246 002a 3846 mov r0, r7 + 247 .LVL18: + 248 002c 01A9 add r1, sp, #4 + 249 002e 4FF0FF32 mov r2, #-1 + 250 0032 FFF7FEFF bl chMBFetch + 251 .LVL19: + 252 .loc 1 93 0 + 253 0036 2DB1 cbz r5, .L20 + 254 0038 2B46 mov r3, r5 + 255 .LVL20: + 256 .L21: + 257 .loc 1 94 0 + 258 003a 2268 ldr r2, [r4, #0] + 259 003c 0132 adds r2, r2, #1 + 260 .loc 1 93 0 + 261 003e 013B subs r3, r3, #1 + 262 .loc 1 94 0 + 263 0040 2260 str r2, [r4, #0] + 264 .loc 1 93 0 + 265 0042 FAD1 bne .L21 + 266 .L20: + 267 .loc 1 99 0 + 268 0044 0199 ldr r1, [sp, #4] + 269 .loc 1 100 0 + 270 0046 0029 cmp r1, #0 + 271 0048 14BF ite ne + 272 004a 4346 movne r3, r8 + 273 004c 4B46 moveq r3, r9 + 274 .LVL21: + 275 .loc 1 104 0 + 276 004e 032B cmp r3, #3 + 277 0050 11D9 bls .L30 + 278 .loc 1 113 0 + 279 0052 3368 ldr r3, [r6, #0] + 280 .LVL22: + 281 0054 0133 adds r3, r3, #1 + 282 0056 B3F5FA7F cmp r3, #500 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 6 + + + 283 005a 3360 str r3, [r6, #0] + 284 005c E5D3 bcc .L29 + 285 .loc 1 114 0 + 286 005e 0022 movs r2, #0 + 287 .loc 1 115 0 + 288 0060 4FF48063 mov r3, #1024 + 289 .loc 1 114 0 + 290 0064 CAF80020 str r2, [sl, #0] + 291 .loc 1 115 0 + 292 0068 C4F20203 movt r3, 16386 + 293 006c 5A69 ldr r2, [r3, #20] + 294 006e 82F04002 eor r2, r2, #64 + 295 0072 5A61 str r2, [r3, #20] + 296 0074 D9E7 b .L29 + 297 .LVL23: + 298 .L30: + 299 .loc 1 107 0 + 300 0076 03EB8303 add r3, r3, r3, lsl #2 + 301 .LVL24: + 302 007a 0BEBC300 add r0, fp, r3, lsl #3 + 303 007e 0022 movs r2, #0 + 304 0080 FFF7FEFF bl chMBPost + 305 0084 0190 str r0, [sp, #4] + 306 .loc 1 108 0 + 307 0086 0028 cmp r0, #0 + 308 0088 CFD0 beq .L29 + 309 .loc 1 109 0 + 310 008a 40F20002 movw r2, #:lower16:.LANCHOR1 + 311 008e 0123 movs r3, #1 + 312 0090 C0F20002 movt r2, #:upper16:.LANCHOR1 + 313 0094 1360 str r3, [r2, #0] + 314 0096 C8E7 b .L29 + 315 .L32: + 316 .align 2 + 317 .L31: + 318 0098 00000000 .word rlist + 319 009c 00000000 .word .LANCHOR3 + 320 00a0 04000000 .word .LC1 + 321 00a4 00000000 .word .LANCHOR2 + 322 00a8 00000000 .word .LANCHOR0 + 323 .cfi_endproc + 324 .LFE62: + 325 .size WorkerThread, .-WorkerThread + 326 00ac AFF30080 .section .text.printn,"ax",%progbits + 327 .align 2 + 328 .p2align 4,,15 + 329 .thumb + 330 .thumb_func + 331 .type printn, %function + 332 printn: + 333 .LFB67: + 334 .loc 1 185 0 + 335 .cfi_startproc + 336 @ args = 0, pretend = 0, frame = 16 + 337 @ frame_needed = 0, uses_anonymous_args = 0 + 338 .LVL25: + 339 0000 70B5 push {r4, r5, r6, lr} + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 7 + + + 340 .LCFI5: + 341 .cfi_def_cfa_offset 16 + 342 .cfi_offset 14, -4 + 343 .cfi_offset 6, -8 + 344 .cfi_offset 5, -12 + 345 .cfi_offset 4, -16 + 346 0002 84B0 sub sp, sp, #16 + 347 .LCFI6: + 348 .cfi_def_cfa_offset 32 + 349 .loc 1 188 0 + 350 0004 0028 cmp r0, #0 + 351 0006 24D0 beq .L39 + 352 .loc 1 193 0 + 353 0008 4CF6CD42 movw r2, #52429 + 354 .LBB40: + 355 .LBB41: + 356 .loc 1 191 0 + 357 000c 6D46 mov r5, sp + 358 .LBE41: + 359 .LBE40: + 360 .loc 1 188 0 + 361 000e 6C46 mov r4, sp + 362 .loc 1 193 0 + 363 0010 CCF6CC42 movt r2, 52428 + 364 .LVL26: + 365 .L36: + 366 0014 A2FB0013 umull r1, r3, r2, r0 + 367 0018 DB08 lsrs r3, r3, #3 + 368 001a 03EB8301 add r1, r3, r3, lsl #2 + 369 001e A0EB4101 sub r1, r0, r1, lsl #1 + 370 0022 3031 adds r1, r1, #48 + 371 0024 C9B2 uxtb r1, r1 + 372 .loc 1 192 0 + 373 0026 1846 mov r0, r3 + 374 .loc 1 193 0 + 375 0028 04F8011B strb r1, [r4], #1 + 376 .LVL27: + 377 .loc 1 192 0 + 378 002c 002B cmp r3, #0 + 379 002e F1D1 bne .L36 + 380 .loc 1 194 0 + 381 0030 AC42 cmp r4, r5 + 382 0032 0CD9 bls .L33 + 383 0034 0B4E ldr r6, .L41 + 384 .loc 1 185 0 + 385 0036 013C subs r4, r4, #1 + 386 .LVL28: + 387 0038 01E0 b .L37 + 388 .LVL29: + 389 .L40: + 390 .loc 1 194 0 + 391 003a 14F8011D ldrb r1, [r4, #-1]! @ zero_extendqisi2 + 392 .L37: + 393 .loc 1 195 0 + 394 003e 3368 ldr r3, [r6, #0] + 395 0040 0848 ldr r0, .L41 + 396 0042 1B69 ldr r3, [r3, #16] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 8 + + + 397 0044 4FF0FF32 mov r2, #-1 + 398 0048 9847 blx r3 + 399 .loc 1 194 0 + 400 004a AC42 cmp r4, r5 + 401 004c F5D1 bne .L40 + 402 .L33: + 403 .loc 1 197 0 + 404 004e 04B0 add sp, sp, #16 + 405 0050 70BD pop {r4, r5, r6, pc} + 406 .LVL30: + 407 .L39: + 408 .LBB43: + 409 .LBB42: + 410 .loc 1 189 0 + 411 0052 0448 ldr r0, .L41 + 412 .LVL31: + 413 0054 3021 movs r1, #48 + 414 0056 0368 ldr r3, [r0, #0] + 415 0058 4FF0FF32 mov r2, #-1 + 416 005c 1B69 ldr r3, [r3, #16] + 417 005e 9847 blx r3 + 418 0060 F5E7 b .L33 + 419 .L42: + 420 0062 00BF .align 2 + 421 .L41: + 422 0064 00000000 .word SD1 + 423 .LBE42: + 424 .LBE43: + 425 .cfi_endproc + 426 .LFE67: + 427 .size printn, .-printn + 428 0068 AFF30080 .section .text.startup.main,"ax",%progbits + 428 AFF30080 + 429 .align 2 + 430 .p2align 4,,15 + 431 .global main + 432 .thumb + 433 .thumb_func + 434 .type main, %function + 435 main: + 436 .LFB68: + 437 .loc 1 202 0 + 438 .cfi_startproc + 439 @ args = 0, pretend = 0, frame = 8 + 440 @ frame_needed = 0, uses_anonymous_args = 0 + 441 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, sl, lr} + 442 .LCFI7: + 443 .cfi_def_cfa_offset 32 + 444 .cfi_offset 14, -4 + 445 .cfi_offset 10, -8 + 446 .cfi_offset 9, -12 + 447 .cfi_offset 8, -16 + 448 .cfi_offset 7, -20 + 449 .cfi_offset 6, -24 + 450 .cfi_offset 5, -28 + 451 .cfi_offset 4, -32 + 452 0004 84B0 sub sp, sp, #16 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 9 + + + 453 .LCFI8: + 454 .cfi_def_cfa_offset 48 + 455 .loc 1 213 0 + 456 0006 FFF7FEFF bl halInit + 457 .loc 1 214 0 + 458 000a FFF7FEFF bl chSysInit + 459 .loc 1 219 0 + 460 000e 9048 ldr r0, .L84 + 461 0010 0021 movs r1, #0 + 462 0012 FFF7FEFF bl sdStart + 463 .loc 1 220 0 + 464 0016 0020 movs r0, #0 + 465 0018 C4F20200 movt r0, 16386 + 466 001c 4FF40071 mov r1, #512 + 467 0020 40F28232 movw r2, #898 + 468 0024 FFF7FEFF bl _pal_lld_setgroupmode + 469 .loc 1 221 0 + 470 0028 0020 movs r0, #0 + 471 002a 40F28232 movw r2, #898 + 472 002e C4F20200 movt r0, 16386 + 473 0032 4FF48061 mov r1, #1024 + 474 0036 FFF7FEFF bl _pal_lld_setgroupmode + 475 .loc 1 222 0 + 476 003a 8648 ldr r0, .L84+4 + 477 003c 8649 ldr r1, .L84+8 + 478 003e FFF7FEFF bl gptStart + 479 .loc 1 223 0 + 480 0042 8648 ldr r0, .L84+12 + 481 0044 8649 ldr r1, .L84+16 + 482 0046 FFF7FEFF bl gptStart + 483 .LVL32: + 484 .loc 1 229 0 + 485 004a 864E ldr r6, .L84+20 + 486 .loc 1 230 0 + 487 004c 864D ldr r5, .L84+24 + 488 004e 874F ldr r7, .L84+28 + 489 .loc 1 228 0 + 490 0050 0024 movs r4, #0 + 491 .LVL33: + 492 .L44: + 493 .loc 1 229 0 discriminator 2 + 494 0052 04EB8400 add r0, r4, r4, lsl #2 + 495 0056 3146 mov r1, r6 + 496 0058 0422 movs r2, #4 + 497 005a 07EBC000 add r0, r7, r0, lsl #3 + 498 005e FFF7FEFF bl chMBInit + 499 .loc 1 230 0 discriminator 2 + 500 0062 0094 str r4, [sp, #0] + 501 0064 2846 mov r0, r5 + 502 0066 2C22 movs r2, #44 + 503 0068 4FF49071 mov r1, #288 + 504 006c 804B ldr r3, .L84+32 + 505 .loc 1 228 0 discriminator 2 + 506 006e 0134 adds r4, r4, #1 + 507 .loc 1 230 0 discriminator 2 + 508 0070 FFF7FEFF bl chThdCreateStatic + 509 .LVL34: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 10 + + + 510 .loc 1 228 0 discriminator 2 + 511 0074 1036 adds r6, r6, #16 + 512 0076 042C cmp r4, #4 + 513 0078 05F59075 add r5, r5, #288 + 514 007c E9D1 bne .L44 + 515 .loc 1 237 0 + 516 007e 7D48 ldr r0, .L84+36 + 517 0080 FFF7FEFF bl println + 518 .loc 1 238 0 + 519 0084 7C48 ldr r0, .L84+40 + 520 0086 FFF7FEFF bl println + 521 .loc 1 239 0 + 522 008a 7C4C ldr r4, .L84+44 + 523 .LVL35: + 524 008c 7C48 ldr r0, .L84+48 + 525 008e 704D ldr r5, .L84 + 526 0090 FFF7FEFF bl println + 527 .LVL36: + 528 .loc 1 172 0 + 529 0094 2A21 movs r1, #42 + 530 .LVL37: + 531 .L45: + 532 .LBB44: + 533 .LBB45: + 534 .loc 1 173 0 + 535 0096 2B68 ldr r3, [r5, #0] + 536 0098 6D48 ldr r0, .L84 + 537 009a 1B69 ldr r3, [r3, #16] + 538 009c 4FF0FF32 mov r2, #-1 + 539 00a0 9847 blx r3 + 540 .loc 1 172 0 + 541 00a2 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 542 00a6 0029 cmp r1, #0 + 543 00a8 F5D1 bne .L45 + 544 .LBE45: + 545 .LBE44: + 546 .loc 1 241 0 + 547 00aa 7648 ldr r0, .L84+52 + 548 00ac 764C ldr r4, .L84+56 + 549 00ae FFF7FEFF bl println + 550 .LVL38: + 551 .loc 1 172 0 + 552 00b2 2A21 movs r1, #42 + 553 .LVL39: + 554 .L46: + 555 .LBB46: + 556 .LBB47: + 557 .loc 1 173 0 + 558 00b4 2B68 ldr r3, [r5, #0] + 559 00b6 6648 ldr r0, .L84 + 560 00b8 1B69 ldr r3, [r3, #16] + 561 00ba 4FF0FF32 mov r2, #-1 + 562 00be 9847 blx r3 + 563 .loc 1 172 0 + 564 00c0 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 565 00c4 0029 cmp r1, #0 + 566 00c6 F5D1 bne .L46 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 11 + + + 567 .LBE47: + 568 .LBE46: + 569 .loc 1 244 0 + 570 00c8 7048 ldr r0, .L84+60 + 571 00ca 714C ldr r4, .L84+64 + 572 00cc FFF7FEFF bl println + 573 .LVL40: + 574 .loc 1 172 0 + 575 00d0 2A21 movs r1, #42 + 576 .LVL41: + 577 .L47: + 578 .LBB48: + 579 .LBB49: + 580 .loc 1 173 0 + 581 00d2 2B68 ldr r3, [r5, #0] + 582 00d4 5E48 ldr r0, .L84 + 583 00d6 1B69 ldr r3, [r3, #16] + 584 00d8 4FF0FF32 mov r2, #-1 + 585 00dc 9847 blx r3 + 586 .loc 1 172 0 + 587 00de 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 588 00e2 0029 cmp r1, #0 + 589 00e4 F5D1 bne .L47 + 590 .LBE49: + 591 .LBE48: + 592 .loc 1 247 0 + 593 00e6 6B48 ldr r0, .L84+68 + 594 00e8 6B4C ldr r4, .L84+72 + 595 00ea FFF7FEFF bl println + 596 .LVL42: + 597 .loc 1 172 0 + 598 00ee 2A21 movs r1, #42 + 599 .LVL43: + 600 .L48: + 601 .LBB50: + 602 .LBB51: + 603 .loc 1 173 0 + 604 00f0 2B68 ldr r3, [r5, #0] + 605 00f2 5748 ldr r0, .L84 + 606 00f4 1B69 ldr r3, [r3, #16] + 607 00f6 4FF0FF32 mov r2, #-1 + 608 00fa 9847 blx r3 + 609 .loc 1 172 0 + 610 00fc 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 611 0100 0029 cmp r1, #0 + 612 0102 F5D1 bne .L48 + 613 .LBE51: + 614 .LBE50: + 615 .loc 1 250 0 + 616 0104 6548 ldr r0, .L84+76 + 617 0106 664C ldr r4, .L84+80 + 618 0108 FFF7FEFF bl println + 619 .LVL44: + 620 .loc 1 172 0 + 621 010c 2A21 movs r1, #42 + 622 .LVL45: + 623 .L49: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 12 + + + 624 .LBB52: + 625 .LBB53: + 626 .loc 1 173 0 + 627 010e 2B68 ldr r3, [r5, #0] + 628 0110 4F48 ldr r0, .L84 + 629 0112 1B69 ldr r3, [r3, #16] + 630 0114 4FF0FF32 mov r2, #-1 + 631 0118 9847 blx r3 + 632 .loc 1 172 0 + 633 011a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 634 011e 0029 cmp r1, #0 + 635 0120 F5D1 bne .L49 + 636 .LBE53: + 637 .LBE52: + 638 .loc 1 254 0 + 639 0122 6048 ldr r0, .L84+84 + 640 0124 604C ldr r4, .L84+88 + 641 0126 FFF7FEFF bl println + 642 .LVL46: + 643 .loc 1 172 0 + 644 012a 2A21 movs r1, #42 + 645 .LVL47: + 646 .L50: + 647 .LBB54: + 648 .LBB55: + 649 .loc 1 173 0 + 650 012c 2B68 ldr r3, [r5, #0] + 651 012e 4848 ldr r0, .L84 + 652 0130 1B69 ldr r3, [r3, #16] + 653 0132 4FF0FF32 mov r2, #-1 + 654 0136 9847 blx r3 + 655 .loc 1 172 0 + 656 0138 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 657 013c 0029 cmp r1, #0 + 658 013e F5D1 bne .L50 + 659 .LBE55: + 660 .LBE54: + 661 .loc 1 258 0 + 662 0140 5A48 ldr r0, .L84+92 + 663 0142 FFF7FEFF bl println + 664 .loc 1 260 0 + 665 0146 5A4C ldr r4, .L84+96 + 666 0148 4D48 ldr r0, .L84+48 + 667 014a FFF7FEFF bl println + 668 .LVL48: + 669 .loc 1 172 0 + 670 014e 2A21 movs r1, #42 + 671 .LVL49: + 672 .L51: + 673 .LBB56: + 674 .LBB57: + 675 .loc 1 173 0 + 676 0150 2B68 ldr r3, [r5, #0] + 677 0152 3F48 ldr r0, .L84 + 678 0154 1B69 ldr r3, [r3, #16] + 679 0156 4FF0FF32 mov r2, #-1 + 680 015a 9847 blx r3 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 13 + + + 681 .loc 1 172 0 + 682 015c 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 683 0160 0029 cmp r1, #0 + 684 0162 F5D1 bne .L51 + 685 .LBE57: + 686 .LBE56: + 687 .loc 1 262 0 + 688 0164 4FF49040 mov r0, #18432 + 689 0168 C0F2E810 movt r0, 488 + 690 016c FFF7FEFF bl printn + 691 .loc 1 263 0 + 692 0170 504C ldr r4, .L84+100 + 693 0172 4048 ldr r0, .L84+36 + 694 0174 FFF7FEFF bl println + 695 .LVL50: + 696 .loc 1 172 0 + 697 0178 2A21 movs r1, #42 + 698 .LVL51: + 699 .L52: + 700 .LBB58: + 701 .LBB59: + 702 .loc 1 173 0 + 703 017a 2B68 ldr r3, [r5, #0] + 704 017c 3448 ldr r0, .L84 + 705 017e 1B69 ldr r3, [r3, #16] + 706 0180 4FF0FF32 mov r2, #-1 + 707 0184 9847 blx r3 + 708 .loc 1 172 0 + 709 0186 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 710 018a 0029 cmp r1, #0 + 711 018c F5D1 bne .L52 + 712 .LBE59: + 713 .LBE58: + 714 .loc 1 265 0 + 715 018e 6420 movs r0, #100 + 716 0190 FFF7FEFF bl printn + 717 .loc 1 266 0 + 718 0194 484C ldr r4, .L84+104 + 719 0196 3748 ldr r0, .L84+36 + 720 0198 FFF7FEFF bl println + 721 .LVL52: + 722 .loc 1 172 0 + 723 019c 2A21 movs r1, #42 + 724 .LVL53: + 725 .L53: + 726 .LBB60: + 727 .LBB61: + 728 .loc 1 173 0 + 729 019e 2B68 ldr r3, [r5, #0] + 730 01a0 2B48 ldr r0, .L84 + 731 01a2 1B69 ldr r3, [r3, #16] + 732 01a4 4FF0FF32 mov r2, #-1 + 733 01a8 9847 blx r3 + 734 .loc 1 172 0 + 735 01aa 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 736 01ae 0029 cmp r1, #0 + 737 01b0 F5D1 bne .L53 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 14 + + + 738 .LBE61: + 739 .LBE60: + 740 .loc 1 268 0 + 741 01b2 0846 mov r0, r1 + 742 01b4 FFF7FEFF bl printn + 743 .loc 1 269 0 + 744 01b8 404C ldr r4, .L84+108 + 745 01ba 2E48 ldr r0, .L84+36 + 746 01bc FFF7FEFF bl println + 747 .LVL54: + 748 .loc 1 172 0 + 749 01c0 2A21 movs r1, #42 + 750 .LVL55: + 751 .L54: + 752 .LBB62: + 753 .LBB63: + 754 .loc 1 173 0 + 755 01c2 2B68 ldr r3, [r5, #0] + 756 01c4 2248 ldr r0, .L84 + 757 01c6 1B69 ldr r3, [r3, #16] + 758 01c8 4FF0FF32 mov r2, #-1 + 759 01cc 9847 blx r3 + 760 .loc 1 172 0 + 761 01ce 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 762 01d2 0029 cmp r1, #0 + 763 01d4 F5D1 bne .L54 + 764 .LBE63: + 765 .LBE62: + 766 .loc 1 271 0 + 767 01d6 0420 movs r0, #4 + 768 01d8 FFF7FEFF bl printn + 769 .loc 1 272 0 + 770 01dc 2548 ldr r0, .L84+36 + 771 01de FFF7FEFF bl println + 772 .LVL56: + 773 01e2 374C ldr r4, .L84+112 + 774 .loc 1 172 0 + 775 01e4 2A26 movs r6, #42 + 776 .LVL57: + 777 .L55: + 778 .LBB64: + 779 .LBB65: + 780 .loc 1 173 0 + 781 01e6 2B68 ldr r3, [r5, #0] + 782 01e8 3146 mov r1, r6 + 783 01ea 1B69 ldr r3, [r3, #16] + 784 01ec 1848 ldr r0, .L84 + 785 01ee 4FF0FF32 mov r2, #-1 + 786 01f2 9847 blx r3 + 787 .loc 1 172 0 + 788 01f4 14F8016F ldrb r6, [r4, #1]! @ zero_extendqisi2 + 789 01f8 002E cmp r6, #0 + 790 01fa F4D1 bne .L55 + 791 .LBE65: + 792 .LBE64: + 793 .loc 1 274 0 + 794 01fc 0420 movs r0, #4 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 15 + + + 795 01fe FFF7FEFF bl printn + 796 .loc 1 275 0 + 797 0202 1C48 ldr r0, .L84+36 + 798 0204 FFF7FEFF bl println + 799 .loc 1 277 0 + 800 0208 1A48 ldr r0, .L84+36 + 801 020a FFF7FEFF bl println + 802 .LVL58: + 803 .loc 1 285 0 + 804 020e 4CF6CD48 movw r8, #52429 + 805 0212 2C4F ldr r7, .L84+116 + 806 .loc 1 278 0 + 807 0214 B246 mov sl, r6 + 808 .loc 1 279 0 + 809 0216 4FF00109 mov r9, #1 + 810 .loc 1 285 0 + 811 021a CCF6CC48 movt r8, 52428 + 812 .LVL59: + 813 .L56: + 814 .loc 1 279 0 + 815 021e 2A4C ldr r4, .L84+120 + 816 .loc 1 172 0 + 817 0220 4921 movs r1, #73 + 818 .LVL60: + 819 .L57: + 820 .LBB66: + 821 .LBB67: + 822 .loc 1 173 0 + 823 0222 2B68 ldr r3, [r5, #0] + 824 0224 0A48 ldr r0, .L84 + 825 0226 1B69 ldr r3, [r3, #16] + 826 0228 4FF0FF32 mov r2, #-1 + 827 022c 9847 blx r3 + 828 .loc 1 172 0 + 829 022e 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 830 0232 0029 cmp r1, #0 + 831 0234 F5D1 bne .L57 + 832 .LBE67: + 833 .LBE66: + 834 .loc 1 281 0 + 835 0236 4846 mov r0, r9 + 836 0238 0391 str r1, [sp, #12] + 837 023a FFF7FEFF bl printn + 838 .loc 1 282 0 + 839 023e 0D48 ldr r0, .L84+36 + 840 0240 FFF7FEFF bl println + 841 .loc 1 284 0 + 842 0244 0399 ldr r1, [sp, #12] + 843 .loc 1 285 0 + 844 0246 4FF4FA66 mov r6, #2000 + 845 .loc 1 284 0 + 846 024a 0C46 mov r4, r1 + 847 .loc 1 283 0 + 848 024c 3960 str r1, [r7, #0] + 849 .LVL61: + 850 024e 48E0 b .L60 + 851 .L85: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 16 + + + 852 .align 2 + 853 .L84: + 854 0250 00000000 .word SD1 + 855 0254 00000000 .word GPTD2 + 856 0258 00000000 .word .LANCHOR4 + 857 025c 00000000 .word GPTD3 + 858 0260 00000000 .word .LANCHOR5 + 859 0264 00000000 .word .LANCHOR6 + 860 0268 00000000 .word .LANCHOR7 + 861 026c 00000000 .word .LANCHOR0 + 862 0270 00000000 .word WorkerThread + 863 0274 0C000000 .word .LC2 + 864 0278 10000000 .word .LC3 + 865 027c 40000000 .word .LC5 + 866 0280 3C000000 .word .LC4 + 867 0284 54000000 .word .LC6 + 868 0288 64000000 .word .LC7 + 869 028c 78000000 .word .LC8 + 870 0290 80000000 .word .LC9 + 871 0294 94000000 .word .LC10 + 872 0298 9C000000 .word .LC11 + 873 029c B0000000 .word .LC12 + 874 02a0 BC000000 .word .LC13 + 875 02a4 D0000000 .word .LC14 + 876 02a8 F8000000 .word .LC15 + 877 02ac 0C010000 .word .LC16 + 878 02b0 20010000 .word .LC17 + 879 02b4 34010000 .word .LC18 + 880 02b8 48010000 .word .LC19 + 881 02bc 5C010000 .word .LC20 + 882 02c0 70010000 .word .LC21 + 883 02c4 00000000 .word .LANCHOR1 + 884 02c8 98010000 .word .LC24 + 885 .LVL62: + 886 .L83: + 887 .LBB68: + 888 .LBB69: + 889 .loc 1 173 0 + 890 02cc 2B68 ldr r3, [r5, #0] + 891 02ce 2E21 movs r1, #46 + 892 02d0 1B69 ldr r3, [r3, #16] + 893 02d2 9847 blx r3 + 894 .LVL63: + 895 .LBE69: + 896 .LBE68: + 897 .loc 1 285 0 + 898 02d4 A8FB0623 umull r2, r3, r8, r6 + 899 02d8 A6EBD306 sub r6, r6, r3, lsr #3 + 900 02dc B6B2 uxth r6, r6 + 901 .LVL64: + 902 02de 132E cmp r6, #19 + 903 02e0 27D9 bls .L82 + 904 .LVL65: + 905 .L60: + 906 .loc 1 286 0 + 907 02e2 711E subs r1, r6, #1 + 908 02e4 89B2 uxth r1, r1 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 17 + + + 909 02e6 3748 ldr r0, .L86 + 910 02e8 FFF7FEFF bl gptStartContinuous + 911 .loc 1 287 0 + 912 02ec 711C adds r1, r6, #1 + 913 02ee 89B2 uxth r1, r1 + 914 02f0 3548 ldr r0, .L86+4 + 915 02f2 FFF7FEFF bl gptStartContinuous + 916 .loc 1 288 0 + 917 02f6 4FF47A70 mov r0, #1000 + 918 02fa FFF7FEFF bl chThdSleep + 919 .loc 1 289 0 + 920 02fe 3148 ldr r0, .L86 + 921 0300 FFF7FEFF bl gptStopTimer + 922 .loc 1 290 0 + 923 0304 3048 ldr r0, .L86+4 + 924 0306 FFF7FEFF bl gptStopTimer + 925 .loc 1 291 0 + 926 030a 3B68 ldr r3, [r7, #0] + 927 .LBB70: + 928 .LBB71: + 929 .loc 1 173 0 + 930 030c 2F48 ldr r0, .L86+8 + 931 030e 2321 movs r1, #35 + 932 0310 4FF0FF32 mov r2, #-1 + 933 .LBE71: + 934 .LBE70: + 935 .loc 1 291 0 + 936 0314 002B cmp r3, #0 + 937 0316 D9D0 beq .L83 + 938 .LVL66: + 939 .LBB74: + 940 .LBB72: + 941 .loc 1 173 0 + 942 0318 2B68 ldr r3, [r5, #0] + 943 .LBE72: + 944 .LBE74: + 945 .loc 1 295 0 + 946 031a 002C cmp r4, #0 + 947 031c 08BF it eq + 948 031e 3446 moveq r4, r6 + 949 .LBB75: + 950 .LBB73: + 951 .loc 1 173 0 + 952 0320 1B69 ldr r3, [r3, #16] + 953 0322 9847 blx r3 + 954 .LVL67: + 955 .LBE73: + 956 .LBE75: + 957 .loc 1 285 0 + 958 0324 A8FB0623 umull r2, r3, r8, r6 + 959 0328 A6EBD306 sub r6, r6, r3, lsr #3 + 960 032c B6B2 uxth r6, r6 + 961 .LVL68: + 962 032e 132E cmp r6, #19 + 963 0330 D7D8 bhi .L60 + 964 .LVL69: + 965 .L82: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 18 + + + 966 .loc 1 301 0 + 967 0332 1420 movs r0, #20 + 968 0334 FFF7FEFF bl chThdSleep + 969 .loc 1 302 0 + 970 0338 254E ldr r6, .L86+12 + 971 033a 2648 ldr r0, .L86+16 + 972 033c FFF7FEFF bl println + 973 .LVL70: + 974 .loc 1 172 0 + 975 0340 5321 movs r1, #83 + 976 .LVL71: + 977 .L61: + 978 .LBB76: + 979 .LBB77: + 980 .loc 1 173 0 + 981 0342 2B68 ldr r3, [r5, #0] + 982 0344 2148 ldr r0, .L86+8 + 983 0346 1B69 ldr r3, [r3, #16] + 984 0348 4FF0FF32 mov r2, #-1 + 985 034c 9847 blx r3 + 986 .loc 1 172 0 + 987 034e 16F8011F ldrb r1, [r6, #1]! @ zero_extendqisi2 + 988 0352 0029 cmp r1, #0 + 989 0354 F5D1 bne .L61 + 990 .LBE77: + 991 .LBE76: + 992 .loc 1 304 0 + 993 0356 2046 mov r0, r4 + 994 0358 FFF7FEFF bl printn + 995 .loc 1 305 0 + 996 035c 1E48 ldr r0, .L86+20 + 997 035e FFF7FEFF bl println + 998 .loc 1 279 0 + 999 0362 09F10109 add r9, r9, #1 + 1000 .loc 1 306 0 + 1001 0366 1B48 ldr r0, .L86+16 + 1002 0368 5445 cmp r4, sl + 1003 036a 28BF it cs + 1004 036c A246 movcs sl, r4 + 1005 036e FFF7FEFF bl println + 1006 .loc 1 279 0 + 1007 0372 B9F1650F cmp r9, #101 + 1008 .loc 1 306 0 + 1009 0376 1FFA8AFA uxth sl, sl + 1010 .LVL72: + 1011 .loc 1 279 0 + 1012 037a 7FF450AF bne .L56 + 1013 .loc 1 310 0 + 1014 037e 1148 ldr r0, .L86 + 1015 0380 FFF7FEFF bl gptStopTimer + 1016 .loc 1 311 0 + 1017 0384 154C ldr r4, .L86+24 + 1018 0386 1048 ldr r0, .L86+4 + 1019 0388 FFF7FEFF bl gptStopTimer + 1020 .LVL73: + 1021 .loc 1 172 0 + 1022 038c 5721 movs r1, #87 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 19 + + + 1023 .LVL74: + 1024 .L63: + 1025 .LBB78: + 1026 .LBB79: + 1027 .loc 1 173 0 + 1028 038e 2B68 ldr r3, [r5, #0] + 1029 0390 0E48 ldr r0, .L86+8 + 1030 0392 1B69 ldr r3, [r3, #16] + 1031 0394 4FF0FF32 mov r2, #-1 + 1032 0398 9847 blx r3 + 1033 .loc 1 172 0 + 1034 039a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 1035 039e 0029 cmp r1, #0 + 1036 03a0 F5D1 bne .L63 + 1037 .LBE79: + 1038 .LBE78: + 1039 .loc 1 314 0 + 1040 03a2 5046 mov r0, sl + 1041 03a4 FFF7FEFF bl printn + 1042 .loc 1 315 0 + 1043 03a8 0B48 ldr r0, .L86+20 + 1044 03aa FFF7FEFF bl println + 1045 .loc 1 316 0 + 1046 03ae 0948 ldr r0, .L86+16 + 1047 03b0 FFF7FEFF bl println + 1048 .loc 1 317 0 + 1049 03b4 0A48 ldr r0, .L86+28 + 1050 03b6 FFF7FEFF bl println + 1051 .L64: + 1052 .loc 1 323 0 discriminator 1 + 1053 03ba 41F28830 movw r0, #5000 + 1054 03be FFF7FEFF bl chThdSleep + 1055 03c2 FAE7 b .L64 + 1056 .L87: + 1057 .align 2 + 1058 .L86: + 1059 03c4 00000000 .word GPTD2 + 1060 03c8 00000000 .word GPTD3 + 1061 03cc 00000000 .word SD1 + 1062 03d0 84010000 .word .LC22 + 1063 03d4 0C000000 .word .LC2 + 1064 03d8 94010000 .word .LC23 + 1065 03dc A4010000 .word .LC25 + 1066 03e0 B4010000 .word .LC26 + 1067 .cfi_endproc + 1068 .LFE68: + 1069 .size main, .-main + 1070 03e4 AFF30080 .section .rodata.gpt2cfg,"a",%progbits + 1070 AFF30080 + 1070 AFF30080 + 1071 .align 2 + 1072 .set .LANCHOR4,. + 0 + 1073 .type gpt2cfg, %object + 1074 .size gpt2cfg, 8 + 1075 gpt2cfg: + 1076 0000 40420F00 .word 1000000 + 1077 0004 00000000 .word gpt2cb + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 20 + + + 1078 .section .bss.waWorkerThread,"aw",%nobits + 1079 .align 3 + 1080 .set .LANCHOR7,. + 0 + 1081 .type waWorkerThread, %object + 1082 .size waWorkerThread, 1152 + 1083 waWorkerThread: + 1084 0000 00000000 .space 1152 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1085 .section .bss.saturated,"aw",%nobits + 1086 .align 2 + 1087 .set .LANCHOR1,. + 0 + 1088 .type saturated, %object + 1089 .size saturated, 4 + 1090 saturated: + 1091 0000 00000000 .space 4 + 1092 .section .rodata.gpt3cfg,"a",%progbits + 1093 .align 2 + 1094 .set .LANCHOR5,. + 0 + 1095 .type gpt3cfg, %object + 1096 .size gpt3cfg, 8 + 1097 gpt3cfg: + 1098 0000 40420F00 .word 1000000 + 1099 0004 00000000 .word gpt3cb + 1100 .section .rodata.str1.4,"aMS",%progbits,1 + 1101 .align 2 + 1102 .LC0: + 1103 0000 0D0A00 .ascii "\015\012\000" + 1104 0003 00 .space 1 + 1105 .LC1: + 1106 0004 776F726B .ascii "worker\000" + 1106 657200 + 1107 000b 00 .space 1 + 1108 .LC2: + 1109 000c 00 .ascii "\000" + 1110 000d 000000 .space 3 + 1111 .LC3: + 1112 0010 2A2A2A20 .ascii "*** ChibiOS/RT IRQ-STORM long duration test\000" + 1112 43686962 + 1112 694F532F + 1112 52542049 + 1112 52512D53 + 1113 .LC4: + 1114 003c 2A2A2A00 .ascii "***\000" + 1115 .LC5: + 1116 0040 2A2A2A20 .ascii "*** Kernel: \000" + 1116 4B65726E + 1116 656C3A20 + 1116 20202020 + 1116 202000 + 1117 0053 00 .space 1 + 1118 .LC6: + 1119 0054 322E332E .ascii "2.3.3unstable\000" + 1119 33756E73 + 1119 7461626C + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 21 + + + 1119 6500 + 1120 0062 0000 .space 2 + 1121 .LC7: + 1122 0064 2A2A2A20 .ascii "*** GCC Version: \000" + 1122 47434320 + 1122 56657273 + 1122 696F6E3A + 1122 202000 + 1123 0077 00 .space 1 + 1124 .LC8: + 1125 0078 342E362E .ascii "4.6.0\000" + 1125 3000 + 1126 007e 0000 .space 2 + 1127 .LC9: + 1128 0080 2A2A2A20 .ascii "*** Architecture: \000" + 1128 41726368 + 1128 69746563 + 1128 74757265 + 1128 3A2000 + 1129 0093 00 .space 1 + 1130 .LC10: + 1131 0094 41524D76 .ascii "ARMv7-M\000" + 1131 372D4D00 + 1132 .LC11: + 1133 009c 2A2A2A20 .ascii "*** Core Variant: \000" + 1133 436F7265 + 1133 20566172 + 1133 69616E74 + 1133 3A2000 + 1134 00af 00 .space 1 + 1135 .LC12: + 1136 00b0 436F7274 .ascii "Cortex-M3\000" + 1136 65782D4D + 1136 3300 + 1137 00ba 0000 .space 2 + 1138 .LC13: + 1139 00bc 2A2A2A20 .ascii "*** Platform: \000" + 1139 506C6174 + 1139 666F726D + 1139 3A202020 + 1139 202000 + 1140 00cf 00 .space 1 + 1141 .LC14: + 1142 00d0 53544D33 .ascii "STM32L Ultra Low Power Medium Density\000" + 1142 324C2055 + 1142 6C747261 + 1142 204C6F77 + 1142 20506F77 + 1143 00f6 0000 .space 2 + 1144 .LC15: + 1145 00f8 2A2A2A20 .ascii "*** Test Board: \000" + 1145 54657374 + 1145 20426F61 + 1145 72643A20 + 1145 202000 + 1146 010b 00 .space 1 + 1147 .LC16: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 22 + + + 1148 010c 53542053 .ascii "ST STM32L-Discovery\000" + 1148 544D3332 + 1148 4C2D4469 + 1148 73636F76 + 1148 65727900 + 1149 .LC17: + 1150 0120 2A2A2A20 .ascii "*** System Clock: \000" + 1150 53797374 + 1150 656D2043 + 1150 6C6F636B + 1150 3A2000 + 1151 0133 00 .space 1 + 1152 .LC18: + 1153 0134 2A2A2A20 .ascii "*** Iterations: \000" + 1153 49746572 + 1153 6174696F + 1153 6E733A20 + 1153 202000 + 1154 0147 00 .space 1 + 1155 .LC19: + 1156 0148 2A2A2A20 .ascii "*** Randomize: \000" + 1156 52616E64 + 1156 6F6D697A + 1156 653A2020 + 1156 202000 + 1157 015b 00 .space 1 + 1158 .LC20: + 1159 015c 2A2A2A20 .ascii "*** Threads: \000" + 1159 54687265 + 1159 6164733A + 1159 20202020 + 1159 202000 + 1160 016f 00 .space 1 + 1161 .LC21: + 1162 0170 2A2A2A20 .ascii "*** Mailbox size: \000" + 1162 4D61696C + 1162 626F7820 + 1162 73697A65 + 1162 3A2000 + 1163 0183 00 .space 1 + 1164 .LC22: + 1165 0184 53617475 .ascii "Saturated at \000" + 1165 72617465 + 1165 64206174 + 1165 2000 + 1166 0192 0000 .space 2 + 1167 .LC23: + 1168 0194 20755300 .ascii " uS\000" + 1169 .LC24: + 1170 0198 49746572 .ascii "Iteration \000" + 1170 6174696F + 1170 6E2000 + 1171 01a3 00 .space 1 + 1172 .LC25: + 1173 01a4 576F7273 .ascii "Worst case at \000" + 1173 74206361 + 1173 73652061 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 23 + + + 1173 742000 + 1174 01b3 00 .space 1 + 1175 .LC26: + 1176 01b4 54657374 .ascii "Test Complete\000" + 1176 20436F6D + 1176 706C6574 + 1176 6500 + 1177 01c2 0000 .section .bss.mb,"aw",%nobits + 1178 .align 2 + 1179 .set .LANCHOR0,. + 0 + 1180 .type mb, %object + 1181 .size mb, 160 + 1182 mb: + 1183 0000 00000000 .space 160 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1184 .section .bss.b,"aw",%nobits + 1185 .align 2 + 1186 .set .LANCHOR6,. + 0 + 1187 .type b, %object + 1188 .size b, 64 + 1189 b: + 1190 0000 00000000 .space 64 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1191 .section .bss.x.3441,"aw",%nobits + 1192 .align 2 + 1193 .set .LANCHOR2,. + 0 + 1194 .type x.3441, %object + 1195 .size x.3441, 4 + 1196 x.3441: + 1197 0000 00000000 .space 4 + 1198 .section .bss.cnt.3442,"aw",%nobits + 1199 .align 2 + 1200 .set .LANCHOR3,. + 0 + 1201 .type cnt.3442, %object + 1202 .size cnt.3442, 4 + 1203 cnt.3442: + 1204 0000 00000000 .space 4 + 1205 .text + 1206 .Letext0: + 1207 .file 2 "c:\\programmi\\yagarto\\bin\\../lib/gcc/arm-none-eabi/4.6.0/include/stddef.h" + 1208 .file 3 "c:/programmi/yagarto/lib/gcc/../../arm-none-eabi/sys-include/stdint.h" + 1209 .file 4 "../../../os/ports/GCC/ARMCMx/chtypes.h" + 1210 .file 5 "../../../os/kernel/include/chlists.h" + 1211 .file 6 "../../../os/kernel/include/chthreads.h" + 1212 .file 7 "../../../os/ports/GCC/ARMCMx/chcore_v7m.h" + 1213 .file 8 "../../../os/ports/GCC/ARMCMx/chcore.h" + 1214 .file 9 "../../../os/kernel/include/chschd.h" + 1215 .file 10 "../../../os/kernel/include/chsem.h" + 1216 .file 11 "../../../os/kernel/include/chmtx.h" + 1217 .file 12 "../../../os/kernel/include/chevents.h" + 1218 .file 13 "../../../os/kernel/include/chmboxes.h" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 24 + + + 1219 .file 14 "../../../os/kernel/include/chqueues.h" + 1220 .file 15 "../../../os/kernel/include/chioch.h" + 1221 .file 16 "../../../os/hal/platforms/STM32L1xx/stm32l1xx.h" + 1222 .file 17 "../../../os/hal/platforms/STM32/GPIOv2/pal_lld.h" + 1223 .file 18 "../../../os/hal/include/gpt.h" + 1224 .file 19 "../../../os/hal/platforms/STM32/gpt_lld.h" + 1225 .file 20 "../../../os/hal/include/serial.h" + 1226 .file 21 "../../../os/ports/common/ARMCMx/CMSIS/include/core_cm3.h" + 1227 .file 22 "../../../os/hal/platforms/STM32/serial_lld.h" + 1228 .section .debug_info,"",%progbits + 1229 .Ldebug_info0: + 1230 0000 1F130000 .4byte 0x131f + 1231 0004 0200 .2byte 0x2 + 1232 0006 00000000 .4byte .Ldebug_abbrev0 + 1233 000a 04 .byte 0x4 + 1234 000b 01 .uleb128 0x1 + 1235 000c 15000000 .4byte .LASF191 + 1236 0010 01 .byte 0x1 + 1237 0011 ED030000 .4byte .LASF192 + 1238 0015 80040000 .4byte .LASF193 + 1239 0019 00000000 .4byte 0 + 1240 001d 00000000 .4byte 0 + 1241 0021 50000000 .4byte .Ldebug_ranges0+0x50 + 1242 0025 00000000 .4byte .Ldebug_line0 + 1243 0029 02 .uleb128 0x2 + 1244 002a 51020000 .4byte .LASF10 + 1245 002e 02 .byte 0x2 + 1246 002f D4 .byte 0xd4 + 1247 0030 34000000 .4byte 0x34 + 1248 0034 03 .uleb128 0x3 + 1249 0035 04 .byte 0x4 + 1250 0036 07 .byte 0x7 + 1251 0037 88020000 .4byte .LASF0 + 1252 003b 03 .uleb128 0x3 + 1253 003c 01 .byte 0x1 + 1254 003d 06 .byte 0x6 + 1255 003e 07010000 .4byte .LASF1 + 1256 0042 03 .uleb128 0x3 + 1257 0043 01 .byte 0x1 + 1258 0044 08 .byte 0x8 + 1259 0045 CF040000 .4byte .LASF2 + 1260 0049 03 .uleb128 0x3 + 1261 004a 02 .byte 0x2 + 1262 004b 05 .byte 0x5 + 1263 004c 0F050000 .4byte .LASF3 + 1264 0050 03 .uleb128 0x3 + 1265 0051 02 .byte 0x2 + 1266 0052 07 .byte 0x7 + 1267 0053 12020000 .4byte .LASF4 + 1268 0057 04 .uleb128 0x4 + 1269 0058 04 .byte 0x4 + 1270 0059 05 .byte 0x5 + 1271 005a 696E7400 .ascii "int\000" + 1272 005e 03 .uleb128 0x3 + 1273 005f 08 .byte 0x8 + 1274 0060 05 .byte 0x5 + 1275 0061 F9000000 .4byte .LASF5 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 25 + + + 1276 0065 03 .uleb128 0x3 + 1277 0066 08 .byte 0x8 + 1278 0067 07 .byte 0x7 + 1279 0068 86000000 .4byte .LASF6 + 1280 006c 03 .uleb128 0x3 + 1281 006d 04 .byte 0x4 + 1282 006e 05 .byte 0x5 + 1283 006f A4010000 .4byte .LASF7 + 1284 0073 05 .uleb128 0x5 + 1285 0074 04 .byte 0x4 + 1286 0075 03 .uleb128 0x3 + 1287 0076 04 .byte 0x4 + 1288 0077 07 .byte 0x7 + 1289 0078 B1050000 .4byte .LASF8 + 1290 007c 06 .uleb128 0x6 + 1291 007d 04 .byte 0x4 + 1292 007e 82000000 .4byte 0x82 + 1293 0082 03 .uleb128 0x3 + 1294 0083 01 .byte 0x1 + 1295 0084 08 .byte 0x8 + 1296 0085 D2050000 .4byte .LASF9 + 1297 0089 06 .uleb128 0x6 + 1298 008a 04 .byte 0x4 + 1299 008b 8F000000 .4byte 0x8f + 1300 008f 07 .uleb128 0x7 + 1301 0090 82000000 .4byte 0x82 + 1302 0094 02 .uleb128 0x2 + 1303 0095 A6060000 .4byte .LASF11 + 1304 0099 03 .byte 0x3 + 1305 009a 2A .byte 0x2a + 1306 009b 42000000 .4byte 0x42 + 1307 009f 02 .uleb128 0x2 + 1308 00a0 95020000 .4byte .LASF12 + 1309 00a4 03 .byte 0x3 + 1310 00a5 36 .byte 0x36 + 1311 00a6 50000000 .4byte 0x50 + 1312 00aa 02 .uleb128 0x2 + 1313 00ab C7040000 .4byte .LASF13 + 1314 00af 03 .byte 0x3 + 1315 00b0 4F .byte 0x4f + 1316 00b1 6C000000 .4byte 0x6c + 1317 00b5 02 .uleb128 0x2 + 1318 00b6 75050000 .4byte .LASF14 + 1319 00ba 03 .byte 0x3 + 1320 00bb 50 .byte 0x50 + 1321 00bc 75000000 .4byte 0x75 + 1322 00c0 02 .uleb128 0x2 + 1323 00c1 0C000000 .4byte .LASF15 + 1324 00c5 03 .byte 0x3 + 1325 00c6 78 .byte 0x78 + 1326 00c7 65000000 .4byte 0x65 + 1327 00cb 02 .uleb128 0x2 + 1328 00cc 78000000 .4byte .LASF16 + 1329 00d0 03 .byte 0x3 + 1330 00d1 A6 .byte 0xa6 + 1331 00d2 34000000 .4byte 0x34 + 1332 00d6 02 .uleb128 0x2 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 26 + + + 1333 00d7 1D010000 .4byte .LASF17 + 1334 00db 04 .byte 0x4 + 1335 00dc 27 .byte 0x27 + 1336 00dd AA000000 .4byte 0xaa + 1337 00e1 02 .uleb128 0x2 + 1338 00e2 C9060000 .4byte .LASF18 + 1339 00e6 04 .byte 0x4 + 1340 00e7 28 .byte 0x28 + 1341 00e8 94000000 .4byte 0x94 + 1342 00ec 02 .uleb128 0x2 + 1343 00ed BE010000 .4byte .LASF19 + 1344 00f1 04 .byte 0x4 + 1345 00f2 29 .byte 0x29 + 1346 00f3 94000000 .4byte 0x94 + 1347 00f7 02 .uleb128 0x2 + 1348 00f8 1B040000 .4byte .LASF20 + 1349 00fc 04 .byte 0x4 + 1350 00fd 2A .byte 0x2a + 1351 00fe 94000000 .4byte 0x94 + 1352 0102 02 .uleb128 0x2 + 1353 0103 70040000 .4byte .LASF21 + 1354 0107 04 .byte 0x4 + 1355 0108 2B .byte 0x2b + 1356 0109 B5000000 .4byte 0xb5 + 1357 010d 02 .uleb128 0x2 + 1358 010e 0C030000 .4byte .LASF22 + 1359 0112 04 .byte 0x4 + 1360 0113 2C .byte 0x2c + 1361 0114 AA000000 .4byte 0xaa + 1362 0118 02 .uleb128 0x2 + 1363 0119 4A030000 .4byte .LASF23 + 1364 011d 04 .byte 0x4 + 1365 011e 2E .byte 0x2e + 1366 011f B5000000 .4byte 0xb5 + 1367 0123 02 .uleb128 0x2 + 1368 0124 16060000 .4byte .LASF24 + 1369 0128 04 .byte 0x4 + 1370 0129 2F .byte 0x2f + 1371 012a B5000000 .4byte 0xb5 + 1372 012e 02 .uleb128 0x2 + 1373 012f AC030000 .4byte .LASF25 + 1374 0133 04 .byte 0x4 + 1375 0134 30 .byte 0x30 + 1376 0135 AA000000 .4byte 0xaa + 1377 0139 02 .uleb128 0x2 + 1378 013a 46050000 .4byte .LASF26 + 1379 013e 05 .byte 0x5 + 1380 013f 23 .byte 0x23 + 1381 0140 44010000 .4byte 0x144 + 1382 0144 08 .uleb128 0x8 + 1383 0145 46050000 .4byte .LASF26 + 1384 0149 48 .byte 0x48 + 1385 014a 06 .byte 0x6 + 1386 014b 4D .byte 0x4d + 1387 014c 5B020000 .4byte 0x25b + 1388 0150 09 .uleb128 0x9 + 1389 0151 27050000 .4byte .LASF27 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 27 + + + 1390 0155 06 .byte 0x6 + 1391 0156 4E .byte 0x4e + 1392 0157 80020000 .4byte 0x280 + 1393 015b 02 .byte 0x2 + 1394 015c 23 .byte 0x23 + 1395 015d 00 .uleb128 0 + 1396 015e 09 .uleb128 0x9 + 1397 015f 55040000 .4byte .LASF28 + 1398 0163 06 .byte 0x6 + 1399 0164 50 .byte 0x50 + 1400 0165 80020000 .4byte 0x280 + 1401 0169 02 .byte 0x2 + 1402 016a 23 .byte 0x23 + 1403 016b 04 .uleb128 0x4 + 1404 016c 09 .uleb128 0x9 + 1405 016d E0000000 .4byte .LASF29 + 1406 0171 06 .byte 0x6 + 1407 0172 52 .byte 0x52 + 1408 0173 02010000 .4byte 0x102 + 1409 0177 02 .byte 0x2 + 1410 0178 23 .byte 0x23 + 1411 0179 08 .uleb128 0x8 + 1412 017a 09 .uleb128 0x9 + 1413 017b 02070000 .4byte .LASF30 + 1414 017f 06 .byte 0x6 + 1415 0180 53 .byte 0x53 + 1416 0181 52030000 .4byte 0x352 + 1417 0185 02 .byte 0x2 + 1418 0186 23 .byte 0x23 + 1419 0187 0C .uleb128 0xc + 1420 0188 09 .uleb128 0x9 + 1421 0189 E6010000 .4byte .LASF31 + 1422 018d 06 .byte 0x6 + 1423 018e 55 .byte 0x55 + 1424 018f 80020000 .4byte 0x280 + 1425 0193 02 .byte 0x2 + 1426 0194 23 .byte 0x23 + 1427 0195 10 .uleb128 0x10 + 1428 0196 09 .uleb128 0x9 + 1429 0197 C2030000 .4byte .LASF32 + 1430 019b 06 .byte 0x6 + 1431 019c 56 .byte 0x56 + 1432 019d 80020000 .4byte 0x280 + 1433 01a1 02 .byte 0x2 + 1434 01a2 23 .byte 0x23 + 1435 01a3 14 .uleb128 0x14 + 1436 01a4 09 .uleb128 0x9 + 1437 01a5 2B060000 .4byte .LASF33 + 1438 01a9 06 .byte 0x6 + 1439 01aa 5D .byte 0x5d + 1440 01ab 89000000 .4byte 0x89 + 1441 01af 02 .byte 0x2 + 1442 01b0 23 .byte 0x23 + 1443 01b1 18 .uleb128 0x18 + 1444 01b2 09 .uleb128 0x9 + 1445 01b3 FD040000 .4byte .LASF34 + 1446 01b7 06 .byte 0x6 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 28 + + + 1447 01b8 68 .byte 0x68 + 1448 01b9 EC000000 .4byte 0xec + 1449 01bd 02 .byte 0x2 + 1450 01be 23 .byte 0x23 + 1451 01bf 1C .uleb128 0x1c + 1452 01c0 09 .uleb128 0x9 + 1453 01c1 2E050000 .4byte .LASF35 + 1454 01c5 06 .byte 0x6 + 1455 01c6 6C .byte 0x6c + 1456 01c7 E1000000 .4byte 0xe1 + 1457 01cb 02 .byte 0x2 + 1458 01cc 23 .byte 0x23 + 1459 01cd 1D .uleb128 0x1d + 1460 01ce 09 .uleb128 0x9 + 1461 01cf C7010000 .4byte .LASF36 + 1462 01d3 06 .byte 0x6 + 1463 01d4 71 .byte 0x71 + 1464 01d5 F7000000 .4byte 0xf7 + 1465 01d9 02 .byte 0x2 + 1466 01da 23 .byte 0x23 + 1467 01db 1E .uleb128 0x1e + 1468 01dc 09 .uleb128 0x9 + 1469 01dd DF010000 .4byte .LASF37 + 1470 01e1 06 .byte 0x6 + 1471 01e2 78 .byte 0x78 + 1472 01e3 73030000 .4byte 0x373 + 1473 01e7 02 .byte 0x2 + 1474 01e8 23 .byte 0x23 + 1475 01e9 20 .uleb128 0x20 + 1476 01ea 0A .uleb128 0xa + 1477 01eb 705F7500 .ascii "p_u\000" + 1478 01ef 06 .byte 0x6 + 1479 01f0 9D .byte 0x9d + 1480 01f1 46050000 .4byte 0x546 + 1481 01f5 02 .byte 0x2 + 1482 01f6 23 .byte 0x23 + 1483 01f7 24 .uleb128 0x24 + 1484 01f8 09 .uleb128 0x9 + 1485 01f9 08070000 .4byte .LASF38 + 1486 01fd 06 .byte 0x6 + 1487 01fe A2 .byte 0xa2 + 1488 01ff A8020000 .4byte 0x2a8 + 1489 0203 02 .byte 0x2 + 1490 0204 23 .byte 0x23 + 1491 0205 28 .uleb128 0x28 + 1492 0206 09 .uleb128 0x9 + 1493 0207 B5020000 .4byte .LASF39 + 1494 020b 06 .byte 0x6 + 1495 020c A8 .byte 0xa8 + 1496 020d 86020000 .4byte 0x286 + 1497 0211 02 .byte 0x2 + 1498 0212 23 .byte 0x23 + 1499 0213 2C .uleb128 0x2c + 1500 0214 09 .uleb128 0x9 + 1501 0215 E3050000 .4byte .LASF40 + 1502 0219 06 .byte 0x6 + 1503 021a AC .byte 0xac + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 29 + + + 1504 021b 0D010000 .4byte 0x10d + 1505 021f 02 .byte 0x2 + 1506 0220 23 .byte 0x23 + 1507 0221 34 .uleb128 0x34 + 1508 0222 09 .uleb128 0x9 + 1509 0223 4D050000 .4byte .LASF41 + 1510 0227 06 .byte 0x6 + 1511 0228 B2 .byte 0xb2 + 1512 0229 18010000 .4byte 0x118 + 1513 022d 02 .byte 0x2 + 1514 022e 23 .byte 0x23 + 1515 022f 38 .uleb128 0x38 + 1516 0230 09 .uleb128 0x9 + 1517 0231 05050000 .4byte .LASF42 + 1518 0235 06 .byte 0x6 + 1519 0236 B9 .byte 0xb9 + 1520 0237 7B050000 .4byte 0x57b + 1521 023b 02 .byte 0x2 + 1522 023c 23 .byte 0x23 + 1523 023d 3C .uleb128 0x3c + 1524 023e 09 .uleb128 0x9 + 1525 023f 20060000 .4byte .LASF43 + 1526 0243 06 .byte 0x6 + 1527 0244 BD .byte 0xbd + 1528 0245 02010000 .4byte 0x102 + 1529 0249 02 .byte 0x2 + 1530 024a 23 .byte 0x23 + 1531 024b 40 .uleb128 0x40 + 1532 024c 09 .uleb128 0x9 + 1533 024d 04030000 .4byte .LASF44 + 1534 0251 06 .byte 0x6 + 1535 0252 C3 .byte 0xc3 + 1536 0253 73000000 .4byte 0x73 + 1537 0257 02 .byte 0x2 + 1538 0258 23 .byte 0x23 + 1539 0259 44 .uleb128 0x44 + 1540 025a 00 .byte 0 + 1541 025b 0B .uleb128 0xb + 1542 025c 08 .byte 0x8 + 1543 025d 05 .byte 0x5 + 1544 025e 5A .byte 0x5a + 1545 025f 80020000 .4byte 0x280 + 1546 0263 09 .uleb128 0x9 + 1547 0264 27050000 .4byte .LASF27 + 1548 0268 05 .byte 0x5 + 1549 0269 5B .byte 0x5b + 1550 026a 80020000 .4byte 0x280 + 1551 026e 02 .byte 0x2 + 1552 026f 23 .byte 0x23 + 1553 0270 00 .uleb128 0 + 1554 0271 09 .uleb128 0x9 + 1555 0272 55040000 .4byte .LASF28 + 1556 0276 05 .byte 0x5 + 1557 0277 5D .byte 0x5d + 1558 0278 80020000 .4byte 0x280 + 1559 027c 02 .byte 0x2 + 1560 027d 23 .byte 0x23 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 30 + + + 1561 027e 04 .uleb128 0x4 + 1562 027f 00 .byte 0 + 1563 0280 06 .uleb128 0x6 + 1564 0281 04 .byte 0x4 + 1565 0282 39010000 .4byte 0x139 + 1566 0286 02 .uleb128 0x2 + 1567 0287 D0030000 .4byte .LASF45 + 1568 028b 05 .byte 0x5 + 1569 028c 5F .byte 0x5f + 1570 028d 5B020000 .4byte 0x25b + 1571 0291 0B .uleb128 0xb + 1572 0292 04 .byte 0x4 + 1573 0293 05 .byte 0x5 + 1574 0294 64 .byte 0x64 + 1575 0295 A8020000 .4byte 0x2a8 + 1576 0299 09 .uleb128 0x9 + 1577 029a 27050000 .4byte .LASF27 + 1578 029e 05 .byte 0x5 + 1579 029f 66 .byte 0x66 + 1580 02a0 80020000 .4byte 0x280 + 1581 02a4 02 .byte 0x2 + 1582 02a5 23 .byte 0x23 + 1583 02a6 00 .uleb128 0 + 1584 02a7 00 .byte 0 + 1585 02a8 02 .uleb128 0x2 + 1586 02a9 3E030000 .4byte .LASF46 + 1587 02ad 05 .byte 0x5 + 1588 02ae 69 .byte 0x69 + 1589 02af 91020000 .4byte 0x291 + 1590 02b3 02 .uleb128 0x2 + 1591 02b4 48020000 .4byte .LASF47 + 1592 02b8 07 .byte 0x7 + 1593 02b9 88 .byte 0x88 + 1594 02ba 73000000 .4byte 0x73 + 1595 02be 08 .uleb128 0x8 + 1596 02bf 57060000 .4byte .LASF48 + 1597 02c3 24 .byte 0x24 + 1598 02c4 07 .byte 0x7 + 1599 02c5 96 .byte 0x96 + 1600 02c6 42030000 .4byte 0x342 + 1601 02ca 0A .uleb128 0xa + 1602 02cb 723400 .ascii "r4\000" + 1603 02ce 07 .byte 0x7 + 1604 02cf 97 .byte 0x97 + 1605 02d0 B3020000 .4byte 0x2b3 + 1606 02d4 02 .byte 0x2 + 1607 02d5 23 .byte 0x23 + 1608 02d6 00 .uleb128 0 + 1609 02d7 0A .uleb128 0xa + 1610 02d8 723500 .ascii "r5\000" + 1611 02db 07 .byte 0x7 + 1612 02dc 98 .byte 0x98 + 1613 02dd B3020000 .4byte 0x2b3 + 1614 02e1 02 .byte 0x2 + 1615 02e2 23 .byte 0x23 + 1616 02e3 04 .uleb128 0x4 + 1617 02e4 0A .uleb128 0xa + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 31 + + + 1618 02e5 723600 .ascii "r6\000" + 1619 02e8 07 .byte 0x7 + 1620 02e9 99 .byte 0x99 + 1621 02ea B3020000 .4byte 0x2b3 + 1622 02ee 02 .byte 0x2 + 1623 02ef 23 .byte 0x23 + 1624 02f0 08 .uleb128 0x8 + 1625 02f1 0A .uleb128 0xa + 1626 02f2 723700 .ascii "r7\000" + 1627 02f5 07 .byte 0x7 + 1628 02f6 9A .byte 0x9a + 1629 02f7 B3020000 .4byte 0x2b3 + 1630 02fb 02 .byte 0x2 + 1631 02fc 23 .byte 0x23 + 1632 02fd 0C .uleb128 0xc + 1633 02fe 0A .uleb128 0xa + 1634 02ff 723800 .ascii "r8\000" + 1635 0302 07 .byte 0x7 + 1636 0303 9B .byte 0x9b + 1637 0304 B3020000 .4byte 0x2b3 + 1638 0308 02 .byte 0x2 + 1639 0309 23 .byte 0x23 + 1640 030a 10 .uleb128 0x10 + 1641 030b 0A .uleb128 0xa + 1642 030c 723900 .ascii "r9\000" + 1643 030f 07 .byte 0x7 + 1644 0310 9C .byte 0x9c + 1645 0311 B3020000 .4byte 0x2b3 + 1646 0315 02 .byte 0x2 + 1647 0316 23 .byte 0x23 + 1648 0317 14 .uleb128 0x14 + 1649 0318 0A .uleb128 0xa + 1650 0319 72313000 .ascii "r10\000" + 1651 031d 07 .byte 0x7 + 1652 031e 9D .byte 0x9d + 1653 031f B3020000 .4byte 0x2b3 + 1654 0323 02 .byte 0x2 + 1655 0324 23 .byte 0x23 + 1656 0325 18 .uleb128 0x18 + 1657 0326 0A .uleb128 0xa + 1658 0327 72313100 .ascii "r11\000" + 1659 032b 07 .byte 0x7 + 1660 032c 9E .byte 0x9e + 1661 032d B3020000 .4byte 0x2b3 + 1662 0331 02 .byte 0x2 + 1663 0332 23 .byte 0x23 + 1664 0333 1C .uleb128 0x1c + 1665 0334 0A .uleb128 0xa + 1666 0335 6C7200 .ascii "lr\000" + 1667 0338 07 .byte 0x7 + 1668 0339 9F .byte 0x9f + 1669 033a B3020000 .4byte 0x2b3 + 1670 033e 02 .byte 0x2 + 1671 033f 23 .byte 0x23 + 1672 0340 20 .uleb128 0x20 + 1673 0341 00 .byte 0 + 1674 0342 0C .uleb128 0xc + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 32 + + + 1675 0343 B5000000 .4byte 0xb5 + 1676 0347 02 .uleb128 0x2 + 1677 0348 78030000 .4byte .LASF49 + 1678 034c 08 .byte 0x8 + 1679 034d C7 .byte 0xc7 + 1680 034e C0000000 .4byte 0xc0 + 1681 0352 08 .uleb128 0x8 + 1682 0353 45060000 .4byte .LASF50 + 1683 0357 04 .byte 0x4 + 1684 0358 08 .byte 0x8 + 1685 0359 E9 .byte 0xe9 + 1686 035a 6D030000 .4byte 0x36d + 1687 035e 0A .uleb128 0xa + 1688 035f 72313300 .ascii "r13\000" + 1689 0363 08 .byte 0x8 + 1690 0364 EA .byte 0xea + 1691 0365 6D030000 .4byte 0x36d + 1692 0369 02 .byte 0x2 + 1693 036a 23 .byte 0x23 + 1694 036b 00 .uleb128 0 + 1695 036c 00 .byte 0 + 1696 036d 06 .uleb128 0x6 + 1697 036e 04 .byte 0x4 + 1698 036f BE020000 .4byte 0x2be + 1699 0373 0C .uleb128 0xc + 1700 0374 23010000 .4byte 0x123 + 1701 0378 0B .uleb128 0xb + 1702 0379 20 .byte 0x20 + 1703 037a 09 .byte 0x9 + 1704 037b 57 .byte 0x57 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4075 018b 0B .uleb128 0xb + 4076 018c 49 .uleb128 0x49 + 4077 018d 13 .uleb128 0x13 + 4078 018e 02 .uleb128 0x2 + 4079 018f 0A .uleb128 0xa + 4080 0190 00 .byte 0 + 4081 0191 00 .byte 0 + 4082 0192 21 .uleb128 0x21 + 4083 0193 0B .uleb128 0xb + 4084 0194 01 .byte 0x1 + 4085 0195 11 .uleb128 0x11 + 4086 0196 01 .uleb128 0x1 + 4087 0197 12 .uleb128 0x12 + 4088 0198 01 .uleb128 0x1 + 4089 0199 01 .uleb128 0x1 + 4090 019a 13 .uleb128 0x13 + 4091 019b 00 .byte 0 + 4092 019c 00 .byte 0 + 4093 019d 22 .uleb128 0x22 + 4094 019e 34 .uleb128 0x34 + 4095 019f 00 .byte 0 + 4096 01a0 03 .uleb128 0x3 + 4097 01a1 08 .uleb128 0x8 + 4098 01a2 3A .uleb128 0x3a + 4099 01a3 0B .uleb128 0xb + 4100 01a4 3B .uleb128 0x3b + 4101 01a5 0B .uleb128 0xb + 4102 01a6 49 .uleb128 0x49 + 4103 01a7 13 .uleb128 0x13 + 4104 01a8 02 .uleb128 0x2 + 4105 01a9 06 .uleb128 0x6 + 4106 01aa 00 .byte 0 + 4107 01ab 00 .byte 0 + 4108 01ac 23 .uleb128 0x23 + 4109 01ad 0B .uleb128 0xb + 4110 01ae 01 .byte 0x1 + 4111 01af 11 .uleb128 0x11 + 4112 01b0 01 .uleb128 0x1 + 4113 01b1 12 .uleb128 0x12 + 4114 01b2 01 .uleb128 0x1 + 4115 01b3 00 .byte 0 + 4116 01b4 00 .byte 0 + 4117 01b5 24 .uleb128 0x24 + 4118 01b6 2E .uleb128 0x2e + 4119 01b7 01 .byte 0x1 + 4120 01b8 03 .uleb128 0x3 + 4121 01b9 0E .uleb128 0xe + 4122 01ba 3A .uleb128 0x3a + 4123 01bb 0B .uleb128 0xb + 4124 01bc 3B .uleb128 0x3b + 4125 01bd 0B .uleb128 0xb + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 75 + + + 4126 01be 27 .uleb128 0x27 + 4127 01bf 0C .uleb128 0xc + 4128 01c0 49 .uleb128 0x49 + 4129 01c1 13 .uleb128 0x13 + 4130 01c2 11 .uleb128 0x11 + 4131 01c3 01 .uleb128 0x1 + 4132 01c4 12 .uleb128 0x12 + 4133 01c5 01 .uleb128 0x1 + 4134 01c6 40 .uleb128 0x40 + 4135 01c7 06 .uleb128 0x6 + 4136 01c8 01 .uleb128 0x1 + 4137 01c9 13 .uleb128 0x13 + 4138 01ca 00 .byte 0 + 4139 01cb 00 .byte 0 + 4140 01cc 25 .uleb128 0x25 + 4141 01cd 34 .uleb128 0x34 + 4142 01ce 00 .byte 0 + 4143 01cf 03 .uleb128 0x3 + 4144 01d0 0E .uleb128 0xe + 4145 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0 + 4182 01f6 31 .uleb128 0x31 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 76 + + + 4183 01f7 13 .uleb128 0x13 + 4184 01f8 02 .uleb128 0x2 + 4185 01f9 0A .uleb128 0xa + 4186 01fa 00 .byte 0 + 4187 01fb 00 .byte 0 + 4188 01fc 29 .uleb128 0x29 + 4189 01fd 34 .uleb128 0x34 + 4190 01fe 00 .byte 0 + 4191 01ff 31 .uleb128 0x31 + 4192 0200 13 .uleb128 0x13 + 4193 0201 02 .uleb128 0x2 + 4194 0202 06 .uleb128 0x6 + 4195 0203 00 .byte 0 + 4196 0204 00 .byte 0 + 4197 0205 2A .uleb128 0x2a + 4198 0206 1D .uleb128 0x1d + 4199 0207 01 .byte 0x1 + 4200 0208 31 .uleb128 0x31 + 4201 0209 13 .uleb128 0x13 + 4202 020a 52 .uleb128 0x52 + 4203 020b 01 .uleb128 0x1 + 4204 020c 55 .uleb128 0x55 + 4205 020d 06 .uleb128 0x6 + 4206 020e 58 .uleb128 0x58 + 4207 020f 0B .uleb128 0xb + 4208 0210 59 .uleb128 0x59 + 4209 0211 0B .uleb128 0xb + 4210 0212 00 .byte 0 + 4211 0213 00 .byte 0 + 4212 0214 2B .uleb128 0x2b + 4213 0215 0B .uleb128 0xb + 4214 0216 01 .byte 0x1 + 4215 0217 55 .uleb128 0x55 + 4216 0218 06 .uleb128 0x6 + 4217 0219 00 .byte 0 + 4218 021a 00 .byte 0 + 4219 021b 2C .uleb128 0x2c + 4220 021c 34 .uleb128 0x34 + 4221 021d 00 .byte 0 + 4222 021e 31 .uleb128 0x31 + 4223 021f 13 .uleb128 0x13 + 4224 0220 00 .byte 0 + 4225 0221 00 .byte 0 + 4226 0222 2D .uleb128 0x2d + 4227 0223 05 .uleb128 0x5 + 4228 0224 00 .byte 0 + 4229 0225 31 .uleb128 0x31 + 4230 0226 13 .uleb128 0x13 + 4231 0227 00 .byte 0 + 4232 0228 00 .byte 0 + 4233 0229 2E .uleb128 0x2e + 4234 022a 2E .uleb128 0x2e + 4235 022b 01 .byte 0x1 + 4236 022c 3F .uleb128 0x3f + 4237 022d 0C .uleb128 0xc + 4238 022e 03 .uleb128 0x3 + 4239 022f 0E .uleb128 0xe + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 77 + + + 4240 0230 3A .uleb128 0x3a + 4241 0231 0B .uleb128 0xb + 4242 0232 3B .uleb128 0x3b + 4243 0233 0B .uleb128 0xb + 4244 0234 27 .uleb128 0x27 + 4245 0235 0C .uleb128 0xc + 4246 0236 49 .uleb128 0x49 + 4247 0237 13 .uleb128 0x13 + 4248 0238 11 .uleb128 0x11 + 4249 0239 01 .uleb128 0x1 + 4250 023a 12 .uleb128 0x12 + 4251 023b 01 .uleb128 0x1 + 4252 023c 40 .uleb128 0x40 + 4253 023d 06 .uleb128 0x6 + 4254 023e 01 .uleb128 0x1 + 4255 023f 13 .uleb128 0x13 + 4256 0240 00 .byte 0 + 4257 0241 00 .byte 0 + 4258 0242 2F .uleb128 0x2f + 4259 0243 1D .uleb128 0x1d + 4260 0244 01 .byte 0x1 + 4261 0245 31 .uleb128 0x31 + 4262 0246 13 .uleb128 0x13 + 4263 0247 11 .uleb128 0x11 + 4264 0248 01 .uleb128 0x1 + 4265 0249 12 .uleb128 0x12 + 4266 024a 01 .uleb128 0x1 + 4267 024b 58 .uleb128 0x58 + 4268 024c 0B .uleb128 0xb + 4269 024d 59 .uleb128 0x59 + 4270 024e 0B .uleb128 0xb + 4271 024f 01 .uleb128 0x1 + 4272 0250 13 .uleb128 0x13 + 4273 0251 00 .byte 0 + 4274 0252 00 .byte 0 + 4275 0253 30 .uleb128 0x30 + 4276 0254 1D .uleb128 0x1d + 4277 0255 01 .byte 0x1 + 4278 0256 31 .uleb128 0x31 + 4279 0257 13 .uleb128 0x13 + 4280 0258 11 .uleb128 0x11 + 4281 0259 01 .uleb128 0x1 + 4282 025a 12 .uleb128 0x12 + 4283 025b 01 .uleb128 0x1 + 4284 025c 58 .uleb128 0x58 + 4285 025d 0B .uleb128 0xb + 4286 025e 59 .uleb128 0x59 + 4287 025f 05 .uleb128 0x5 + 4288 0260 01 .uleb128 0x1 + 4289 0261 13 .uleb128 0x13 + 4290 0262 00 .byte 0 + 4291 0263 00 .byte 0 + 4292 0264 31 .uleb128 0x31 + 4293 0265 1D .uleb128 0x1d + 4294 0266 01 .byte 0x1 + 4295 0267 31 .uleb128 0x31 + 4296 0268 13 .uleb128 0x13 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 78 + + + 4297 0269 52 .uleb128 0x52 + 4298 026a 01 .uleb128 0x1 + 4299 026b 55 .uleb128 0x55 + 4300 026c 06 .uleb128 0x6 + 4301 026d 58 .uleb128 0x58 + 4302 026e 0B .uleb128 0xb + 4303 026f 59 .uleb128 0x59 + 4304 0270 05 .uleb128 0x5 + 4305 0271 01 .uleb128 0x1 + 4306 0272 13 .uleb128 0x13 + 4307 0273 00 .byte 0 + 4308 0274 00 .byte 0 + 4309 0275 32 .uleb128 0x32 + 4310 0276 1D .uleb128 0x1d + 4311 0277 01 .byte 0x1 + 4312 0278 31 .uleb128 0x31 + 4313 0279 13 .uleb128 0x13 + 4314 027a 11 .uleb128 0x11 + 4315 027b 01 .uleb128 0x1 + 4316 027c 12 .uleb128 0x12 + 4317 027d 01 .uleb128 0x1 + 4318 027e 58 .uleb128 0x58 + 4319 027f 0B .uleb128 0xb + 4320 0280 59 .uleb128 0x59 + 4321 0281 05 .uleb128 0x5 + 4322 0282 00 .byte 0 + 4323 0283 00 .byte 0 + 4324 0284 33 .uleb128 0x33 + 4325 0285 34 .uleb128 0x34 + 4326 0286 00 .byte 0 + 4327 0287 03 .uleb128 0x3 + 4328 0288 0E .uleb128 0xe + 4329 0289 3A .uleb128 0x3a + 4330 028a 0B .uleb128 0xb + 4331 028b 3B .uleb128 0x3b + 4332 028c 0B .uleb128 0xb + 4333 028d 49 .uleb128 0x49 + 4334 028e 13 .uleb128 0x13 + 4335 028f 3F .uleb128 0x3f + 4336 0290 0C .uleb128 0xc + 4337 0291 3C .uleb128 0x3c + 4338 0292 0C .uleb128 0xc + 4339 0293 00 .byte 0 + 4340 0294 00 .byte 0 + 4341 0295 34 .uleb128 0x34 + 4342 0296 34 .uleb128 0x34 + 4343 0297 00 .byte 0 + 4344 0298 03 .uleb128 0x3 + 4345 0299 0E .uleb128 0xe + 4346 029a 3A .uleb128 0x3a + 4347 029b 0B .uleb128 0xb + 4348 029c 3B .uleb128 0x3b + 4349 029d 05 .uleb128 0x5 + 4350 029e 49 .uleb128 0x49 + 4351 029f 13 .uleb128 0x13 + 4352 02a0 3F .uleb128 0x3f + 4353 02a1 0C .uleb128 0xc + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 79 + + + 4354 02a2 3C .uleb128 0x3c + 4355 02a3 0C .uleb128 0xc + 4356 02a4 00 .byte 0 + 4357 02a5 00 .byte 0 + 4358 02a6 35 .uleb128 0x35 + 4359 02a7 34 .uleb128 0x34 + 4360 02a8 00 .byte 0 + 4361 02a9 03 .uleb128 0x3 + 4362 02aa 08 .uleb128 0x8 + 4363 02ab 3A .uleb128 0x3a + 4364 02ac 0B .uleb128 0xb + 4365 02ad 3B .uleb128 0x3b + 4366 02ae 0B .uleb128 0xb + 4367 02af 49 .uleb128 0x49 + 4368 02b0 13 .uleb128 0x13 + 4369 02b1 3F .uleb128 0x3f + 4370 02b2 0C .uleb128 0xc + 4371 02b3 3C .uleb128 0x3c + 4372 02b4 0C .uleb128 0xc + 4373 02b5 00 .byte 0 + 4374 02b6 00 .byte 0 + 4375 02b7 36 .uleb128 0x36 + 4376 02b8 34 .uleb128 0x34 + 4377 02b9 00 .byte 0 + 4378 02ba 03 .uleb128 0x3 + 4379 02bb 0E .uleb128 0xe + 4380 02bc 3A .uleb128 0x3a + 4381 02bd 0B .uleb128 0xb + 4382 02be 3B .uleb128 0x3b + 4383 02bf 0B .uleb128 0xb + 4384 02c0 49 .uleb128 0x49 + 4385 02c1 13 .uleb128 0x13 + 4386 02c2 02 .uleb128 0x2 + 4387 02c3 0A .uleb128 0xa + 4388 02c4 00 .byte 0 + 4389 02c5 00 .byte 0 + 4390 02c6 00 .byte 0 + 4391 .section .debug_loc,"",%progbits + 4392 .Ldebug_loc0: + 4393 .LLST0: + 4394 0000 00000000 .4byte .LFB66 + 4395 0004 02000000 .4byte .LCFI0 + 4396 0008 0200 .2byte 0x2 + 4397 000a 7D .byte 0x7d + 4398 000b 00 .sleb128 0 + 4399 000c 02000000 .4byte .LCFI0 + 4400 0010 38000000 .4byte .LFE66 + 4401 0014 0200 .2byte 0x2 + 4402 0016 7D .byte 0x7d + 4403 0017 10 .sleb128 16 + 4404 0018 00000000 .4byte 0 + 4405 001c 00000000 .4byte 0 + 4406 .LLST1: + 4407 0020 00000000 .4byte .LVL0 + 4408 0024 0A000000 .4byte .LVL1 + 4409 0028 0100 .2byte 0x1 + 4410 002a 50 .byte 0x50 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 80 + + + 4411 002b 00000000 .4byte 0 + 4412 002f 00000000 .4byte 0 + 4413 .LLST2: + 4414 0033 00000000 .4byte .LFB64 + 4415 0037 02000000 .4byte .LCFI1 + 4416 003b 0200 .2byte 0x2 + 4417 003d 7D .byte 0x7d + 4418 003e 00 .sleb128 0 + 4419 003f 02000000 .4byte .LCFI1 + 4420 0043 28000000 .4byte .LFE64 + 4421 0047 0200 .2byte 0x2 + 4422 0049 7D .byte 0x7d + 4423 004a 08 .sleb128 8 + 4424 004b 00000000 .4byte 0 + 4425 004f 00000000 .4byte 0 + 4426 .LLST3: + 4427 0053 00000000 .4byte .LVL2 + 4428 0057 0A000000 .4byte .LVL5 + 4429 005b 0100 .2byte 0x1 + 4430 005d 50 .byte 0x50 + 4431 005e 00000000 .4byte 0 + 4432 0062 00000000 .4byte 0 + 4433 .LLST4: + 4434 0066 08000000 .4byte .LVL4 + 4435 006a 0F000000 .4byte .LVL6-1 + 4436 006e 0100 .2byte 0x1 + 4437 0070 53 .byte 0x53 + 4438 0071 00000000 .4byte 0 + 4439 0075 00000000 .4byte 0 + 4440 .LLST5: + 4441 0079 1E000000 .4byte .LVL8 + 4442 007d 28000000 .4byte .LFE64 + 4443 0081 0100 .2byte 0x1 + 4444 0083 53 .byte 0x53 + 4445 0084 00000000 .4byte 0 + 4446 0088 00000000 .4byte 0 + 4447 .LLST6: + 4448 008c 00000000 .4byte .LFB63 + 4449 0090 02000000 .4byte .LCFI2 + 4450 0094 0200 .2byte 0x2 + 4451 0096 7D .byte 0x7d + 4452 0097 00 .sleb128 0 + 4453 0098 02000000 .4byte .LCFI2 + 4454 009c 28000000 .4byte .LFE63 + 4455 00a0 0200 .2byte 0x2 + 4456 00a2 7D .byte 0x7d + 4457 00a3 08 .sleb128 8 + 4458 00a4 00000000 .4byte 0 + 4459 00a8 00000000 .4byte 0 + 4460 .LLST7: + 4461 00ac 00000000 .4byte .LVL9 + 4462 00b0 0A000000 .4byte .LVL12 + 4463 00b4 0100 .2byte 0x1 + 4464 00b6 50 .byte 0x50 + 4465 00b7 00000000 .4byte 0 + 4466 00bb 00000000 .4byte 0 + 4467 .LLST8: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 81 + + + 4468 00bf 08000000 .4byte .LVL11 + 4469 00c3 0F000000 .4byte .LVL13-1 + 4470 00c7 0100 .2byte 0x1 + 4471 00c9 53 .byte 0x53 + 4472 00ca 00000000 .4byte 0 + 4473 00ce 00000000 .4byte 0 + 4474 .LLST9: + 4475 00d2 1E000000 .4byte .LVL15 + 4476 00d6 28000000 .4byte .LFE63 + 4477 00da 0100 .2byte 0x1 + 4478 00dc 53 .byte 0x53 + 4479 00dd 00000000 .4byte 0 + 4480 00e1 00000000 .4byte 0 + 4481 .LLST10: + 4482 00e5 00000000 .4byte .LFB62 + 4483 00e9 04000000 .4byte .LCFI3 + 4484 00ed 0200 .2byte 0x2 + 4485 00ef 7D .byte 0x7d + 4486 00f0 00 .sleb128 0 + 4487 00f1 04000000 .4byte .LCFI3 + 4488 00f5 18000000 .4byte .LCFI4 + 4489 00f9 0200 .2byte 0x2 + 4490 00fb 7D .byte 0x7d + 4491 00fc 24 .sleb128 36 + 4492 00fd 18000000 .4byte .LCFI4 + 4493 0101 AC000000 .4byte .LFE62 + 4494 0105 0200 .2byte 0x2 + 4495 0107 7D .byte 0x7d + 4496 0108 30 .sleb128 48 + 4497 0109 00000000 .4byte 0 + 4498 010d 00000000 .4byte 0 + 4499 .LLST11: + 4500 0111 00000000 .4byte .LVL16 + 4501 0115 2A000000 .4byte .LVL17 + 4502 0119 0100 .2byte 0x1 + 4503 011b 50 .byte 0x50 + 4504 011c 2A000000 .4byte .LVL17 + 4505 0120 AC000000 .4byte .LFE62 + 4506 0124 0300 .2byte 0x3 + 4507 0126 79 .byte 0x79 + 4508 0127 01 .sleb128 1 + 4509 0128 9F .byte 0x9f + 4510 0129 00000000 .4byte 0 + 4511 012d 00000000 .4byte 0 + 4512 .LLST13: + 4513 0131 4E000000 .4byte .LVL21 + 4514 0135 54000000 .4byte .LVL22 + 4515 0139 0100 .2byte 0x1 + 4516 013b 53 .byte 0x53 + 4517 013c 76000000 .4byte .LVL23 + 4518 0140 7A000000 .4byte .LVL24 + 4519 0144 0100 .2byte 0x1 + 4520 0146 53 .byte 0x53 + 4521 0147 00000000 .4byte 0 + 4522 014b 00000000 .4byte 0 + 4523 .LLST14: + 4524 014f 36000000 .4byte .LVL19 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 82 + + + 4525 0153 3A000000 .4byte .LVL20 + 4526 0157 0300 .2byte 0x3 + 4527 0159 75 .byte 0x75 + 4528 015a 7F .sleb128 -1 + 4529 015b 9F .byte 0x9f + 4530 015c 00000000 .4byte 0 + 4531 0160 00000000 .4byte 0 + 4532 .LLST15: + 4533 0164 2A000000 .4byte .LVL17 + 4534 0168 2C000000 .4byte .LVL18 + 4535 016c 0100 .2byte 0x1 + 4536 016e 50 .byte 0x50 + 4537 016f 2C000000 .4byte .LVL18 + 4538 0173 AC000000 .4byte .LFE62 + 4539 0177 0200 .2byte 0x2 + 4540 0179 91 .byte 0x91 + 4541 017a 54 .sleb128 -44 + 4542 017b 00000000 .4byte 0 + 4543 017f 00000000 .4byte 0 + 4544 .LLST16: + 4545 0183 00000000 .4byte .LFB67 + 4546 0187 02000000 .4byte .LCFI5 + 4547 018b 0200 .2byte 0x2 + 4548 018d 7D .byte 0x7d + 4549 018e 00 .sleb128 0 + 4550 018f 02000000 .4byte .LCFI5 + 4551 0193 04000000 .4byte .LCFI6 + 4552 0197 0200 .2byte 0x2 + 4553 0199 7D .byte 0x7d + 4554 019a 10 .sleb128 16 + 4555 019b 04000000 .4byte .LCFI6 + 4556 019f 68000000 .4byte .LFE67 + 4557 01a3 0200 .2byte 0x2 + 4558 01a5 7D .byte 0x7d + 4559 01a6 20 .sleb128 32 + 4560 01a7 00000000 .4byte 0 + 4561 01ab 00000000 .4byte 0 + 4562 .LLST17: + 4563 01af 00000000 .4byte .LVL25 + 4564 01b3 14000000 .4byte .LVL26 + 4565 01b7 0100 .2byte 0x1 + 4566 01b9 50 .byte 0x50 + 4567 01ba 2C000000 .4byte .LVL27 + 4568 01be 3A000000 .4byte .LVL29 + 4569 01c2 0100 .2byte 0x1 + 4570 01c4 53 .byte 0x53 + 4571 01c5 52000000 .4byte .LVL30 + 4572 01c9 54000000 .4byte .LVL31 + 4573 01cd 0100 .2byte 0x1 + 4574 01cf 50 .byte 0x50 + 4575 01d0 00000000 .4byte 0 + 4576 01d4 00000000 .4byte 0 + 4577 .LLST18: + 4578 01d8 2C000000 .4byte .LVL27 + 4579 01dc 38000000 .4byte .LVL28 + 4580 01e0 0100 .2byte 0x1 + 4581 01e2 54 .byte 0x54 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 83 + + + 4582 01e3 38000000 .4byte .LVL28 + 4583 01e7 3A000000 .4byte .LVL29 + 4584 01eb 0300 .2byte 0x3 + 4585 01ed 74 .byte 0x74 + 4586 01ee 01 .sleb128 1 + 4587 01ef 9F .byte 0x9f + 4588 01f0 00000000 .4byte 0 + 4589 01f4 00000000 .4byte 0 + 4590 .LLST19: + 4591 01f8 00000000 .4byte .LFB68 + 4592 01fc 04000000 .4byte .LCFI7 + 4593 0200 0200 .2byte 0x2 + 4594 0202 7D .byte 0x7d + 4595 0203 00 .sleb128 0 + 4596 0204 04000000 .4byte .LCFI7 + 4597 0208 06000000 .4byte .LCFI8 + 4598 020c 0200 .2byte 0x2 + 4599 020e 7D .byte 0x7d + 4600 020f 20 .sleb128 32 + 4601 0210 06000000 .4byte .LCFI8 + 4602 0214 E4030000 .4byte .LFE68 + 4603 0218 0200 .2byte 0x2 + 4604 021a 7D .byte 0x7d + 4605 021b 30 .sleb128 48 + 4606 021c 00000000 .4byte 0 + 4607 0220 00000000 .4byte 0 + 4608 .LLST20: + 4609 0224 4A000000 .4byte .LVL32 + 4610 0228 52000000 .4byte .LVL33 + 4611 022c 0200 .2byte 0x2 + 4612 022e 30 .byte 0x30 + 4613 022f 9F .byte 0x9f + 4614 0230 74000000 .4byte .LVL34 + 4615 0234 8C000000 .4byte .LVL35 + 4616 0238 0100 .2byte 0x1 + 4617 023a 54 .byte 0x54 + 4618 023b 0E020000 .4byte .LVL58 + 4619 023f 1E020000 .4byte .LVL59 + 4620 0243 0200 .2byte 0x2 + 4621 0245 31 .byte 0x31 + 4622 0246 9F .byte 0x9f + 4623 0247 7A030000 .4byte .LVL72 + 4624 024b E4030000 .4byte .LFE68 + 4625 024f 0100 .2byte 0x1 + 4626 0251 59 .byte 0x59 + 4627 0252 00000000 .4byte 0 + 4628 0256 00000000 .4byte 0 + 4629 .LLST21: + 4630 025a 4E020000 .4byte .LVL61 + 4631 025e CC020000 .4byte .LVL62 + 4632 0262 0400 .2byte 0x4 + 4633 0264 0A .byte 0xa + 4634 0265 D007 .2byte 0x7d0 + 4635 0267 9F .byte 0x9f + 4636 0268 DE020000 .4byte .LVL64 + 4637 026c E2020000 .4byte .LVL65 + 4638 0270 0100 .2byte 0x1 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 84 + + + 4639 0272 56 .byte 0x56 + 4640 0273 2E030000 .4byte .LVL68 + 4641 0277 32030000 .4byte .LVL69 + 4642 027b 0100 .2byte 0x1 + 4643 027d 56 .byte 0x56 + 4644 027e 00000000 .4byte 0 + 4645 0282 00000000 .4byte 0 + 4646 .LLST22: + 4647 0286 4E020000 .4byte .LVL61 + 4648 028a CC020000 .4byte .LVL62 + 4649 028e 0200 .2byte 0x2 + 4650 0290 30 .byte 0x30 + 4651 0291 9F .byte 0x9f + 4652 0292 D4020000 .4byte .LVL63 + 4653 0296 E2020000 .4byte .LVL65 + 4654 029a 0100 .2byte 0x1 + 4655 029c 54 .byte 0x54 + 4656 029d 24030000 .4byte .LVL67 + 4657 02a1 32030000 .4byte .LVL69 + 4658 02a5 0100 .2byte 0x1 + 4659 02a7 54 .byte 0x54 + 4660 02a8 00000000 .4byte 0 + 4661 02ac 00000000 .4byte 0 + 4662 .LLST23: + 4663 02b0 0E020000 .4byte .LVL58 + 4664 02b4 1E020000 .4byte .LVL59 + 4665 02b8 0200 .2byte 0x2 + 4666 02ba 30 .byte 0x30 + 4667 02bb 9F .byte 0x9f + 4668 02bc 7A030000 .4byte .LVL72 + 4669 02c0 E4030000 .4byte .LFE68 + 4670 02c4 0100 .2byte 0x1 + 4671 02c6 5A .byte 0x5a + 4672 02c7 00000000 .4byte 0 + 4673 02cb 00000000 .4byte 0 + 4674 .LLST24: + 4675 02cf 94000000 .4byte .LVL36 + 4676 02d3 96000000 .4byte .LVL37 + 4677 02d7 0600 .2byte 0x6 + 4678 02d9 03 .byte 0x3 + 4679 02da 40000000 .4byte .LC5 + 4680 02de 9F .byte 0x9f + 4681 02df 00000000 .4byte 0 + 4682 02e3 00000000 .4byte 0 + 4683 .LLST25: + 4684 02e7 B2000000 .4byte .LVL38 + 4685 02eb B4000000 .4byte .LVL39 + 4686 02ef 0600 .2byte 0x6 + 4687 02f1 03 .byte 0x3 + 4688 02f2 64000000 .4byte .LC7 + 4689 02f6 9F .byte 0x9f + 4690 02f7 00000000 .4byte 0 + 4691 02fb 00000000 .4byte 0 + 4692 .LLST26: + 4693 02ff D0000000 .4byte .LVL40 + 4694 0303 D2000000 .4byte .LVL41 + 4695 0307 0600 .2byte 0x6 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 85 + + + 4696 0309 03 .byte 0x3 + 4697 030a 80000000 .4byte .LC9 + 4698 030e 9F .byte 0x9f + 4699 030f 00000000 .4byte 0 + 4700 0313 00000000 .4byte 0 + 4701 .LLST27: + 4702 0317 EE000000 .4byte .LVL42 + 4703 031b F0000000 .4byte .LVL43 + 4704 031f 0600 .2byte 0x6 + 4705 0321 03 .byte 0x3 + 4706 0322 9C000000 .4byte .LC11 + 4707 0326 9F .byte 0x9f + 4708 0327 00000000 .4byte 0 + 4709 032b 00000000 .4byte 0 + 4710 .LLST28: + 4711 032f 0C010000 .4byte .LVL44 + 4712 0333 0E010000 .4byte .LVL45 + 4713 0337 0600 .2byte 0x6 + 4714 0339 03 .byte 0x3 + 4715 033a BC000000 .4byte .LC13 + 4716 033e 9F .byte 0x9f + 4717 033f 00000000 .4byte 0 + 4718 0343 00000000 .4byte 0 + 4719 .LLST29: + 4720 0347 2A010000 .4byte .LVL46 + 4721 034b 2C010000 .4byte .LVL47 + 4722 034f 0600 .2byte 0x6 + 4723 0351 03 .byte 0x3 + 4724 0352 F8000000 .4byte .LC15 + 4725 0356 9F .byte 0x9f + 4726 0357 00000000 .4byte 0 + 4727 035b 00000000 .4byte 0 + 4728 .LLST30: + 4729 035f 4E010000 .4byte .LVL48 + 4730 0363 50010000 .4byte .LVL49 + 4731 0367 0600 .2byte 0x6 + 4732 0369 03 .byte 0x3 + 4733 036a 20010000 .4byte .LC17 + 4734 036e 9F .byte 0x9f + 4735 036f 00000000 .4byte 0 + 4736 0373 00000000 .4byte 0 + 4737 .LLST31: + 4738 0377 78010000 .4byte .LVL50 + 4739 037b 7A010000 .4byte .LVL51 + 4740 037f 0600 .2byte 0x6 + 4741 0381 03 .byte 0x3 + 4742 0382 34010000 .4byte .LC18 + 4743 0386 9F .byte 0x9f + 4744 0387 00000000 .4byte 0 + 4745 038b 00000000 .4byte 0 + 4746 .LLST32: + 4747 038f 9C010000 .4byte .LVL52 + 4748 0393 9E010000 .4byte .LVL53 + 4749 0397 0600 .2byte 0x6 + 4750 0399 03 .byte 0x3 + 4751 039a 48010000 .4byte .LC19 + 4752 039e 9F .byte 0x9f + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 86 + + + 4753 039f 00000000 .4byte 0 + 4754 03a3 00000000 .4byte 0 + 4755 .LLST33: + 4756 03a7 C0010000 .4byte .LVL54 + 4757 03ab C2010000 .4byte .LVL55 + 4758 03af 0600 .2byte 0x6 + 4759 03b1 03 .byte 0x3 + 4760 03b2 5C010000 .4byte .LC20 + 4761 03b6 9F .byte 0x9f + 4762 03b7 00000000 .4byte 0 + 4763 03bb 00000000 .4byte 0 + 4764 .LLST34: + 4765 03bf E2010000 .4byte .LVL56 + 4766 03c3 E6010000 .4byte .LVL57 + 4767 03c7 0600 .2byte 0x6 + 4768 03c9 03 .byte 0x3 + 4769 03ca 70010000 .4byte .LC21 + 4770 03ce 9F .byte 0x9f + 4771 03cf 00000000 .4byte 0 + 4772 03d3 00000000 .4byte 0 + 4773 .LLST35: + 4774 03d7 1E020000 .4byte .LVL59 + 4775 03db 22020000 .4byte .LVL60 + 4776 03df 0600 .2byte 0x6 + 4777 03e1 03 .byte 0x3 + 4778 03e2 98010000 .4byte .LC24 + 4779 03e6 9F .byte 0x9f + 4780 03e7 00000000 .4byte 0 + 4781 03eb 00000000 .4byte 0 + 4782 .LLST38: + 4783 03ef 40030000 .4byte .LVL70 + 4784 03f3 42030000 .4byte .LVL71 + 4785 03f7 0600 .2byte 0x6 + 4786 03f9 03 .byte 0x3 + 4787 03fa 84010000 .4byte .LC22 + 4788 03fe 9F .byte 0x9f + 4789 03ff 00000000 .4byte 0 + 4790 0403 00000000 .4byte 0 + 4791 .LLST39: + 4792 0407 8C030000 .4byte .LVL73 + 4793 040b 8E030000 .4byte .LVL74 + 4794 040f 0600 .2byte 0x6 + 4795 0411 03 .byte 0x3 + 4796 0412 A4010000 .4byte .LC25 + 4797 0416 9F .byte 0x9f + 4798 0417 00000000 .4byte 0 + 4799 041b 00000000 .4byte 0 + 4800 .section .debug_aranges,"",%progbits + 4801 0000 44000000 .4byte 0x44 + 4802 0004 0200 .2byte 0x2 + 4803 0006 00000000 .4byte .Ldebug_info0 + 4804 000a 04 .byte 0x4 + 4805 000b 00 .byte 0 + 4806 000c 0000 .2byte 0 + 4807 000e 0000 .2byte 0 + 4808 0010 00000000 .4byte .LFB66 + 4809 0014 38000000 .4byte .LFE66-.LFB66 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 87 + + + 4810 0018 00000000 .4byte .LFB64 + 4811 001c 28000000 .4byte .LFE64-.LFB64 + 4812 0020 00000000 .4byte .LFB63 + 4813 0024 28000000 .4byte .LFE63-.LFB63 + 4814 0028 00000000 .4byte .LFB62 + 4815 002c AC000000 .4byte .LFE62-.LFB62 + 4816 0030 00000000 .4byte .LFB67 + 4817 0034 68000000 .4byte .LFE67-.LFB67 + 4818 0038 00000000 .4byte .LFB68 + 4819 003c E4030000 .4byte .LFE68-.LFB68 + 4820 0040 00000000 .4byte 0 + 4821 0044 00000000 .4byte 0 + 4822 .section .debug_ranges,"",%progbits + 4823 .Ldebug_ranges0: + 4824 0000 0C000000 .4byte .LBB40 + 4825 0004 0E000000 .4byte .LBE40 + 4826 0008 52000000 .4byte .LBB43 + 4827 000c 68000000 .4byte .LBE43 + 4828 0010 00000000 .4byte 0 + 4829 0014 00000000 .4byte 0 + 4830 0018 0C000000 .4byte .LBB41 + 4831 001c 0E000000 .4byte .LBE41 + 4832 0020 52000000 .4byte .LBB42 + 4833 0024 68000000 .4byte .LBE42 + 4834 0028 00000000 .4byte 0 + 4835 002c 00000000 .4byte 0 + 4836 0030 0C030000 .4byte .LBB70 + 4837 0034 14030000 .4byte .LBE70 + 4838 0038 18030000 .4byte .LBB74 + 4839 003c 1A030000 .4byte .LBE74 + 4840 0040 20030000 .4byte .LBB75 + 4841 0044 24030000 .4byte .LBE75 + 4842 0048 00000000 .4byte 0 + 4843 004c 00000000 .4byte 0 + 4844 0050 00000000 .4byte .LFB66 + 4845 0054 38000000 .4byte .LFE66 + 4846 0058 00000000 .4byte .LFB64 + 4847 005c 28000000 .4byte .LFE64 + 4848 0060 00000000 .4byte .LFB63 + 4849 0064 28000000 .4byte .LFE63 + 4850 0068 00000000 .4byte .LFB62 + 4851 006c AC000000 .4byte .LFE62 + 4852 0070 00000000 .4byte .LFB67 + 4853 0074 68000000 .4byte .LFE67 + 4854 0078 00000000 .4byte .LFB68 + 4855 007c E4030000 .4byte .LFE68 + 4856 0080 00000000 .4byte 0 + 4857 0084 00000000 .4byte 0 + 4858 .section .debug_line,"",%progbits + 4859 .Ldebug_line0: + 4860 0000 55040000 .section .debug_str,"MS",%progbits,1 + 4860 02009402 + 4860 00000201 + 4860 FB0E0D00 + 4860 01010101 + 4861 .LASF99: + 4862 0000 44494552 .ascii "DIER\000" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 88 + + + 4862 00 + 4863 .LASF79: + 4864 0005 7264796D .ascii "rdymsg\000" + 4864 736700 + 4865 .LASF15: + 4866 000c 75696E74 .ascii "uint64_t\000" + 4866 36345F74 + 4866 00 + 4867 .LASF191: + 4868 0015 474E5520 .ascii "GNU C 4.6.0\000" + 4868 4320342E + 4868 362E3000 + 4869 .LASF93: + 4870 0021 4F757470 .ascii "OutputQueue\000" + 4870 75745175 + 4870 65756500 + 4871 .LASF130: + 4872 002d 4F545950 .ascii "OTYPER\000" + 4872 455200 + 4873 .LASF143: + 4874 0034 4750545F .ascii "GPT_ONESHOT\000" + 4874 4F4E4553 + 4874 484F5400 + 4875 .LASF76: + 4876 0040 6D625F66 .ascii "mb_fullsem\000" + 4876 756C6C73 + 4876 656D00 + 4877 .LASF138: + 4878 004b 696F706F .ascii "ioportmask_t\000" + 4878 72746D61 + 4878 736B5F74 + 4878 00 + 4879 .LASF126: + 4880 0058 54494D5F .ascii "TIM_TypeDef\000" + 4880 54797065 + 4880 44656600 + 4881 .LASF87: + 4882 0064 715F746F .ascii "q_top\000" + 4882 7000 + 4883 .LASF78: + 4884 006a 4D61696C .ascii "Mailbox\000" + 4884 626F7800 + 4885 .LASF129: + 4886 0072 4D4F4445 .ascii "MODER\000" + 4886 5200 + 4887 .LASF16: + 4888 0078 75696E74 .ascii "uint_fast16_t\000" + 4888 5F666173 + 4888 7431365F + 4888 7400 + 4889 .LASF6: + 4890 0086 6C6F6E67 .ascii "long long unsigned int\000" + 4890 206C6F6E + 4890 6720756E + 4890 7369676E + 4890 65642069 + 4891 .LASF132: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 89 + + + 4892 009d 50555044 .ascii "PUPDR\000" + 4892 5200 + 4893 .LASF80: + 4894 00a3 65786974 .ascii "exitcode\000" + 4894 636F6465 + 4894 00 + 4895 .LASF174: + 4896 00ac 7072696E .ascii "print\000" + 4896 7400 + 4897 .LASF187: + 4898 00b2 73617475 .ascii "saturated\000" + 4898 72617465 + 4898 6400 + 4899 .LASF173: + 4900 00bc 7072696E .ascii "printn\000" + 4900 746E00 + 4901 .LASF185: + 4902 00c3 47505444 .ascii "GPTD2\000" + 4902 3200 + 4903 .LASF186: + 4904 00c9 47505444 .ascii "GPTD3\000" + 4904 3300 + 4905 .LASF152: + 4906 00cf 66726571 .ascii "frequency\000" + 4906 75656E63 + 4906 7900 + 4907 .LASF178: + 4908 00d9 67707432 .ascii "gpt2cb\000" + 4908 636200 + 4909 .LASF29: + 4910 00e0 705F7072 .ascii "p_prio\000" + 4910 696F00 + 4911 .LASF171: + 4912 00e7 72656164 .ascii "readt\000" + 4912 7400 + 4913 .LASF103: + 4914 00ed 43434D52 .ascii "CCMR1\000" + 4914 3100 + 4915 .LASF105: + 4916 00f3 43434D52 .ascii "CCMR2\000" + 4916 3200 + 4917 .LASF5: + 4918 00f9 6C6F6E67 .ascii "long long int\000" + 4918 206C6F6E + 4918 6720696E + 4918 7400 + 4919 .LASF1: + 4920 0107 7369676E .ascii "signed char\000" + 4920 65642063 + 4920 68617200 + 4921 .LASF133: + 4922 0113 42535252 .ascii "BSRR\000" + 4922 00 + 4923 .LASF127: + 4924 0118 47545052 .ascii "GTPR\000" + 4924 00 + 4925 .LASF17: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 90 + + + 4926 011d 626F6F6C .ascii "bool_t\000" + 4926 5F7400 + 4927 .LASF63: + 4928 0124 6D5F7175 .ascii "m_queue\000" + 4928 65756500 + 4929 .LASF142: + 4930 012c 4750545F .ascii "GPT_CONTINUOUS\000" + 4930 434F4E54 + 4930 494E554F + 4930 555300 + 4931 .LASF110: + 4932 013b 52455345 .ascii "RESERVED10\000" + 4932 52564544 + 4932 313000 + 4933 .LASF111: + 4934 0146 52455345 .ascii "RESERVED11\000" + 4934 52564544 + 4934 313100 + 4935 .LASF112: + 4936 0151 52455345 .ascii "RESERVED12\000" + 4936 52564544 + 4936 313200 + 4937 .LASF114: + 4938 015c 52455345 .ascii "RESERVED13\000" + 4938 52564544 + 4938 313300 + 4939 .LASF116: + 4940 0167 52455345 .ascii "RESERVED14\000" + 4940 52564544 + 4940 313400 + 4941 .LASF118: + 4942 0172 52455345 .ascii "RESERVED15\000" + 4942 52564544 + 4942 313500 + 4943 .LASF120: + 4944 017d 52455345 .ascii "RESERVED16\000" + 4944 52564544 + 4944 313600 + 4945 .LASF121: + 4946 0188 52455345 .ascii "RESERVED17\000" + 4946 52564544 + 4946 313700 + 4947 .LASF122: + 4948 0193 52455345 .ascii "RESERVED18\000" + 4948 52564544 + 4948 313800 + 4949 .LASF146: + 4950 019e 73746174 .ascii "state\000" + 4950 6500 + 4951 .LASF7: + 4952 01a4 6C6F6E67 .ascii "long int\000" + 4952 20696E74 + 4952 00 + 4953 .LASF151: + 4954 01ad 67707463 .ascii "gptcnt_t\000" + 4954 6E745F74 + 4954 00 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 91 + + + 4955 .LASF190: + 4956 01b6 67707433 .ascii "gpt3cfg\000" + 4956 63666700 + 4957 .LASF19: + 4958 01be 74737461 .ascii "tstate_t\000" + 4958 74655F74 + 4958 00 + 4959 .LASF36: + 4960 01c7 705F7265 .ascii "p_refs\000" + 4960 667300 + 4961 .LASF86: + 4962 01ce 715F6275 .ascii "q_buffer\000" + 4962 66666572 + 4962 00 + 4963 .LASF88: + 4964 01d7 715F7772 .ascii "q_wrptr\000" + 4964 70747200 + 4965 .LASF37: + 4966 01df 705F7469 .ascii "p_time\000" + 4966 6D6500 + 4967 .LASF31: + 4968 01e6 705F6E65 .ascii "p_newer\000" + 4968 77657200 + 4969 .LASF168: + 4970 01ee 70757477 .ascii "putwouldblock\000" + 4970 6F756C64 + 4970 626C6F63 + 4970 6B00 + 4971 .LASF60: + 4972 01fc 735F7175 .ascii "s_queue\000" + 4972 65756500 + 4973 .LASF149: + 4974 0204 67707463 .ascii "gptcallback_t\000" + 4974 616C6C62 + 4974 61636B5F + 4974 7400 + 4975 .LASF4: + 4976 0212 73686F72 .ascii "short unsigned int\000" + 4976 7420756E + 4976 7369676E + 4976 65642069 + 4976 6E7400 + 4977 .LASF180: + 4978 0225 696E7465 .ascii "interval\000" + 4978 7276616C + 4978 00 + 4979 .LASF131: + 4980 022e 4F535045 .ascii "OSPEEDR\000" + 4980 45445200 + 4981 .LASF54: + 4982 0236 725F6E65 .ascii "r_newer\000" + 4982 77657200 + 4983 .LASF145: + 4984 023e 47505444 .ascii "GPTDriver\000" + 4984 72697665 + 4984 7200 + 4985 .LASF47: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 92 + + + 4986 0248 72656761 .ascii "regarm_t\000" + 4986 726D5F74 + 4986 00 + 4987 .LASF10: + 4988 0251 73697A65 .ascii "size_t\000" + 4988 5F7400 + 4989 .LASF125: + 4990 0258 52455345 .ascii "RESERVED20\000" + 4990 52564544 + 4990 323000 + 4991 .LASF189: + 4992 0263 67707432 .ascii "gpt2cfg\000" + 4992 63666700 + 4993 .LASF70: + 4994 026b 4576656E .ascii "EventSource\000" + 4994 74536F75 + 4994 72636500 + 4995 .LASF144: + 4996 0277 67707473 .ascii "gptstate_t\000" + 4996 74617465 + 4996 5F7400 + 4997 .LASF164: + 4998 0282 75736172 .ascii "usart\000" + 4998 7400 + 4999 .LASF0: + 5000 0288 756E7369 .ascii "unsigned int\000" + 5000 676E6564 + 5000 20696E74 + 5000 00 + 5001 .LASF12: + 5002 0295 75696E74 .ascii "uint16_t\000" + 5002 31365F74 + 5002 00 + 5003 .LASF165: + 5004 029e 53657269 .ascii "SerialDriverVMT\000" + 5004 616C4472 + 5004 69766572 + 5004 564D5400 + 5005 .LASF162: + 5006 02ae 69717565 .ascii "iqueue\000" + 5006 756500 + 5007 .LASF39: + 5008 02b5 705F6D73 .ascii "p_msgqueue\000" + 5008 67717565 + 5008 756500 + 5009 .LASF137: + 5010 02c0 4750494F .ascii "GPIO_TypeDef\000" + 5010 5F547970 + 5010 65446566 + 5010 00 + 5011 .LASF77: + 5012 02cd 6D625F65 .ascii "mb_emptysem\000" + 5012 6D707479 + 5012 73656D00 + 5013 .LASF134: + 5014 02d9 4C434B52 .ascii "LCKR\000" + 5014 00 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 93 + + + 5015 .LASF177: + 5016 02de 67707470 .ascii "gptp\000" + 5016 00 + 5017 .LASF61: + 5018 02e3 735F636E .ascii "s_cnt\000" + 5018 7400 + 5019 .LASF139: + 5020 02e9 4750545F .ascii "GPT_UNINIT\000" + 5020 554E494E + 5020 495400 + 5021 .LASF160: + 5022 02f4 6576656E .ascii "event\000" + 5022 7400 + 5023 .LASF150: + 5024 02fa 67707466 .ascii "gptfreq_t\000" + 5024 7265715F + 5024 7400 + 5025 .LASF44: + 5026 0304 705F6D70 .ascii "p_mpool\000" + 5026 6F6F6C00 + 5027 .LASF22: + 5028 030c 6D73675F .ascii "msg_t\000" + 5028 7400 + 5029 .LASF163: + 5030 0312 6F717565 .ascii "oqueue\000" + 5030 756500 + 5031 .LASF153: + 5032 0319 63616C6C .ascii "callback\000" + 5032 6261636B + 5032 00 + 5033 .LASF128: + 5034 0322 55534152 .ascii "USART_TypeDef\000" + 5034 545F5479 + 5034 70654465 + 5034 6600 + 5035 .LASF170: + 5036 0330 77726974 .ascii "writet\000" + 5036 657400 + 5037 .LASF179: + 5038 0337 74617267 .ascii "target\000" + 5038 657400 + 5039 .LASF46: + 5040 033e 54687265 .ascii "ThreadsList\000" + 5040 6164734C + 5040 69737400 + 5041 .LASF23: + 5042 034a 6576656E .ascii "eventmask_t\000" + 5042 746D6173 + 5042 6B5F7400 + 5043 .LASF92: + 5044 0356 496E7075 .ascii "InputQueue\000" + 5044 74517565 + 5044 756500 + 5045 .LASF91: + 5046 0361 716E6F74 .ascii "qnotify_t\000" + 5046 6966795F + 5046 7400 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 94 + + + 5047 .LASF83: + 5048 036b 47656E65 .ascii "GenericQueue\000" + 5048 72696351 + 5048 75657565 + 5048 00 + 5049 .LASF49: + 5050 0378 73746B61 .ascii "stkalign_t\000" + 5050 6C69676E + 5050 5F7400 + 5051 .LASF166: + 5052 0383 77726974 .ascii "write\000" + 5052 6500 + 5053 .LASF85: + 5054 0389 715F636F .ascii "q_counter\000" + 5054 756E7465 + 5054 7200 + 5055 .LASF75: + 5056 0393 6D625F72 .ascii "mb_rdptr\000" + 5056 64707472 + 5056 00 + 5057 .LASF62: + 5058 039c 4D757465 .ascii "Mutex\000" + 5058 7800 + 5059 .LASF141: + 5060 03a2 4750545F .ascii "GPT_READY\000" + 5060 52454144 + 5060 5900 + 5061 .LASF25: + 5062 03ac 636E745F .ascii "cnt_t\000" + 5062 7400 + 5063 .LASF69: + 5064 03b2 656C5F6D .ascii "el_mask\000" + 5064 61736B00 + 5065 .LASF175: + 5066 03ba 7072696E .ascii "println\000" + 5066 746C6E00 + 5067 .LASF32: + 5068 03c2 705F6F6C .ascii "p_older\000" + 5068 64657200 + 5069 .LASF53: + 5070 03ca 725F6374 .ascii "r_ctx\000" + 5070 7800 + 5071 .LASF45: + 5072 03d0 54687265 .ascii "ThreadsQueue\000" + 5072 61647351 + 5072 75657565 + 5072 00 + 5073 .LASF72: + 5074 03dd 6D625F62 .ascii "mb_buffer\000" + 5074 75666665 + 5074 7200 + 5075 .LASF182: + 5076 03e7 776F7273 .ascii "worst\000" + 5076 7400 + 5077 .LASF192: + 5078 03ed 6D61696E .ascii "main.c\000" + 5078 2E6300 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 95 + + + 5079 .LASF55: + 5080 03f4 725F6F6C .ascii "r_older\000" + 5080 64657200 + 5081 .LASF124: + 5082 03fc 52455345 .ascii "RESERVED19\000" + 5082 52564544 + 5082 313900 + 5083 .LASF136: + 5084 0407 41465248 .ascii "AFRH\000" + 5084 00 + 5085 .LASF135: + 5086 040c 4146524C .ascii "AFRL\000" + 5086 00 + 5087 .LASF84: + 5088 0411 715F7761 .ascii "q_waiting\000" + 5088 6974696E + 5088 6700 + 5089 .LASF20: + 5090 041b 74726566 .ascii "trefs_t\000" + 5090 735F7400 + 5091 .LASF95: + 5092 0423 52455345 .ascii "RESERVED0\000" + 5092 52564544 + 5092 3000 + 5093 .LASF96: + 5094 042d 52455345 .ascii "RESERVED1\000" + 5094 52564544 + 5094 3100 + 5095 .LASF98: + 5096 0437 52455345 .ascii "RESERVED2\000" + 5096 52564544 + 5096 3200 + 5097 .LASF100: + 5098 0441 52455345 .ascii "RESERVED3\000" + 5098 52564544 + 5098 3300 + 5099 .LASF101: + 5100 044b 52455345 .ascii "RESERVED4\000" + 5100 52564544 + 5100 3400 + 5101 .LASF28: + 5102 0455 705F7072 .ascii "p_prev\000" + 5102 657600 + 5103 .LASF104: + 5104 045c 52455345 .ascii "RESERVED6\000" + 5104 52564544 + 5104 3600 + 5105 .LASF108: + 5106 0466 52455345 .ascii "RESERVED8\000" + 5106 52564544 + 5106 3800 + 5107 .LASF21: + 5108 0470 74707269 .ascii "tprio_t\000" + 5108 6F5F7400 + 5109 .LASF89: + 5110 0478 715F7264 .ascii "q_rdptr\000" + 5110 70747200 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 96 + + + 5111 .LASF193: + 5112 0480 443A5C50 .ascii "D:\\Progetti\\ChibiOS-RT\\testhal\\STM32L1xx\\IRQ_S" + 5112 726F6765 + 5112 7474695C + 5112 43686962 + 5112 694F532D + 5113 04ae 544F524D .ascii "TORM\000" + 5113 00 + 5114 .LASF181: + 5115 04b3 74687265 .ascii "threshold\000" + 5115 73686F6C + 5115 6400 + 5116 .LASF56: + 5117 04bd 725F7072 .ascii "r_preempt\000" + 5117 65656D70 + 5117 7400 + 5118 .LASF13: + 5119 04c7 696E7433 .ascii "int32_t\000" + 5119 325F7400 + 5120 .LASF2: + 5121 04cf 756E7369 .ascii "unsigned char\000" + 5121 676E6564 + 5121 20636861 + 5121 7200 + 5122 .LASF73: + 5123 04dd 6D625F74 .ascii "mb_top\000" + 5123 6F7000 + 5124 .LASF68: + 5125 04e4 656C5F6C .ascii "el_listener\000" + 5125 69737465 + 5125 6E657200 + 5126 .LASF184: + 5127 04f0 49544D5F .ascii "ITM_RxBuffer\000" + 5127 52784275 + 5127 66666572 + 5127 00 + 5128 .LASF34: + 5129 04fd 705F7374 .ascii "p_state\000" + 5129 61746500 + 5130 .LASF42: + 5131 0505 705F6D74 .ascii "p_mtxlist\000" + 5131 786C6973 + 5131 7400 + 5132 .LASF3: + 5133 050f 73686F72 .ascii "short int\000" + 5133 7420696E + 5133 7400 + 5134 .LASF52: + 5135 0519 725F7072 .ascii "r_prio\000" + 5135 696F00 + 5136 .LASF82: + 5137 0520 65776D61 .ascii "ewmask\000" + 5137 736B00 + 5138 .LASF27: + 5139 0527 705F6E65 .ascii "p_next\000" + 5139 787400 + 5140 .LASF35: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 97 + + + 5141 052e 705F666C .ascii "p_flags\000" + 5141 61677300 + 5142 .LASF67: + 5143 0536 656C5F6E .ascii "el_next\000" + 5143 65787400 + 5144 .LASF156: + 5145 053e 53445F53 .ascii "SD_STOP\000" + 5145 544F5000 + 5146 .LASF26: + 5147 0546 54687265 .ascii "Thread\000" + 5147 616400 + 5148 .LASF41: + 5149 054d 705F6570 .ascii "p_epending\000" + 5149 656E6469 + 5149 6E6700 + 5150 .LASF155: + 5151 0558 53445F55 .ascii "SD_UNINIT\000" + 5151 4E494E49 + 5151 5400 + 5152 .LASF102: + 5153 0562 52455345 .ascii "RESERVED5\000" + 5153 52564544 + 5153 3500 + 5154 .LASF140: + 5155 056c 4750545F .ascii "GPT_STOP\000" + 5155 53544F50 + 5155 00 + 5156 .LASF14: + 5157 0575 75696E74 .ascii "uint32_t\000" + 5157 33325F74 + 5157 00 + 5158 .LASF106: + 5159 057e 52455345 .ascii "RESERVED7\000" + 5159 52564544 + 5159 3700 + 5160 .LASF51: + 5161 0588 725F7175 .ascii "r_queue\000" + 5161 65756500 + 5162 .LASF158: + 5163 0590 73647374 .ascii "sdstate_t\000" + 5163 6174655F + 5163 7400 + 5164 .LASF109: + 5165 059a 52455345 .ascii "RESERVED9\000" + 5165 52564544 + 5165 3900 + 5166 .LASF159: + 5167 05a4 53657269 .ascii "SerialDriver\000" + 5167 616C4472 + 5167 69766572 + 5167 00 + 5168 .LASF8: + 5169 05b1 6C6F6E67 .ascii "long unsigned int\000" + 5169 20756E73 + 5169 69676E65 + 5169 6420696E + 5169 7400 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 98 + + + 5170 .LASF57: + 5171 05c3 725F6375 .ascii "r_current\000" + 5171 7272656E + 5171 7400 + 5172 .LASF167: + 5173 05cd 72656164 .ascii "read\000" + 5173 00 + 5174 .LASF9: + 5175 05d2 63686172 .ascii "char\000" + 5175 00 + 5176 .LASF97: + 5177 05d7 534D4352 .ascii "SMCR\000" + 5177 00 + 5178 .LASF147: + 5179 05dc 636F6E66 .ascii "config\000" + 5179 696700 + 5180 .LASF40: + 5181 05e3 705F6D73 .ascii "p_msg\000" + 5181 6700 + 5182 .LASF123: + 5183 05e9 444D4152 .ascii "DMAR\000" + 5183 00 + 5184 .LASF194: + 5185 05ee 576F726B .ascii "WorkerThread\000" + 5185 65725468 + 5185 72656164 + 5185 00 + 5186 .LASF188: + 5187 05fb 7761576F .ascii "waWorkerThread\000" + 5187 726B6572 + 5187 54687265 + 5187 616400 + 5188 .LASF107: + 5189 060a 43434552 .ascii "CCER\000" + 5189 00 + 5190 .LASF65: + 5191 060f 6D5F6E65 .ascii "m_next\000" + 5191 787400 + 5192 .LASF24: + 5193 0616 73797374 .ascii "systime_t\000" + 5193 696D655F + 5193 7400 + 5194 .LASF43: + 5195 0620 705F7265 .ascii "p_realprio\000" + 5195 616C7072 + 5195 696F00 + 5196 .LASF33: + 5197 062b 705F6E61 .ascii "p_name\000" + 5197 6D6500 + 5198 .LASF154: + 5199 0632 47505443 .ascii "GPTConfig\000" + 5199 6F6E6669 + 5199 6700 + 5200 .LASF172: + 5201 063c 67657466 .ascii "getflags\000" + 5201 6C616773 + 5201 00 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 99 + + + 5202 .LASF50: + 5203 0645 636F6E74 .ascii "context\000" + 5203 65787400 + 5204 .LASF94: + 5205 064d 696F666C .ascii "ioflags_t\000" + 5205 6167735F + 5205 7400 + 5206 .LASF48: + 5207 0657 696E7463 .ascii "intctx\000" + 5207 747800 + 5208 .LASF157: + 5209 065e 53445F52 .ascii "SD_READY\000" + 5209 45414459 + 5209 00 + 5210 .LASF59: + 5211 0667 53656D61 .ascii "Semaphore\000" + 5211 70686F72 + 5211 6500 + 5212 .LASF113: + 5213 0671 43435231 .ascii "CCR1\000" + 5213 00 + 5214 .LASF115: + 5215 0676 43435232 .ascii "CCR2\000" + 5215 00 + 5216 .LASF117: + 5217 067b 43435233 .ascii "CCR3\000" + 5217 00 + 5218 .LASF119: + 5219 0680 43435234 .ascii "CCR4\000" + 5219 00 + 5220 .LASF71: + 5221 0685 65735F6E .ascii "es_next\000" + 5221 65787400 + 5222 .LASF58: + 5223 068d 52656164 .ascii "ReadyList\000" + 5223 794C6973 + 5223 7400 + 5224 .LASF90: + 5225 0697 715F6E6F .ascii "q_notify\000" + 5225 74696679 + 5225 00 + 5226 .LASF183: + 5227 06a0 726C6973 .ascii "rlist\000" + 5227 7400 + 5228 .LASF11: + 5229 06a6 75696E74 .ascii "uint8_t\000" + 5229 385F7400 + 5230 .LASF161: + 5231 06ae 666C6167 .ascii "flags\000" + 5231 7300 + 5232 .LASF66: + 5233 06b4 4576656E .ascii "EventListener\000" + 5233 744C6973 + 5233 74656E65 + 5233 7200 + 5234 .LASF81: + 5235 06c2 77746F62 .ascii "wtobjp\000" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 100 + + + 5235 6A7000 + 5236 .LASF18: + 5237 06c9 746D6F64 .ascii "tmode_t\000" + 5237 655F7400 + 5238 .LASF176: + 5239 06d1 67707433 .ascii "gpt3cb\000" + 5239 636200 + 5240 .LASF148: + 5241 06d8 636C6F63 .ascii "clock\000" + 5241 6B00 + 5242 .LASF169: + 5243 06de 67657477 .ascii "getwouldblock\000" + 5243 6F756C64 + 5243 626C6F63 + 5243 6B00 + 5244 .LASF195: + 5245 06ec 6D61696E .ascii "main\000" + 5245 00 + 5246 .LASF74: + 5247 06f1 6D625F77 .ascii "mb_wrptr\000" + 5247 72707472 + 5247 00 + 5248 .LASF64: + 5249 06fa 6D5F6F77 .ascii "m_owner\000" + 5249 6E657200 + 5250 .LASF30: + 5251 0702 705F6374 .ascii "p_ctx\000" + 5251 7800 + 5252 .LASF38: + 5253 0708 705F7761 .ascii "p_waiting\000" + 5253 6974696E + 5253 6700 + 5254 .ident "GCC: (GNU) 4.6.0" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 101 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:18 .text.println:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:23 .text.println:00000000 println +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:69 .text.println:00000030 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:75 .text.gpt3cb:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:80 .text.gpt3cb:00000000 gpt3cb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:130 .text.gpt3cb:00000020 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:136 .text.gpt2cb:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:141 .text.gpt2cb:00000000 gpt2cb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:191 .text.gpt2cb:00000020 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:197 .text.WorkerThread:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:202 .text.WorkerThread:00000000 WorkerThread +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1087 .bss.saturated:00000000 .LANCHOR1 +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:318 .text.WorkerThread:00000098 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:327 .text.printn:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:332 .text.printn:00000000 printn +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:422 .text.printn:00000064 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:429 .text.startup.main:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:435 .text.startup.main:00000000 main +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:854 .text.startup.main:00000250 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:890 .text.startup.main:000002cc $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1059 .text.startup.main:000003c4 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1071 .rodata.gpt2cfg:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1075 .rodata.gpt2cfg:00000000 gpt2cfg +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1079 .bss.waWorkerThread:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1083 .bss.waWorkerThread:00000000 waWorkerThread +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1086 .bss.saturated:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1090 .bss.saturated:00000000 saturated +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1093 .rodata.gpt3cfg:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1097 .rodata.gpt3cfg:00000000 gpt3cfg +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1101 .rodata.str1.4:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1178 .bss.mb:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1182 .bss.mb:00000000 mb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1185 .bss.b:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1189 .bss.b:00000000 b +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1192 .bss.x.3441:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1196 .bss.x.3441:00000000 x.3441 +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1199 .bss.cnt.3442:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1203 .bss.cnt.3442:00000000 cnt.3442 + .debug_frame:00000010 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:74 .text.println:00000038 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:135 .text.gpt3cb:00000028 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:196 .text.gpt2cb:00000028 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:326 .text.WorkerThread:000000ac $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:428 .text.printn:00000068 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1070 .text.startup.main:000003e4 $t + +UNDEFINED SYMBOLS +SD1 +chMBPostI +chMBFetch +chMBPost +rlist +halInit +chSysInit +sdStart + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 102 + + +_pal_lld_setgroupmode +gptStart +chMBInit +chThdCreateStatic +GPTD2 +GPTD3 +gptStartContinuous +chThdSleep +gptStopTimer diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..5839ef86a --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..f55cf8471 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx PWM-ICU drivers. + +** Board Setup ** + +- Remove the LCD module. +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index 10a6ed0e8..9209b441d 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). -- cgit v1.2.3 From 79f641c928cc438ab41df0eab6850355f07edd1d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 12:09:16 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3349 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 49247bac6..4fadc4f9c 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -87,12 +87,12 @@ int main(void) { */ while (TRUE) { palSetPad(GPIOB, GPIOB_LED3); - gptStopTimer(&GPTD2); gptStartContinuous(&GPTD2, 5000); chThdSleepMilliseconds(5000); - palClearPad(GPIOB, GPIOB_LED3); gptStopTimer(&GPTD2); + palClearPad(GPIOB, GPIOB_LED3); gptStartContinuous(&GPTD2, 2500); chThdSleepMilliseconds(5000); + gptStopTimer(&GPTD2); } } -- cgit v1.2.3 From 9ced1d4e653d7721b256fbde40f9260446ea434b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 13:01:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3351 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/IRQ_STORM/main.lst | 6048 ---------------------------------- 1 file changed, 6048 deletions(-) delete mode 100644 testhal/STM32L1xx/IRQ_STORM/main.lst (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/IRQ_STORM/main.lst b/testhal/STM32L1xx/IRQ_STORM/main.lst deleted file mode 100644 index 7b4c43cc3..000000000 --- a/testhal/STM32L1xx/IRQ_STORM/main.lst +++ /dev/null @@ -1,6048 +0,0 @@ -ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 1 - - - 1 .syntax unified - 2 .cpu cortex-m3 - 3 .fpu softvfp - 4 .eabi_attribute 20, 1 - 5 .eabi_attribute 21, 1 - 6 .eabi_attribute 23, 3 - 7 .eabi_attribute 24, 1 - 8 .eabi_attribute 25, 1 - 9 .eabi_attribute 26, 1 - 10 .eabi_attribute 30, 2 - 11 .eabi_attribute 18, 4 - 12 .thumb - 13 .file "main.c" - 14 .text - 15 .Ltext0: - 16 .cfi_sections .debug_frame - 17 .section .text.println,"ax",%progbits - 18 .align 2 - 19 .p2align 4,,15 - 20 .thumb - 21 .thumb_func - 22 .type println, %function - 23 println: - 24 .LFB66: - 25 .file 1 "main.c" - 26 .loc 1 177 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 38B5 push {r3, r4, r5, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 16 - 34 .cfi_offset 14, -4 - 35 .cfi_offset 5, -8 - 36 .cfi_offset 4, -12 - 37 .cfi_offset 3, -16 - 38 .loc 1 179 0 - 39 0002 0178 ldrb r1, [r0, #0] @ zero_extendqisi2 - 40 0004 0A4D ldr r5, .L8 - 41 0006 0446 mov r4, r0 - 42 0008 49B1 cbz r1, .L2 - 43 .LVL1: - 44 .L3: - 45 .loc 1 180 0 - 46 000a 2B68 ldr r3, [r5, #0] - 47 000c 0848 ldr r0, .L8 - 48 000e 1B69 ldr r3, [r3, #16] - 49 0010 4FF0FF32 mov r2, #-1 - 50 0014 9847 blx r3 - 51 .loc 1 179 0 - 52 0016 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 53 001a 0029 cmp r1, #0 - 54 001c F5D1 bne .L3 - 55 .L2: - 56 .loc 1 182 0 - 57 001e 2B68 ldr r3, [r5, #0] - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 2 - - - 58 0020 0449 ldr r1, .L8+4 - 59 0022 9C69 ldr r4, [r3, #24] - 60 0024 0222 movs r2, #2 - 61 0026 4FF0FF33 mov r3, #-1 - 62 002a 0148 ldr r0, .L8 - 63 002c A047 blx r4 - 64 .loc 1 183 0 - 65 002e 38BD pop {r3, r4, r5, pc} - 66 .L9: - 67 .align 2 - 68 .L8: - 69 0030 00000000 .word SD1 - 70 0034 00000000 .word .LC0 - 71 .cfi_endproc - 72 .LFE66: - 73 .size println, .-println - 74 0038 AFF30080 .section .text.gpt3cb,"ax",%progbits - 74 AFF30080 - 75 .align 2 - 76 .p2align 4,,15 - 77 .thumb - 78 .thumb_func - 79 .type gpt3cb, %function - 80 gpt3cb: - 81 .LFB64: - 82 .loc 1 138 0 - 83 .cfi_startproc - 84 @ args = 0, pretend = 0, frame = 0 - 85 @ frame_needed = 0, uses_anonymous_args = 0 - 86 .LVL2: - 87 0000 08B5 push {r3, lr} - 88 .LCFI1: - 89 .cfi_def_cfa_offset 8 - 90 .cfi_offset 14, -4 - 91 .cfi_offset 3, -8 - 92 .LBB34: - 93 .loc 1 142 0 - 94 0002 2023 movs r3, #32 - 95 .LVL3: - 96 @ 142 "main.c" 1 - 97 0004 83F31188 msr BASEPRI, r3 - 98 @ 0 "" 2 - 99 .LVL4: - 100 .thumb - 101 .LBE34: - 102 .loc 1 143 0 - 103 0008 0548 ldr r0, .L12 - 104 .LVL5: - 105 000a 0021 movs r1, #0 - 106 000c FFF7FEFF bl chMBPostI - 107 .LVL6: - 108 .loc 1 144 0 - 109 0010 10B1 cbz r0, .L11 - 110 .loc 1 145 0 - 111 0012 044B ldr r3, .L12+4 - 112 0014 0122 movs r2, #1 - 113 0016 1A60 str r2, [r3, #0] - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 3 - - - 114 .L11: - 115 .LBB35: - 116 .loc 1 146 0 - 117 0018 0023 movs r3, #0 - 118 .LVL7: - 119 @ 146 "main.c" 1 - 120 001a 83F31188 msr BASEPRI, r3 - 121 @ 0 "" 2 - 122 .LVL8: - 123 .thumb - 124 .LBE35: - 125 .loc 1 147 0 - 126 001e 08BD pop {r3, pc} - 127 .L13: - 128 .align 2 - 129 .L12: - 130 0020 78000000 .word .LANCHOR0+120 - 131 0024 00000000 .word .LANCHOR1 - 132 .cfi_endproc - 133 .LFE64: - 134 .size gpt3cb, .-gpt3cb - 135 0028 AFF30080 .section .text.gpt2cb,"ax",%progbits - 135 AFF30080 - 136 .align 2 - 137 .p2align 4,,15 - 138 .thumb - 139 .thumb_func - 140 .type gpt2cb, %function - 141 gpt2cb: - 142 .LFB63: - 143 .loc 1 124 0 - 144 .cfi_startproc - 145 @ args = 0, pretend = 0, frame = 0 - 146 @ frame_needed = 0, uses_anonymous_args = 0 - 147 .LVL9: - 148 0000 08B5 push {r3, lr} - 149 .LCFI2: - 150 .cfi_def_cfa_offset 8 - 151 .cfi_offset 14, -4 - 152 .cfi_offset 3, -8 - 153 .LBB36: - 154 .loc 1 128 0 - 155 0002 2023 movs r3, #32 - 156 .LVL10: - 157 @ 128 "main.c" 1 - 158 0004 83F31188 msr BASEPRI, r3 - 159 @ 0 "" 2 - 160 .LVL11: - 161 .thumb - 162 .LBE36: - 163 .loc 1 129 0 - 164 0008 0548 ldr r0, .L16 - 165 .LVL12: - 166 000a 0121 movs r1, #1 - 167 000c FFF7FEFF bl chMBPostI - 168 .LVL13: - 169 .loc 1 130 0 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 4 - - - 170 0010 10B1 cbz r0, .L15 - 171 .loc 1 131 0 - 172 0012 044B ldr r3, .L16+4 - 173 0014 0122 movs r2, #1 - 174 0016 1A60 str r2, [r3, #0] - 175 .L15: - 176 .LBB37: - 177 .loc 1 132 0 - 178 0018 0023 movs r3, #0 - 179 .LVL14: - 180 @ 132 "main.c" 1 - 181 001a 83F31188 msr BASEPRI, r3 - 182 @ 0 "" 2 - 183 .LVL15: - 184 .thumb - 185 .LBE37: - 186 .loc 1 133 0 - 187 001e 08BD pop {r3, pc} - 188 .L17: - 189 .align 2 - 190 .L16: - 191 0020 00000000 .word .LANCHOR0 - 192 0024 00000000 .word .LANCHOR1 - 193 .cfi_endproc - 194 .LFE63: - 195 .size gpt2cb, .-gpt2cb - 196 0028 AFF30080 .section .text.WorkerThread,"ax",%progbits - 196 AFF30080 - 197 .align 2 - 198 .p2align 4,,15 - 199 .thumb - 200 .thumb_func - 201 .type WorkerThread, %function - 202 WorkerThread: - 203 .LFB62: - 204 .loc 1 65 0 - 205 .cfi_startproc - 206 @ args = 0, pretend = 0, frame = 8 - 207 @ frame_needed = 0, uses_anonymous_args = 0 - 208 .LVL16: - 209 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 210 .LCFI3: - 211 .cfi_def_cfa_offset 36 - 212 .cfi_offset 14, -4 - 213 .cfi_offset 11, -8 - 214 .cfi_offset 10, -12 - 215 .cfi_offset 9, -16 - 216 .cfi_offset 8, -20 - 217 .cfi_offset 7, -24 - 218 .cfi_offset 6, -28 - 219 .cfi_offset 5, -32 - 220 .cfi_offset 4, -36 - 221 .loc 1 73 0 - 222 0004 244B ldr r3, .L31 - 223 0006 DFF8A0B0 ldr fp, .L31+16 - 224 000a DB69 ldr r3, [r3, #28] - 225 000c 234E ldr r6, .L31+4 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 5 - - - 226 000e 244A ldr r2, .L31+8 - 227 .loc 1 78 0 - 228 0010 00EB8007 add r7, r0, r0, lsl #2 - 229 0014 234C ldr r4, .L31+12 - 230 .loc 1 65 0 - 231 0016 83B0 sub sp, sp, #12 - 232 .LCFI4: - 233 .cfi_def_cfa_offset 48 - 234 .loc 1 73 0 - 235 0018 9A61 str r2, [r3, #24] - 236 001a 0509 lsrs r5, r0, #4 - 237 001c 00F1FF39 add r9, r0, #-1 - 238 0020 00F10108 add r8, r0, #1 - 239 .loc 1 78 0 - 240 0024 0BEBC707 add r7, fp, r7, lsl #3 - 241 .loc 1 113 0 - 242 0028 B246 mov sl, r6 - 243 .LVL17: - 244 .L29: - 245 .loc 1 78 0 - 246 002a 3846 mov r0, r7 - 247 .LVL18: - 248 002c 01A9 add r1, sp, #4 - 249 002e 4FF0FF32 mov r2, #-1 - 250 0032 FFF7FEFF bl chMBFetch - 251 .LVL19: - 252 .loc 1 93 0 - 253 0036 2DB1 cbz r5, .L20 - 254 0038 2B46 mov r3, r5 - 255 .LVL20: - 256 .L21: - 257 .loc 1 94 0 - 258 003a 2268 ldr r2, [r4, #0] - 259 003c 0132 adds r2, r2, #1 - 260 .loc 1 93 0 - 261 003e 013B subs r3, r3, #1 - 262 .loc 1 94 0 - 263 0040 2260 str r2, [r4, #0] - 264 .loc 1 93 0 - 265 0042 FAD1 bne .L21 - 266 .L20: - 267 .loc 1 99 0 - 268 0044 0199 ldr r1, [sp, #4] - 269 .loc 1 100 0 - 270 0046 0029 cmp r1, #0 - 271 0048 14BF ite ne - 272 004a 4346 movne r3, r8 - 273 004c 4B46 moveq r3, r9 - 274 .LVL21: - 275 .loc 1 104 0 - 276 004e 032B cmp r3, #3 - 277 0050 11D9 bls .L30 - 278 .loc 1 113 0 - 279 0052 3368 ldr r3, [r6, #0] - 280 .LVL22: - 281 0054 0133 adds r3, r3, #1 - 282 0056 B3F5FA7F cmp r3, #500 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 6 - - - 283 005a 3360 str r3, [r6, #0] - 284 005c E5D3 bcc .L29 - 285 .loc 1 114 0 - 286 005e 0022 movs r2, #0 - 287 .loc 1 115 0 - 288 0060 4FF48063 mov r3, #1024 - 289 .loc 1 114 0 - 290 0064 CAF80020 str r2, [sl, #0] - 291 .loc 1 115 0 - 292 0068 C4F20203 movt r3, 16386 - 293 006c 5A69 ldr r2, [r3, #20] - 294 006e 82F04002 eor r2, r2, #64 - 295 0072 5A61 str r2, [r3, #20] - 296 0074 D9E7 b .L29 - 297 .LVL23: - 298 .L30: - 299 .loc 1 107 0 - 300 0076 03EB8303 add r3, r3, r3, lsl #2 - 301 .LVL24: - 302 007a 0BEBC300 add r0, fp, r3, lsl #3 - 303 007e 0022 movs r2, #0 - 304 0080 FFF7FEFF bl chMBPost - 305 0084 0190 str r0, [sp, #4] - 306 .loc 1 108 0 - 307 0086 0028 cmp r0, #0 - 308 0088 CFD0 beq .L29 - 309 .loc 1 109 0 - 310 008a 40F20002 movw r2, #:lower16:.LANCHOR1 - 311 008e 0123 movs r3, #1 - 312 0090 C0F20002 movt r2, #:upper16:.LANCHOR1 - 313 0094 1360 str r3, [r2, #0] - 314 0096 C8E7 b .L29 - 315 .L32: - 316 .align 2 - 317 .L31: - 318 0098 00000000 .word rlist - 319 009c 00000000 .word .LANCHOR3 - 320 00a0 04000000 .word .LC1 - 321 00a4 00000000 .word .LANCHOR2 - 322 00a8 00000000 .word .LANCHOR0 - 323 .cfi_endproc - 324 .LFE62: - 325 .size WorkerThread, .-WorkerThread - 326 00ac AFF30080 .section .text.printn,"ax",%progbits - 327 .align 2 - 328 .p2align 4,,15 - 329 .thumb - 330 .thumb_func - 331 .type printn, %function - 332 printn: - 333 .LFB67: - 334 .loc 1 185 0 - 335 .cfi_startproc - 336 @ args = 0, pretend = 0, frame = 16 - 337 @ frame_needed = 0, uses_anonymous_args = 0 - 338 .LVL25: - 339 0000 70B5 push {r4, r5, r6, lr} - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 7 - - - 340 .LCFI5: - 341 .cfi_def_cfa_offset 16 - 342 .cfi_offset 14, -4 - 343 .cfi_offset 6, -8 - 344 .cfi_offset 5, -12 - 345 .cfi_offset 4, -16 - 346 0002 84B0 sub sp, sp, #16 - 347 .LCFI6: - 348 .cfi_def_cfa_offset 32 - 349 .loc 1 188 0 - 350 0004 0028 cmp r0, #0 - 351 0006 24D0 beq .L39 - 352 .loc 1 193 0 - 353 0008 4CF6CD42 movw r2, #52429 - 354 .LBB40: - 355 .LBB41: - 356 .loc 1 191 0 - 357 000c 6D46 mov r5, sp - 358 .LBE41: - 359 .LBE40: - 360 .loc 1 188 0 - 361 000e 6C46 mov r4, sp - 362 .loc 1 193 0 - 363 0010 CCF6CC42 movt r2, 52428 - 364 .LVL26: - 365 .L36: - 366 0014 A2FB0013 umull r1, r3, r2, r0 - 367 0018 DB08 lsrs r3, r3, #3 - 368 001a 03EB8301 add r1, r3, r3, lsl #2 - 369 001e A0EB4101 sub r1, r0, r1, lsl #1 - 370 0022 3031 adds r1, r1, #48 - 371 0024 C9B2 uxtb r1, r1 - 372 .loc 1 192 0 - 373 0026 1846 mov r0, r3 - 374 .loc 1 193 0 - 375 0028 04F8011B strb r1, [r4], #1 - 376 .LVL27: - 377 .loc 1 192 0 - 378 002c 002B cmp r3, #0 - 379 002e F1D1 bne .L36 - 380 .loc 1 194 0 - 381 0030 AC42 cmp r4, r5 - 382 0032 0CD9 bls .L33 - 383 0034 0B4E ldr r6, .L41 - 384 .loc 1 185 0 - 385 0036 013C subs r4, r4, #1 - 386 .LVL28: - 387 0038 01E0 b .L37 - 388 .LVL29: - 389 .L40: - 390 .loc 1 194 0 - 391 003a 14F8011D ldrb r1, [r4, #-1]! @ zero_extendqisi2 - 392 .L37: - 393 .loc 1 195 0 - 394 003e 3368 ldr r3, [r6, #0] - 395 0040 0848 ldr r0, .L41 - 396 0042 1B69 ldr r3, [r3, #16] - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 8 - - - 397 0044 4FF0FF32 mov r2, #-1 - 398 0048 9847 blx r3 - 399 .loc 1 194 0 - 400 004a AC42 cmp r4, r5 - 401 004c F5D1 bne .L40 - 402 .L33: - 403 .loc 1 197 0 - 404 004e 04B0 add sp, sp, #16 - 405 0050 70BD pop {r4, r5, r6, pc} - 406 .LVL30: - 407 .L39: - 408 .LBB43: - 409 .LBB42: - 410 .loc 1 189 0 - 411 0052 0448 ldr r0, .L41 - 412 .LVL31: - 413 0054 3021 movs r1, #48 - 414 0056 0368 ldr r3, [r0, #0] - 415 0058 4FF0FF32 mov r2, #-1 - 416 005c 1B69 ldr r3, [r3, #16] - 417 005e 9847 blx r3 - 418 0060 F5E7 b .L33 - 419 .L42: - 420 0062 00BF .align 2 - 421 .L41: - 422 0064 00000000 .word SD1 - 423 .LBE42: - 424 .LBE43: - 425 .cfi_endproc - 426 .LFE67: - 427 .size printn, .-printn - 428 0068 AFF30080 .section .text.startup.main,"ax",%progbits - 428 AFF30080 - 429 .align 2 - 430 .p2align 4,,15 - 431 .global main - 432 .thumb - 433 .thumb_func - 434 .type main, %function - 435 main: - 436 .LFB68: - 437 .loc 1 202 0 - 438 .cfi_startproc - 439 @ args = 0, pretend = 0, frame = 8 - 440 @ frame_needed = 0, uses_anonymous_args = 0 - 441 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, sl, lr} - 442 .LCFI7: - 443 .cfi_def_cfa_offset 32 - 444 .cfi_offset 14, -4 - 445 .cfi_offset 10, -8 - 446 .cfi_offset 9, -12 - 447 .cfi_offset 8, -16 - 448 .cfi_offset 7, -20 - 449 .cfi_offset 6, -24 - 450 .cfi_offset 5, -28 - 451 .cfi_offset 4, -32 - 452 0004 84B0 sub sp, sp, #16 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 9 - - - 453 .LCFI8: - 454 .cfi_def_cfa_offset 48 - 455 .loc 1 213 0 - 456 0006 FFF7FEFF bl halInit - 457 .loc 1 214 0 - 458 000a FFF7FEFF bl chSysInit - 459 .loc 1 219 0 - 460 000e 9048 ldr r0, .L84 - 461 0010 0021 movs r1, #0 - 462 0012 FFF7FEFF bl sdStart - 463 .loc 1 220 0 - 464 0016 0020 movs r0, #0 - 465 0018 C4F20200 movt r0, 16386 - 466 001c 4FF40071 mov r1, #512 - 467 0020 40F28232 movw r2, #898 - 468 0024 FFF7FEFF bl _pal_lld_setgroupmode - 469 .loc 1 221 0 - 470 0028 0020 movs r0, #0 - 471 002a 40F28232 movw r2, #898 - 472 002e C4F20200 movt r0, 16386 - 473 0032 4FF48061 mov r1, #1024 - 474 0036 FFF7FEFF bl _pal_lld_setgroupmode - 475 .loc 1 222 0 - 476 003a 8648 ldr r0, .L84+4 - 477 003c 8649 ldr r1, .L84+8 - 478 003e FFF7FEFF bl gptStart - 479 .loc 1 223 0 - 480 0042 8648 ldr r0, .L84+12 - 481 0044 8649 ldr r1, .L84+16 - 482 0046 FFF7FEFF bl gptStart - 483 .LVL32: - 484 .loc 1 229 0 - 485 004a 864E ldr r6, .L84+20 - 486 .loc 1 230 0 - 487 004c 864D ldr r5, .L84+24 - 488 004e 874F ldr r7, .L84+28 - 489 .loc 1 228 0 - 490 0050 0024 movs r4, #0 - 491 .LVL33: - 492 .L44: - 493 .loc 1 229 0 discriminator 2 - 494 0052 04EB8400 add r0, r4, r4, lsl #2 - 495 0056 3146 mov r1, r6 - 496 0058 0422 movs r2, #4 - 497 005a 07EBC000 add r0, r7, r0, lsl #3 - 498 005e FFF7FEFF bl chMBInit - 499 .loc 1 230 0 discriminator 2 - 500 0062 0094 str r4, [sp, #0] - 501 0064 2846 mov r0, r5 - 502 0066 2C22 movs r2, #44 - 503 0068 4FF49071 mov r1, #288 - 504 006c 804B ldr r3, .L84+32 - 505 .loc 1 228 0 discriminator 2 - 506 006e 0134 adds r4, r4, #1 - 507 .loc 1 230 0 discriminator 2 - 508 0070 FFF7FEFF bl chThdCreateStatic - 509 .LVL34: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 10 - - - 510 .loc 1 228 0 discriminator 2 - 511 0074 1036 adds r6, r6, #16 - 512 0076 042C cmp r4, #4 - 513 0078 05F59075 add r5, r5, #288 - 514 007c E9D1 bne .L44 - 515 .loc 1 237 0 - 516 007e 7D48 ldr r0, .L84+36 - 517 0080 FFF7FEFF bl println - 518 .loc 1 238 0 - 519 0084 7C48 ldr r0, .L84+40 - 520 0086 FFF7FEFF bl println - 521 .loc 1 239 0 - 522 008a 7C4C ldr r4, .L84+44 - 523 .LVL35: - 524 008c 7C48 ldr r0, .L84+48 - 525 008e 704D ldr r5, .L84 - 526 0090 FFF7FEFF bl println - 527 .LVL36: - 528 .loc 1 172 0 - 529 0094 2A21 movs r1, #42 - 530 .LVL37: - 531 .L45: - 532 .LBB44: - 533 .LBB45: - 534 .loc 1 173 0 - 535 0096 2B68 ldr r3, [r5, #0] - 536 0098 6D48 ldr r0, .L84 - 537 009a 1B69 ldr r3, [r3, #16] - 538 009c 4FF0FF32 mov r2, #-1 - 539 00a0 9847 blx r3 - 540 .loc 1 172 0 - 541 00a2 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 542 00a6 0029 cmp r1, #0 - 543 00a8 F5D1 bne .L45 - 544 .LBE45: - 545 .LBE44: - 546 .loc 1 241 0 - 547 00aa 7648 ldr r0, .L84+52 - 548 00ac 764C ldr r4, .L84+56 - 549 00ae FFF7FEFF bl println - 550 .LVL38: - 551 .loc 1 172 0 - 552 00b2 2A21 movs r1, #42 - 553 .LVL39: - 554 .L46: - 555 .LBB46: - 556 .LBB47: - 557 .loc 1 173 0 - 558 00b4 2B68 ldr r3, [r5, #0] - 559 00b6 6648 ldr r0, .L84 - 560 00b8 1B69 ldr r3, [r3, #16] - 561 00ba 4FF0FF32 mov r2, #-1 - 562 00be 9847 blx r3 - 563 .loc 1 172 0 - 564 00c0 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 565 00c4 0029 cmp r1, #0 - 566 00c6 F5D1 bne .L46 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 11 - - - 567 .LBE47: - 568 .LBE46: - 569 .loc 1 244 0 - 570 00c8 7048 ldr r0, .L84+60 - 571 00ca 714C ldr r4, .L84+64 - 572 00cc FFF7FEFF bl println - 573 .LVL40: - 574 .loc 1 172 0 - 575 00d0 2A21 movs r1, #42 - 576 .LVL41: - 577 .L47: - 578 .LBB48: - 579 .LBB49: - 580 .loc 1 173 0 - 581 00d2 2B68 ldr r3, [r5, #0] - 582 00d4 5E48 ldr r0, .L84 - 583 00d6 1B69 ldr r3, [r3, #16] - 584 00d8 4FF0FF32 mov r2, #-1 - 585 00dc 9847 blx r3 - 586 .loc 1 172 0 - 587 00de 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 588 00e2 0029 cmp r1, #0 - 589 00e4 F5D1 bne .L47 - 590 .LBE49: - 591 .LBE48: - 592 .loc 1 247 0 - 593 00e6 6B48 ldr r0, .L84+68 - 594 00e8 6B4C ldr r4, .L84+72 - 595 00ea FFF7FEFF bl println - 596 .LVL42: - 597 .loc 1 172 0 - 598 00ee 2A21 movs r1, #42 - 599 .LVL43: - 600 .L48: - 601 .LBB50: - 602 .LBB51: - 603 .loc 1 173 0 - 604 00f0 2B68 ldr r3, [r5, #0] - 605 00f2 5748 ldr r0, .L84 - 606 00f4 1B69 ldr r3, [r3, #16] - 607 00f6 4FF0FF32 mov r2, #-1 - 608 00fa 9847 blx r3 - 609 .loc 1 172 0 - 610 00fc 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 611 0100 0029 cmp r1, #0 - 612 0102 F5D1 bne .L48 - 613 .LBE51: - 614 .LBE50: - 615 .loc 1 250 0 - 616 0104 6548 ldr r0, .L84+76 - 617 0106 664C ldr r4, .L84+80 - 618 0108 FFF7FEFF bl println - 619 .LVL44: - 620 .loc 1 172 0 - 621 010c 2A21 movs r1, #42 - 622 .LVL45: - 623 .L49: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 12 - - - 624 .LBB52: - 625 .LBB53: - 626 .loc 1 173 0 - 627 010e 2B68 ldr r3, [r5, #0] - 628 0110 4F48 ldr r0, .L84 - 629 0112 1B69 ldr r3, [r3, #16] - 630 0114 4FF0FF32 mov r2, #-1 - 631 0118 9847 blx r3 - 632 .loc 1 172 0 - 633 011a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 634 011e 0029 cmp r1, #0 - 635 0120 F5D1 bne .L49 - 636 .LBE53: - 637 .LBE52: - 638 .loc 1 254 0 - 639 0122 6048 ldr r0, .L84+84 - 640 0124 604C ldr r4, .L84+88 - 641 0126 FFF7FEFF bl println - 642 .LVL46: - 643 .loc 1 172 0 - 644 012a 2A21 movs r1, #42 - 645 .LVL47: - 646 .L50: - 647 .LBB54: - 648 .LBB55: - 649 .loc 1 173 0 - 650 012c 2B68 ldr r3, [r5, #0] - 651 012e 4848 ldr r0, .L84 - 652 0130 1B69 ldr r3, [r3, #16] - 653 0132 4FF0FF32 mov r2, #-1 - 654 0136 9847 blx r3 - 655 .loc 1 172 0 - 656 0138 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 657 013c 0029 cmp r1, #0 - 658 013e F5D1 bne .L50 - 659 .LBE55: - 660 .LBE54: - 661 .loc 1 258 0 - 662 0140 5A48 ldr r0, .L84+92 - 663 0142 FFF7FEFF bl println - 664 .loc 1 260 0 - 665 0146 5A4C ldr r4, .L84+96 - 666 0148 4D48 ldr r0, .L84+48 - 667 014a FFF7FEFF bl println - 668 .LVL48: - 669 .loc 1 172 0 - 670 014e 2A21 movs r1, #42 - 671 .LVL49: - 672 .L51: - 673 .LBB56: - 674 .LBB57: - 675 .loc 1 173 0 - 676 0150 2B68 ldr r3, [r5, #0] - 677 0152 3F48 ldr r0, .L84 - 678 0154 1B69 ldr r3, [r3, #16] - 679 0156 4FF0FF32 mov r2, #-1 - 680 015a 9847 blx r3 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 13 - - - 681 .loc 1 172 0 - 682 015c 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 683 0160 0029 cmp r1, #0 - 684 0162 F5D1 bne .L51 - 685 .LBE57: - 686 .LBE56: - 687 .loc 1 262 0 - 688 0164 4FF49040 mov r0, #18432 - 689 0168 C0F2E810 movt r0, 488 - 690 016c FFF7FEFF bl printn - 691 .loc 1 263 0 - 692 0170 504C ldr r4, .L84+100 - 693 0172 4048 ldr r0, .L84+36 - 694 0174 FFF7FEFF bl println - 695 .LVL50: - 696 .loc 1 172 0 - 697 0178 2A21 movs r1, #42 - 698 .LVL51: - 699 .L52: - 700 .LBB58: - 701 .LBB59: - 702 .loc 1 173 0 - 703 017a 2B68 ldr r3, [r5, #0] - 704 017c 3448 ldr r0, .L84 - 705 017e 1B69 ldr r3, [r3, #16] - 706 0180 4FF0FF32 mov r2, #-1 - 707 0184 9847 blx r3 - 708 .loc 1 172 0 - 709 0186 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 710 018a 0029 cmp r1, #0 - 711 018c F5D1 bne .L52 - 712 .LBE59: - 713 .LBE58: - 714 .loc 1 265 0 - 715 018e 6420 movs r0, #100 - 716 0190 FFF7FEFF bl printn - 717 .loc 1 266 0 - 718 0194 484C ldr r4, .L84+104 - 719 0196 3748 ldr r0, .L84+36 - 720 0198 FFF7FEFF bl println - 721 .LVL52: - 722 .loc 1 172 0 - 723 019c 2A21 movs r1, #42 - 724 .LVL53: - 725 .L53: - 726 .LBB60: - 727 .LBB61: - 728 .loc 1 173 0 - 729 019e 2B68 ldr r3, [r5, #0] - 730 01a0 2B48 ldr r0, .L84 - 731 01a2 1B69 ldr r3, [r3, #16] - 732 01a4 4FF0FF32 mov r2, #-1 - 733 01a8 9847 blx r3 - 734 .loc 1 172 0 - 735 01aa 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 736 01ae 0029 cmp r1, #0 - 737 01b0 F5D1 bne .L53 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 14 - - - 738 .LBE61: - 739 .LBE60: - 740 .loc 1 268 0 - 741 01b2 0846 mov r0, r1 - 742 01b4 FFF7FEFF bl printn - 743 .loc 1 269 0 - 744 01b8 404C ldr r4, .L84+108 - 745 01ba 2E48 ldr r0, .L84+36 - 746 01bc FFF7FEFF bl println - 747 .LVL54: - 748 .loc 1 172 0 - 749 01c0 2A21 movs r1, #42 - 750 .LVL55: - 751 .L54: - 752 .LBB62: - 753 .LBB63: - 754 .loc 1 173 0 - 755 01c2 2B68 ldr r3, [r5, #0] - 756 01c4 2248 ldr r0, .L84 - 757 01c6 1B69 ldr r3, [r3, #16] - 758 01c8 4FF0FF32 mov r2, #-1 - 759 01cc 9847 blx r3 - 760 .loc 1 172 0 - 761 01ce 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 762 01d2 0029 cmp r1, #0 - 763 01d4 F5D1 bne .L54 - 764 .LBE63: - 765 .LBE62: - 766 .loc 1 271 0 - 767 01d6 0420 movs r0, #4 - 768 01d8 FFF7FEFF bl printn - 769 .loc 1 272 0 - 770 01dc 2548 ldr r0, .L84+36 - 771 01de FFF7FEFF bl println - 772 .LVL56: - 773 01e2 374C ldr r4, .L84+112 - 774 .loc 1 172 0 - 775 01e4 2A26 movs r6, #42 - 776 .LVL57: - 777 .L55: - 778 .LBB64: - 779 .LBB65: - 780 .loc 1 173 0 - 781 01e6 2B68 ldr r3, [r5, #0] - 782 01e8 3146 mov r1, r6 - 783 01ea 1B69 ldr r3, [r3, #16] - 784 01ec 1848 ldr r0, .L84 - 785 01ee 4FF0FF32 mov r2, #-1 - 786 01f2 9847 blx r3 - 787 .loc 1 172 0 - 788 01f4 14F8016F ldrb r6, [r4, #1]! @ zero_extendqisi2 - 789 01f8 002E cmp r6, #0 - 790 01fa F4D1 bne .L55 - 791 .LBE65: - 792 .LBE64: - 793 .loc 1 274 0 - 794 01fc 0420 movs r0, #4 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 15 - - - 795 01fe FFF7FEFF bl printn - 796 .loc 1 275 0 - 797 0202 1C48 ldr r0, .L84+36 - 798 0204 FFF7FEFF bl println - 799 .loc 1 277 0 - 800 0208 1A48 ldr r0, .L84+36 - 801 020a FFF7FEFF bl println - 802 .LVL58: - 803 .loc 1 285 0 - 804 020e 4CF6CD48 movw r8, #52429 - 805 0212 2C4F ldr r7, .L84+116 - 806 .loc 1 278 0 - 807 0214 B246 mov sl, r6 - 808 .loc 1 279 0 - 809 0216 4FF00109 mov r9, #1 - 810 .loc 1 285 0 - 811 021a CCF6CC48 movt r8, 52428 - 812 .LVL59: - 813 .L56: - 814 .loc 1 279 0 - 815 021e 2A4C ldr r4, .L84+120 - 816 .loc 1 172 0 - 817 0220 4921 movs r1, #73 - 818 .LVL60: - 819 .L57: - 820 .LBB66: - 821 .LBB67: - 822 .loc 1 173 0 - 823 0222 2B68 ldr r3, [r5, #0] - 824 0224 0A48 ldr r0, .L84 - 825 0226 1B69 ldr r3, [r3, #16] - 826 0228 4FF0FF32 mov r2, #-1 - 827 022c 9847 blx r3 - 828 .loc 1 172 0 - 829 022e 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 830 0232 0029 cmp r1, #0 - 831 0234 F5D1 bne .L57 - 832 .LBE67: - 833 .LBE66: - 834 .loc 1 281 0 - 835 0236 4846 mov r0, r9 - 836 0238 0391 str r1, [sp, #12] - 837 023a FFF7FEFF bl printn - 838 .loc 1 282 0 - 839 023e 0D48 ldr r0, .L84+36 - 840 0240 FFF7FEFF bl println - 841 .loc 1 284 0 - 842 0244 0399 ldr r1, [sp, #12] - 843 .loc 1 285 0 - 844 0246 4FF4FA66 mov r6, #2000 - 845 .loc 1 284 0 - 846 024a 0C46 mov r4, r1 - 847 .loc 1 283 0 - 848 024c 3960 str r1, [r7, #0] - 849 .LVL61: - 850 024e 48E0 b .L60 - 851 .L85: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 16 - - - 852 .align 2 - 853 .L84: - 854 0250 00000000 .word SD1 - 855 0254 00000000 .word GPTD2 - 856 0258 00000000 .word .LANCHOR4 - 857 025c 00000000 .word GPTD3 - 858 0260 00000000 .word .LANCHOR5 - 859 0264 00000000 .word .LANCHOR6 - 860 0268 00000000 .word .LANCHOR7 - 861 026c 00000000 .word .LANCHOR0 - 862 0270 00000000 .word WorkerThread - 863 0274 0C000000 .word .LC2 - 864 0278 10000000 .word .LC3 - 865 027c 40000000 .word .LC5 - 866 0280 3C000000 .word .LC4 - 867 0284 54000000 .word .LC6 - 868 0288 64000000 .word .LC7 - 869 028c 78000000 .word .LC8 - 870 0290 80000000 .word .LC9 - 871 0294 94000000 .word .LC10 - 872 0298 9C000000 .word .LC11 - 873 029c B0000000 .word .LC12 - 874 02a0 BC000000 .word .LC13 - 875 02a4 D0000000 .word .LC14 - 876 02a8 F8000000 .word .LC15 - 877 02ac 0C010000 .word .LC16 - 878 02b0 20010000 .word .LC17 - 879 02b4 34010000 .word .LC18 - 880 02b8 48010000 .word .LC19 - 881 02bc 5C010000 .word .LC20 - 882 02c0 70010000 .word .LC21 - 883 02c4 00000000 .word .LANCHOR1 - 884 02c8 98010000 .word .LC24 - 885 .LVL62: - 886 .L83: - 887 .LBB68: - 888 .LBB69: - 889 .loc 1 173 0 - 890 02cc 2B68 ldr r3, [r5, #0] - 891 02ce 2E21 movs r1, #46 - 892 02d0 1B69 ldr r3, [r3, #16] - 893 02d2 9847 blx r3 - 894 .LVL63: - 895 .LBE69: - 896 .LBE68: - 897 .loc 1 285 0 - 898 02d4 A8FB0623 umull r2, r3, r8, r6 - 899 02d8 A6EBD306 sub r6, r6, r3, lsr #3 - 900 02dc B6B2 uxth r6, r6 - 901 .LVL64: - 902 02de 132E cmp r6, #19 - 903 02e0 27D9 bls .L82 - 904 .LVL65: - 905 .L60: - 906 .loc 1 286 0 - 907 02e2 711E subs r1, r6, #1 - 908 02e4 89B2 uxth r1, r1 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 17 - - - 909 02e6 3748 ldr r0, .L86 - 910 02e8 FFF7FEFF bl gptStartContinuous - 911 .loc 1 287 0 - 912 02ec 711C adds r1, r6, #1 - 913 02ee 89B2 uxth r1, r1 - 914 02f0 3548 ldr r0, .L86+4 - 915 02f2 FFF7FEFF bl gptStartContinuous - 916 .loc 1 288 0 - 917 02f6 4FF47A70 mov r0, #1000 - 918 02fa FFF7FEFF bl chThdSleep - 919 .loc 1 289 0 - 920 02fe 3148 ldr r0, .L86 - 921 0300 FFF7FEFF bl gptStopTimer - 922 .loc 1 290 0 - 923 0304 3048 ldr r0, .L86+4 - 924 0306 FFF7FEFF bl gptStopTimer - 925 .loc 1 291 0 - 926 030a 3B68 ldr r3, [r7, #0] - 927 .LBB70: - 928 .LBB71: - 929 .loc 1 173 0 - 930 030c 2F48 ldr r0, .L86+8 - 931 030e 2321 movs r1, #35 - 932 0310 4FF0FF32 mov r2, #-1 - 933 .LBE71: - 934 .LBE70: - 935 .loc 1 291 0 - 936 0314 002B cmp r3, #0 - 937 0316 D9D0 beq .L83 - 938 .LVL66: - 939 .LBB74: - 940 .LBB72: - 941 .loc 1 173 0 - 942 0318 2B68 ldr r3, [r5, #0] - 943 .LBE72: - 944 .LBE74: - 945 .loc 1 295 0 - 946 031a 002C cmp r4, #0 - 947 031c 08BF it eq - 948 031e 3446 moveq r4, r6 - 949 .LBB75: - 950 .LBB73: - 951 .loc 1 173 0 - 952 0320 1B69 ldr r3, [r3, #16] - 953 0322 9847 blx r3 - 954 .LVL67: - 955 .LBE73: - 956 .LBE75: - 957 .loc 1 285 0 - 958 0324 A8FB0623 umull r2, r3, r8, r6 - 959 0328 A6EBD306 sub r6, r6, r3, lsr #3 - 960 032c B6B2 uxth r6, r6 - 961 .LVL68: - 962 032e 132E cmp r6, #19 - 963 0330 D7D8 bhi .L60 - 964 .LVL69: - 965 .L82: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 18 - - - 966 .loc 1 301 0 - 967 0332 1420 movs r0, #20 - 968 0334 FFF7FEFF bl chThdSleep - 969 .loc 1 302 0 - 970 0338 254E ldr r6, .L86+12 - 971 033a 2648 ldr r0, .L86+16 - 972 033c FFF7FEFF bl println - 973 .LVL70: - 974 .loc 1 172 0 - 975 0340 5321 movs r1, #83 - 976 .LVL71: - 977 .L61: - 978 .LBB76: - 979 .LBB77: - 980 .loc 1 173 0 - 981 0342 2B68 ldr r3, [r5, #0] - 982 0344 2148 ldr r0, .L86+8 - 983 0346 1B69 ldr r3, [r3, #16] - 984 0348 4FF0FF32 mov r2, #-1 - 985 034c 9847 blx r3 - 986 .loc 1 172 0 - 987 034e 16F8011F ldrb r1, [r6, #1]! @ zero_extendqisi2 - 988 0352 0029 cmp r1, #0 - 989 0354 F5D1 bne .L61 - 990 .LBE77: - 991 .LBE76: - 992 .loc 1 304 0 - 993 0356 2046 mov r0, r4 - 994 0358 FFF7FEFF bl printn - 995 .loc 1 305 0 - 996 035c 1E48 ldr r0, .L86+20 - 997 035e FFF7FEFF bl println - 998 .loc 1 279 0 - 999 0362 09F10109 add r9, r9, #1 - 1000 .loc 1 306 0 - 1001 0366 1B48 ldr r0, .L86+16 - 1002 0368 5445 cmp r4, sl - 1003 036a 28BF it cs - 1004 036c A246 movcs sl, r4 - 1005 036e FFF7FEFF bl println - 1006 .loc 1 279 0 - 1007 0372 B9F1650F cmp r9, #101 - 1008 .loc 1 306 0 - 1009 0376 1FFA8AFA uxth sl, sl - 1010 .LVL72: - 1011 .loc 1 279 0 - 1012 037a 7FF450AF bne .L56 - 1013 .loc 1 310 0 - 1014 037e 1148 ldr r0, .L86 - 1015 0380 FFF7FEFF bl gptStopTimer - 1016 .loc 1 311 0 - 1017 0384 154C ldr r4, .L86+24 - 1018 0386 1048 ldr r0, .L86+4 - 1019 0388 FFF7FEFF bl gptStopTimer - 1020 .LVL73: - 1021 .loc 1 172 0 - 1022 038c 5721 movs r1, #87 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 19 - - - 1023 .LVL74: - 1024 .L63: - 1025 .LBB78: - 1026 .LBB79: - 1027 .loc 1 173 0 - 1028 038e 2B68 ldr r3, [r5, #0] - 1029 0390 0E48 ldr r0, .L86+8 - 1030 0392 1B69 ldr r3, [r3, #16] - 1031 0394 4FF0FF32 mov r2, #-1 - 1032 0398 9847 blx r3 - 1033 .loc 1 172 0 - 1034 039a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 1035 039e 0029 cmp r1, #0 - 1036 03a0 F5D1 bne .L63 - 1037 .LBE79: - 1038 .LBE78: - 1039 .loc 1 314 0 - 1040 03a2 5046 mov r0, sl - 1041 03a4 FFF7FEFF bl printn - 1042 .loc 1 315 0 - 1043 03a8 0B48 ldr r0, .L86+20 - 1044 03aa FFF7FEFF bl println - 1045 .loc 1 316 0 - 1046 03ae 0948 ldr r0, .L86+16 - 1047 03b0 FFF7FEFF bl println - 1048 .loc 1 317 0 - 1049 03b4 0A48 ldr r0, .L86+28 - 1050 03b6 FFF7FEFF bl println - 1051 .L64: - 1052 .loc 1 323 0 discriminator 1 - 1053 03ba 41F28830 movw r0, #5000 - 1054 03be FFF7FEFF bl chThdSleep - 1055 03c2 FAE7 b .L64 - 1056 .L87: - 1057 .align 2 - 1058 .L86: - 1059 03c4 00000000 .word GPTD2 - 1060 03c8 00000000 .word GPTD3 - 1061 03cc 00000000 .word SD1 - 1062 03d0 84010000 .word .LC22 - 1063 03d4 0C000000 .word .LC2 - 1064 03d8 94010000 .word .LC23 - 1065 03dc A4010000 .word .LC25 - 1066 03e0 B4010000 .word .LC26 - 1067 .cfi_endproc - 1068 .LFE68: - 1069 .size main, .-main - 1070 03e4 AFF30080 .section .rodata.gpt2cfg,"a",%progbits - 1070 AFF30080 - 1070 AFF30080 - 1071 .align 2 - 1072 .set .LANCHOR4,. + 0 - 1073 .type gpt2cfg, %object - 1074 .size gpt2cfg, 8 - 1075 gpt2cfg: - 1076 0000 40420F00 .word 1000000 - 1077 0004 00000000 .word gpt2cb - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 20 - - - 1078 .section .bss.waWorkerThread,"aw",%nobits - 1079 .align 3 - 1080 .set .LANCHOR7,. + 0 - 1081 .type waWorkerThread, %object - 1082 .size waWorkerThread, 1152 - 1083 waWorkerThread: - 1084 0000 00000000 .space 1152 - 1084 00000000 - 1084 00000000 - 1084 00000000 - 1084 00000000 - 1085 .section .bss.saturated,"aw",%nobits - 1086 .align 2 - 1087 .set .LANCHOR1,. + 0 - 1088 .type saturated, %object - 1089 .size saturated, 4 - 1090 saturated: - 1091 0000 00000000 .space 4 - 1092 .section .rodata.gpt3cfg,"a",%progbits - 1093 .align 2 - 1094 .set .LANCHOR5,. + 0 - 1095 .type gpt3cfg, %object - 1096 .size gpt3cfg, 8 - 1097 gpt3cfg: - 1098 0000 40420F00 .word 1000000 - 1099 0004 00000000 .word gpt3cb - 1100 .section .rodata.str1.4,"aMS",%progbits,1 - 1101 .align 2 - 1102 .LC0: - 1103 0000 0D0A00 .ascii "\015\012\000" - 1104 0003 00 .space 1 - 1105 .LC1: - 1106 0004 776F726B .ascii "worker\000" - 1106 657200 - 1107 000b 00 .space 1 - 1108 .LC2: - 1109 000c 00 .ascii "\000" - 1110 000d 000000 .space 3 - 1111 .LC3: - 1112 0010 2A2A2A20 .ascii "*** ChibiOS/RT IRQ-STORM long duration test\000" - 1112 43686962 - 1112 694F532F - 1112 52542049 - 1112 52512D53 - 1113 .LC4: - 1114 003c 2A2A2A00 .ascii "***\000" - 1115 .LC5: - 1116 0040 2A2A2A20 .ascii "*** Kernel: \000" - 1116 4B65726E - 1116 656C3A20 - 1116 20202020 - 1116 202000 - 1117 0053 00 .space 1 - 1118 .LC6: - 1119 0054 322E332E .ascii "2.3.3unstable\000" - 1119 33756E73 - 1119 7461626C - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 21 - - - 1119 6500 - 1120 0062 0000 .space 2 - 1121 .LC7: - 1122 0064 2A2A2A20 .ascii "*** GCC Version: \000" - 1122 47434320 - 1122 56657273 - 1122 696F6E3A - 1122 202000 - 1123 0077 00 .space 1 - 1124 .LC8: - 1125 0078 342E362E .ascii "4.6.0\000" - 1125 3000 - 1126 007e 0000 .space 2 - 1127 .LC9: - 1128 0080 2A2A2A20 .ascii "*** Architecture: \000" - 1128 41726368 - 1128 69746563 - 1128 74757265 - 1128 3A2000 - 1129 0093 00 .space 1 - 1130 .LC10: - 1131 0094 41524D76 .ascii "ARMv7-M\000" - 1131 372D4D00 - 1132 .LC11: - 1133 009c 2A2A2A20 .ascii "*** Core Variant: \000" - 1133 436F7265 - 1133 20566172 - 1133 69616E74 - 1133 3A2000 - 1134 00af 00 .space 1 - 1135 .LC12: - 1136 00b0 436F7274 .ascii "Cortex-M3\000" - 1136 65782D4D - 1136 3300 - 1137 00ba 0000 .space 2 - 1138 .LC13: - 1139 00bc 2A2A2A20 .ascii "*** Platform: \000" - 1139 506C6174 - 1139 666F726D - 1139 3A202020 - 1139 202000 - 1140 00cf 00 .space 1 - 1141 .LC14: - 1142 00d0 53544D33 .ascii "STM32L Ultra Low Power Medium Density\000" - 1142 324C2055 - 1142 6C747261 - 1142 204C6F77 - 1142 20506F77 - 1143 00f6 0000 .space 2 - 1144 .LC15: - 1145 00f8 2A2A2A20 .ascii "*** Test Board: \000" - 1145 54657374 - 1145 20426F61 - 1145 72643A20 - 1145 202000 - 1146 010b 00 .space 1 - 1147 .LC16: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 22 - - - 1148 010c 53542053 .ascii "ST STM32L-Discovery\000" - 1148 544D3332 - 1148 4C2D4469 - 1148 73636F76 - 1148 65727900 - 1149 .LC17: - 1150 0120 2A2A2A20 .ascii "*** System Clock: \000" - 1150 53797374 - 1150 656D2043 - 1150 6C6F636B - 1150 3A2000 - 1151 0133 00 .space 1 - 1152 .LC18: - 1153 0134 2A2A2A20 .ascii "*** Iterations: \000" - 1153 49746572 - 1153 6174696F - 1153 6E733A20 - 1153 202000 - 1154 0147 00 .space 1 - 1155 .LC19: - 1156 0148 2A2A2A20 .ascii "*** Randomize: \000" - 1156 52616E64 - 1156 6F6D697A - 1156 653A2020 - 1156 202000 - 1157 015b 00 .space 1 - 1158 .LC20: - 1159 015c 2A2A2A20 .ascii "*** Threads: \000" - 1159 54687265 - 1159 6164733A - 1159 20202020 - 1159 202000 - 1160 016f 00 .space 1 - 1161 .LC21: - 1162 0170 2A2A2A20 .ascii "*** Mailbox size: \000" - 1162 4D61696C - 1162 626F7820 - 1162 73697A65 - 1162 3A2000 - 1163 0183 00 .space 1 - 1164 .LC22: - 1165 0184 53617475 .ascii "Saturated at \000" - 1165 72617465 - 1165 64206174 - 1165 2000 - 1166 0192 0000 .space 2 - 1167 .LC23: - 1168 0194 20755300 .ascii " uS\000" - 1169 .LC24: - 1170 0198 49746572 .ascii "Iteration \000" - 1170 6174696F - 1170 6E2000 - 1171 01a3 00 .space 1 - 1172 .LC25: - 1173 01a4 576F7273 .ascii "Worst case at \000" - 1173 74206361 - 1173 73652061 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 23 - - - 1173 742000 - 1174 01b3 00 .space 1 - 1175 .LC26: - 1176 01b4 54657374 .ascii "Test Complete\000" - 1176 20436F6D - 1176 706C6574 - 1176 6500 - 1177 01c2 0000 .section .bss.mb,"aw",%nobits - 1178 .align 2 - 1179 .set .LANCHOR0,. + 0 - 1180 .type mb, %object - 1181 .size mb, 160 - 1182 mb: - 1183 0000 00000000 .space 160 - 1183 00000000 - 1183 00000000 - 1183 00000000 - 1183 00000000 - 1184 .section .bss.b,"aw",%nobits - 1185 .align 2 - 1186 .set .LANCHOR6,. + 0 - 1187 .type b, %object - 1188 .size b, 64 - 1189 b: - 1190 0000 00000000 .space 64 - 1190 00000000 - 1190 00000000 - 1190 00000000 - 1190 00000000 - 1191 .section .bss.x.3441,"aw",%nobits - 1192 .align 2 - 1193 .set .LANCHOR2,. + 0 - 1194 .type x.3441, %object - 1195 .size x.3441, 4 - 1196 x.3441: - 1197 0000 00000000 .space 4 - 1198 .section .bss.cnt.3442,"aw",%nobits - 1199 .align 2 - 1200 .set .LANCHOR3,. + 0 - 1201 .type cnt.3442, %object - 1202 .size cnt.3442, 4 - 1203 cnt.3442: - 1204 0000 00000000 .space 4 - 1205 .text - 1206 .Letext0: - 1207 .file 2 "c:\\programmi\\yagarto\\bin\\../lib/gcc/arm-none-eabi/4.6.0/include/stddef.h" - 1208 .file 3 "c:/programmi/yagarto/lib/gcc/../../arm-none-eabi/sys-include/stdint.h" - 1209 .file 4 "../../../os/ports/GCC/ARMCMx/chtypes.h" - 1210 .file 5 "../../../os/kernel/include/chlists.h" - 1211 .file 6 "../../../os/kernel/include/chthreads.h" - 1212 .file 7 "../../../os/ports/GCC/ARMCMx/chcore_v7m.h" - 1213 .file 8 "../../../os/ports/GCC/ARMCMx/chcore.h" - 1214 .file 9 "../../../os/kernel/include/chschd.h" - 1215 .file 10 "../../../os/kernel/include/chsem.h" - 1216 .file 11 "../../../os/kernel/include/chmtx.h" - 1217 .file 12 "../../../os/kernel/include/chevents.h" - 1218 .file 13 "../../../os/kernel/include/chmboxes.h" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 24 - - - 1219 .file 14 "../../../os/kernel/include/chqueues.h" - 1220 .file 15 "../../../os/kernel/include/chioch.h" - 1221 .file 16 "../../../os/hal/platforms/STM32L1xx/stm32l1xx.h" - 1222 .file 17 "../../../os/hal/platforms/STM32/GPIOv2/pal_lld.h" - 1223 .file 18 "../../../os/hal/include/gpt.h" - 1224 .file 19 "../../../os/hal/platforms/STM32/gpt_lld.h" - 1225 .file 20 "../../../os/hal/include/serial.h" - 1226 .file 21 "../../../os/ports/common/ARMCMx/CMSIS/include/core_cm3.h" - 1227 .file 22 "../../../os/hal/platforms/STM32/serial_lld.h" - 1228 .section .debug_info,"",%progbits - 1229 .Ldebug_info0: - 1230 0000 1F130000 .4byte 0x131f - 1231 0004 0200 .2byte 0x2 - 1232 0006 00000000 .4byte .Ldebug_abbrev0 - 1233 000a 04 .byte 0x4 - 1234 000b 01 .uleb128 0x1 - 1235 000c 15000000 .4byte .LASF191 - 1236 0010 01 .byte 0x1 - 1237 0011 ED030000 .4byte .LASF192 - 1238 0015 80040000 .4byte .LASF193 - 1239 0019 00000000 .4byte 0 - 1240 001d 00000000 .4byte 0 - 1241 0021 50000000 .4byte .Ldebug_ranges0+0x50 - 1242 0025 00000000 .4byte .Ldebug_line0 - 1243 0029 02 .uleb128 0x2 - 1244 002a 51020000 .4byte .LASF10 - 1245 002e 02 .byte 0x2 - 1246 002f D4 .byte 0xd4 - 1247 0030 34000000 .4byte 0x34 - 1248 0034 03 .uleb128 0x3 - 1249 0035 04 .byte 0x4 - 1250 0036 07 .byte 0x7 - 1251 0037 88020000 .4byte .LASF0 - 1252 003b 03 .uleb128 0x3 - 1253 003c 01 .byte 0x1 - 1254 003d 06 .byte 0x6 - 1255 003e 07010000 .4byte .LASF1 - 1256 0042 03 .uleb128 0x3 - 1257 0043 01 .byte 0x1 - 1258 0044 08 .byte 0x8 - 1259 0045 CF040000 .4byte .LASF2 - 1260 0049 03 .uleb128 0x3 - 1261 004a 02 .byte 0x2 - 1262 004b 05 .byte 0x5 - 1263 004c 0F050000 .4byte .LASF3 - 1264 0050 03 .uleb128 0x3 - 1265 0051 02 .byte 0x2 - 1266 0052 07 .byte 0x7 - 1267 0053 12020000 .4byte .LASF4 - 1268 0057 04 .uleb128 0x4 - 1269 0058 04 .byte 0x4 - 1270 0059 05 .byte 0x5 - 1271 005a 696E7400 .ascii "int\000" - 1272 005e 03 .uleb128 0x3 - 1273 005f 08 .byte 0x8 - 1274 0060 05 .byte 0x5 - 1275 0061 F9000000 .4byte .LASF5 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 25 - - - 1276 0065 03 .uleb128 0x3 - 1277 0066 08 .byte 0x8 - 1278 0067 07 .byte 0x7 - 1279 0068 86000000 .4byte .LASF6 - 1280 006c 03 .uleb128 0x3 - 1281 006d 04 .byte 0x4 - 1282 006e 05 .byte 0x5 - 1283 006f A4010000 .4byte .LASF7 - 1284 0073 05 .uleb128 0x5 - 1285 0074 04 .byte 0x4 - 1286 0075 03 .uleb128 0x3 - 1287 0076 04 .byte 0x4 - 1288 0077 07 .byte 0x7 - 1289 0078 B1050000 .4byte .LASF8 - 1290 007c 06 .uleb128 0x6 - 1291 007d 04 .byte 0x4 - 1292 007e 82000000 .4byte 0x82 - 1293 0082 03 .uleb128 0x3 - 1294 0083 01 .byte 0x1 - 1295 0084 08 .byte 0x8 - 1296 0085 D2050000 .4byte .LASF9 - 1297 0089 06 .uleb128 0x6 - 1298 008a 04 .byte 0x4 - 1299 008b 8F000000 .4byte 0x8f - 1300 008f 07 .uleb128 0x7 - 1301 0090 82000000 .4byte 0x82 - 1302 0094 02 .uleb128 0x2 - 1303 0095 A6060000 .4byte .LASF11 - 1304 0099 03 .byte 0x3 - 1305 009a 2A .byte 0x2a - 1306 009b 42000000 .4byte 0x42 - 1307 009f 02 .uleb128 0x2 - 1308 00a0 95020000 .4byte .LASF12 - 1309 00a4 03 .byte 0x3 - 1310 00a5 36 .byte 0x36 - 1311 00a6 50000000 .4byte 0x50 - 1312 00aa 02 .uleb128 0x2 - 1313 00ab C7040000 .4byte .LASF13 - 1314 00af 03 .byte 0x3 - 1315 00b0 4F .byte 0x4f - 1316 00b1 6C000000 .4byte 0x6c - 1317 00b5 02 .uleb128 0x2 - 1318 00b6 75050000 .4byte .LASF14 - 1319 00ba 03 .byte 0x3 - 1320 00bb 50 .byte 0x50 - 1321 00bc 75000000 .4byte 0x75 - 1322 00c0 02 .uleb128 0x2 - 1323 00c1 0C000000 .4byte .LASF15 - 1324 00c5 03 .byte 0x3 - 1325 00c6 78 .byte 0x78 - 1326 00c7 65000000 .4byte 0x65 - 1327 00cb 02 .uleb128 0x2 - 1328 00cc 78000000 .4byte .LASF16 - 1329 00d0 03 .byte 0x3 - 1330 00d1 A6 .byte 0xa6 - 1331 00d2 34000000 .4byte 0x34 - 1332 00d6 02 .uleb128 0x2 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 26 - - - 1333 00d7 1D010000 .4byte .LASF17 - 1334 00db 04 .byte 0x4 - 1335 00dc 27 .byte 0x27 - 1336 00dd AA000000 .4byte 0xaa - 1337 00e1 02 .uleb128 0x2 - 1338 00e2 C9060000 .4byte .LASF18 - 1339 00e6 04 .byte 0x4 - 1340 00e7 28 .byte 0x28 - 1341 00e8 94000000 .4byte 0x94 - 1342 00ec 02 .uleb128 0x2 - 1343 00ed BE010000 .4byte .LASF19 - 1344 00f1 04 .byte 0x4 - 1345 00f2 29 .byte 0x29 - 1346 00f3 94000000 .4byte 0x94 - 1347 00f7 02 .uleb128 0x2 - 1348 00f8 1B040000 .4byte .LASF20 - 1349 00fc 04 .byte 0x4 - 1350 00fd 2A .byte 0x2a - 1351 00fe 94000000 .4byte 0x94 - 1352 0102 02 .uleb128 0x2 - 1353 0103 70040000 .4byte .LASF21 - 1354 0107 04 .byte 0x4 - 1355 0108 2B .byte 0x2b - 1356 0109 B5000000 .4byte 0xb5 - 1357 010d 02 .uleb128 0x2 - 1358 010e 0C030000 .4byte .LASF22 - 1359 0112 04 .byte 0x4 - 1360 0113 2C .byte 0x2c - 1361 0114 AA000000 .4byte 0xaa - 1362 0118 02 .uleb128 0x2 - 1363 0119 4A030000 .4byte .LASF23 - 1364 011d 04 .byte 0x4 - 1365 011e 2E .byte 0x2e - 1366 011f B5000000 .4byte 0xb5 - 1367 0123 02 .uleb128 0x2 - 1368 0124 16060000 .4byte .LASF24 - 1369 0128 04 .byte 0x4 - 1370 0129 2F .byte 0x2f - 1371 012a B5000000 .4byte 0xb5 - 1372 012e 02 .uleb128 0x2 - 1373 012f AC030000 .4byte .LASF25 - 1374 0133 04 .byte 0x4 - 1375 0134 30 .byte 0x30 - 1376 0135 AA000000 .4byte 0xaa - 1377 0139 02 .uleb128 0x2 - 1378 013a 46050000 .4byte .LASF26 - 1379 013e 05 .byte 0x5 - 1380 013f 23 .byte 0x23 - 1381 0140 44010000 .4byte 0x144 - 1382 0144 08 .uleb128 0x8 - 1383 0145 46050000 .4byte .LASF26 - 1384 0149 48 .byte 0x48 - 1385 014a 06 .byte 0x6 - 1386 014b 4D .byte 0x4d - 1387 014c 5B020000 .4byte 0x25b - 1388 0150 09 .uleb128 0x9 - 1389 0151 27050000 .4byte .LASF27 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 27 - - - 1390 0155 06 .byte 0x6 - 1391 0156 4E .byte 0x4e - 1392 0157 80020000 .4byte 0x280 - 1393 015b 02 .byte 0x2 - 1394 015c 23 .byte 0x23 - 1395 015d 00 .uleb128 0 - 1396 015e 09 .uleb128 0x9 - 1397 015f 55040000 .4byte .LASF28 - 1398 0163 06 .byte 0x6 - 1399 0164 50 .byte 0x50 - 1400 0165 80020000 .4byte 0x280 - 1401 0169 02 .byte 0x2 - 1402 016a 23 .byte 0x23 - 1403 016b 04 .uleb128 0x4 - 1404 016c 09 .uleb128 0x9 - 1405 016d E0000000 .4byte .LASF29 - 1406 0171 06 .byte 0x6 - 1407 0172 52 .byte 0x52 - 1408 0173 02010000 .4byte 0x102 - 1409 0177 02 .byte 0x2 - 1410 0178 23 .byte 0x23 - 1411 0179 08 .uleb128 0x8 - 1412 017a 09 .uleb128 0x9 - 1413 017b 02070000 .4byte .LASF30 - 1414 017f 06 .byte 0x6 - 1415 0180 53 .byte 0x53 - 1416 0181 52030000 .4byte 0x352 - 1417 0185 02 .byte 0x2 - 1418 0186 23 .byte 0x23 - 1419 0187 0C .uleb128 0xc - 1420 0188 09 .uleb128 0x9 - 1421 0189 E6010000 .4byte .LASF31 - 1422 018d 06 .byte 0x6 - 1423 018e 55 .byte 0x55 - 1424 018f 80020000 .4byte 0x280 - 1425 0193 02 .byte 0x2 - 1426 0194 23 .byte 0x23 - 1427 0195 10 .uleb128 0x10 - 1428 0196 09 .uleb128 0x9 - 1429 0197 C2030000 .4byte .LASF32 - 1430 019b 06 .byte 0x6 - 1431 019c 56 .byte 0x56 - 1432 019d 80020000 .4byte 0x280 - 1433 01a1 02 .byte 0x2 - 1434 01a2 23 .byte 0x23 - 1435 01a3 14 .uleb128 0x14 - 1436 01a4 09 .uleb128 0x9 - 1437 01a5 2B060000 .4byte .LASF33 - 1438 01a9 06 .byte 0x6 - 1439 01aa 5D .byte 0x5d - 1440 01ab 89000000 .4byte 0x89 - 1441 01af 02 .byte 0x2 - 1442 01b0 23 .byte 0x23 - 1443 01b1 18 .uleb128 0x18 - 1444 01b2 09 .uleb128 0x9 - 1445 01b3 FD040000 .4byte .LASF34 - 1446 01b7 06 .byte 0x6 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 28 - - - 1447 01b8 68 .byte 0x68 - 1448 01b9 EC000000 .4byte 0xec - 1449 01bd 02 .byte 0x2 - 1450 01be 23 .byte 0x23 - 1451 01bf 1C .uleb128 0x1c - 1452 01c0 09 .uleb128 0x9 - 1453 01c1 2E050000 .4byte .LASF35 - 1454 01c5 06 .byte 0x6 - 1455 01c6 6C .byte 0x6c - 1456 01c7 E1000000 .4byte 0xe1 - 1457 01cb 02 .byte 0x2 - 1458 01cc 23 .byte 0x23 - 1459 01cd 1D .uleb128 0x1d - 1460 01ce 09 .uleb128 0x9 - 1461 01cf C7010000 .4byte .LASF36 - 1462 01d3 06 .byte 0x6 - 1463 01d4 71 .byte 0x71 - 1464 01d5 F7000000 .4byte 0xf7 - 1465 01d9 02 .byte 0x2 - 1466 01da 23 .byte 0x23 - 1467 01db 1E .uleb128 0x1e - 1468 01dc 09 .uleb128 0x9 - 1469 01dd DF010000 .4byte .LASF37 - 1470 01e1 06 .byte 0x6 - 1471 01e2 78 .byte 0x78 - 1472 01e3 73030000 .4byte 0x373 - 1473 01e7 02 .byte 0x2 - 1474 01e8 23 .byte 0x23 - 1475 01e9 20 .uleb128 0x20 - 1476 01ea 0A .uleb128 0xa - 1477 01eb 705F7500 .ascii "p_u\000" - 1478 01ef 06 .byte 0x6 - 1479 01f0 9D .byte 0x9d - 1480 01f1 46050000 .4byte 0x546 - 1481 01f5 02 .byte 0x2 - 1482 01f6 23 .byte 0x23 - 1483 01f7 24 .uleb128 0x24 - 1484 01f8 09 .uleb128 0x9 - 1485 01f9 08070000 .4byte .LASF38 - 1486 01fd 06 .byte 0x6 - 1487 01fe A2 .byte 0xa2 - 1488 01ff A8020000 .4byte 0x2a8 - 1489 0203 02 .byte 0x2 - 1490 0204 23 .byte 0x23 - 1491 0205 28 .uleb128 0x28 - 1492 0206 09 .uleb128 0x9 - 1493 0207 B5020000 .4byte .LASF39 - 1494 020b 06 .byte 0x6 - 1495 020c A8 .byte 0xa8 - 1496 020d 86020000 .4byte 0x286 - 1497 0211 02 .byte 0x2 - 1498 0212 23 .byte 0x23 - 1499 0213 2C .uleb128 0x2c - 1500 0214 09 .uleb128 0x9 - 1501 0215 E3050000 .4byte .LASF40 - 1502 0219 06 .byte 0x6 - 1503 021a AC .byte 0xac - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 29 - - - 1504 021b 0D010000 .4byte 0x10d - 1505 021f 02 .byte 0x2 - 1506 0220 23 .byte 0x23 - 1507 0221 34 .uleb128 0x34 - 1508 0222 09 .uleb128 0x9 - 1509 0223 4D050000 .4byte .LASF41 - 1510 0227 06 .byte 0x6 - 1511 0228 B2 .byte 0xb2 - 1512 0229 18010000 .4byte 0x118 - 1513 022d 02 .byte 0x2 - 1514 022e 23 .byte 0x23 - 1515 022f 38 .uleb128 0x38 - 1516 0230 09 .uleb128 0x9 - 1517 0231 05050000 .4byte .LASF42 - 1518 0235 06 .byte 0x6 - 1519 0236 B9 .byte 0xb9 - 1520 0237 7B050000 .4byte 0x57b - 1521 023b 02 .byte 0x2 - 1522 023c 23 .byte 0x23 - 1523 023d 3C .uleb128 0x3c - 1524 023e 09 .uleb128 0x9 - 1525 023f 20060000 .4byte .LASF43 - 1526 0243 06 .byte 0x6 - 1527 0244 BD .byte 0xbd - 1528 0245 02010000 .4byte 0x102 - 1529 0249 02 .byte 0x2 - 1530 024a 23 .byte 0x23 - 1531 024b 40 .uleb128 0x40 - 1532 024c 09 .uleb128 0x9 - 1533 024d 04030000 .4byte .LASF44 - 1534 0251 06 .byte 0x6 - 1535 0252 C3 .byte 0xc3 - 1536 0253 73000000 .4byte 0x73 - 1537 0257 02 .byte 0x2 - 1538 0258 23 .byte 0x23 - 1539 0259 44 .uleb128 0x44 - 1540 025a 00 .byte 0 - 1541 025b 0B .uleb128 0xb - 1542 025c 08 .byte 0x8 - 1543 025d 05 .byte 0x5 - 1544 025e 5A .byte 0x5a - 1545 025f 80020000 .4byte 0x280 - 1546 0263 09 .uleb128 0x9 - 1547 0264 27050000 .4byte .LASF27 - 1548 0268 05 .byte 0x5 - 1549 0269 5B .byte 0x5b - 1550 026a 80020000 .4byte 0x280 - 1551 026e 02 .byte 0x2 - 1552 026f 23 .byte 0x23 - 1553 0270 00 .uleb128 0 - 1554 0271 09 .uleb128 0x9 - 1555 0272 55040000 .4byte .LASF28 - 1556 0276 05 .byte 0x5 - 1557 0277 5D .byte 0x5d - 1558 0278 80020000 .4byte 0x280 - 1559 027c 02 .byte 0x2 - 1560 027d 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 30 - - - 1561 027e 04 .uleb128 0x4 - 1562 027f 00 .byte 0 - 1563 0280 06 .uleb128 0x6 - 1564 0281 04 .byte 0x4 - 1565 0282 39010000 .4byte 0x139 - 1566 0286 02 .uleb128 0x2 - 1567 0287 D0030000 .4byte .LASF45 - 1568 028b 05 .byte 0x5 - 1569 028c 5F .byte 0x5f - 1570 028d 5B020000 .4byte 0x25b - 1571 0291 0B .uleb128 0xb - 1572 0292 04 .byte 0x4 - 1573 0293 05 .byte 0x5 - 1574 0294 64 .byte 0x64 - 1575 0295 A8020000 .4byte 0x2a8 - 1576 0299 09 .uleb128 0x9 - 1577 029a 27050000 .4byte .LASF27 - 1578 029e 05 .byte 0x5 - 1579 029f 66 .byte 0x66 - 1580 02a0 80020000 .4byte 0x280 - 1581 02a4 02 .byte 0x2 - 1582 02a5 23 .byte 0x23 - 1583 02a6 00 .uleb128 0 - 1584 02a7 00 .byte 0 - 1585 02a8 02 .uleb128 0x2 - 1586 02a9 3E030000 .4byte .LASF46 - 1587 02ad 05 .byte 0x5 - 1588 02ae 69 .byte 0x69 - 1589 02af 91020000 .4byte 0x291 - 1590 02b3 02 .uleb128 0x2 - 1591 02b4 48020000 .4byte .LASF47 - 1592 02b8 07 .byte 0x7 - 1593 02b9 88 .byte 0x88 - 1594 02ba 73000000 .4byte 0x73 - 1595 02be 08 .uleb128 0x8 - 1596 02bf 57060000 .4byte .LASF48 - 1597 02c3 24 .byte 0x24 - 1598 02c4 07 .byte 0x7 - 1599 02c5 96 .byte 0x96 - 1600 02c6 42030000 .4byte 0x342 - 1601 02ca 0A .uleb128 0xa - 1602 02cb 723400 .ascii "r4\000" - 1603 02ce 07 .byte 0x7 - 1604 02cf 97 .byte 0x97 - 1605 02d0 B3020000 .4byte 0x2b3 - 1606 02d4 02 .byte 0x2 - 1607 02d5 23 .byte 0x23 - 1608 02d6 00 .uleb128 0 - 1609 02d7 0A .uleb128 0xa - 1610 02d8 723500 .ascii "r5\000" - 1611 02db 07 .byte 0x7 - 1612 02dc 98 .byte 0x98 - 1613 02dd B3020000 .4byte 0x2b3 - 1614 02e1 02 .byte 0x2 - 1615 02e2 23 .byte 0x23 - 1616 02e3 04 .uleb128 0x4 - 1617 02e4 0A .uleb128 0xa - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 31 - - - 1618 02e5 723600 .ascii "r6\000" - 1619 02e8 07 .byte 0x7 - 1620 02e9 99 .byte 0x99 - 1621 02ea B3020000 .4byte 0x2b3 - 1622 02ee 02 .byte 0x2 - 1623 02ef 23 .byte 0x23 - 1624 02f0 08 .uleb128 0x8 - 1625 02f1 0A .uleb128 0xa - 1626 02f2 723700 .ascii "r7\000" - 1627 02f5 07 .byte 0x7 - 1628 02f6 9A .byte 0x9a - 1629 02f7 B3020000 .4byte 0x2b3 - 1630 02fb 02 .byte 0x2 - 1631 02fc 23 .byte 0x23 - 1632 02fd 0C .uleb128 0xc - 1633 02fe 0A .uleb128 0xa - 1634 02ff 723800 .ascii "r8\000" - 1635 0302 07 .byte 0x7 - 1636 0303 9B .byte 0x9b - 1637 0304 B3020000 .4byte 0x2b3 - 1638 0308 02 .byte 0x2 - 1639 0309 23 .byte 0x23 - 1640 030a 10 .uleb128 0x10 - 1641 030b 0A .uleb128 0xa - 1642 030c 723900 .ascii "r9\000" - 1643 030f 07 .byte 0x7 - 1644 0310 9C .byte 0x9c - 1645 0311 B3020000 .4byte 0x2b3 - 1646 0315 02 .byte 0x2 - 1647 0316 23 .byte 0x23 - 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C0000000 .4byte 0xc0 - 1681 0352 08 .uleb128 0x8 - 1682 0353 45060000 .4byte .LASF50 - 1683 0357 04 .byte 0x4 - 1684 0358 08 .byte 0x8 - 1685 0359 E9 .byte 0xe9 - 1686 035a 6D030000 .4byte 0x36d - 1687 035e 0A .uleb128 0xa - 1688 035f 72313300 .ascii "r13\000" - 1689 0363 08 .byte 0x8 - 1690 0364 EA .byte 0xea - 1691 0365 6D030000 .4byte 0x36d - 1692 0369 02 .byte 0x2 - 1693 036a 23 .byte 0x23 - 1694 036b 00 .uleb128 0 - 1695 036c 00 .byte 0 - 1696 036d 06 .uleb128 0x6 - 1697 036e 04 .byte 0x4 - 1698 036f BE020000 .4byte 0x2be - 1699 0373 0C .uleb128 0xc - 1700 0374 23010000 .4byte 0x123 - 1701 0378 0B .uleb128 0xb - 1702 0379 20 .byte 0x20 - 1703 037a 09 .byte 0x9 - 1704 037b 57 .byte 0x57 - 1705 037c E3030000 .4byte 0x3e3 - 1706 0380 09 .uleb128 0x9 - 1707 0381 88050000 .4byte .LASF51 - 1708 0385 09 .byte 0x9 - 1709 0386 58 .byte 0x58 - 1710 0387 86020000 .4byte 0x286 - 1711 038b 02 .byte 0x2 - 1712 038c 23 .byte 0x23 - 1713 038d 00 .uleb128 0 - 1714 038e 09 .uleb128 0x9 - 1715 038f 19050000 .4byte .LASF52 - 1716 0393 09 .byte 0x9 - 1717 0394 59 .byte 0x59 - 1718 0395 02010000 .4byte 0x102 - 1719 0399 02 .byte 0x2 - 1720 039a 23 .byte 0x23 - 1721 039b 08 .uleb128 0x8 - 1722 039c 09 .uleb128 0x9 - 1723 039d CA030000 .4byte .LASF53 - 1724 03a1 09 .byte 0x9 - 1725 03a2 5B .byte 0x5b - 1726 03a3 52030000 .4byte 0x352 - 1727 03a7 02 .byte 0x2 - 1728 03a8 23 .byte 0x23 - 1729 03a9 0C .uleb128 0xc - 1730 03aa 09 .uleb128 0x9 - 1731 03ab 36020000 .4byte .LASF54 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 33 - - - 1732 03af 09 .byte 0x9 - 1733 03b0 5E .byte 0x5e - 1734 03b1 80020000 .4byte 0x280 - 1735 03b5 02 .byte 0x2 - 1736 03b6 23 .byte 0x23 - 1737 03b7 10 .uleb128 0x10 - 1738 03b8 09 .uleb128 0x9 - 1739 03b9 F4030000 .4byte .LASF55 - 1740 03bd 09 .byte 0x9 - 1741 03be 5F .byte 0x5f - 1742 03bf 80020000 .4byte 0x280 - 1743 03c3 02 .byte 0x2 - 1744 03c4 23 .byte 0x23 - 1745 03c5 14 .uleb128 0x14 - 1746 03c6 09 .uleb128 0x9 - 1747 03c7 BD040000 .4byte .LASF56 - 1748 03cb 09 .byte 0x9 - 1749 03cc 63 .byte 0x63 - 1750 03cd 2E010000 .4byte 0x12e - 1751 03d1 02 .byte 0x2 - 1752 03d2 23 .byte 0x23 - 1753 03d3 18 .uleb128 0x18 - 1754 03d4 09 .uleb128 0x9 - 1755 03d5 C3050000 .4byte .LASF57 - 1756 03d9 09 .byte 0x9 - 1757 03da 65 .byte 0x65 - 1758 03db 80020000 .4byte 0x280 - 1759 03df 02 .byte 0x2 - 1760 03e0 23 .byte 0x23 - 1761 03e1 1C .uleb128 0x1c - 1762 03e2 00 .byte 0 - 1763 03e3 02 .uleb128 0x2 - 1764 03e4 8D060000 .4byte .LASF58 - 1765 03e8 09 .byte 0x9 - 1766 03e9 67 .byte 0x67 - 1767 03ea 78030000 .4byte 0x378 - 1768 03ee 08 .uleb128 0x8 - 1769 03ef 67060000 .4byte .LASF59 - 1770 03f3 0C .byte 0xc - 1771 03f4 0A .byte 0xa - 1772 03f5 25 .byte 0x25 - 1773 03f6 17040000 .4byte 0x417 - 1774 03fa 09 .uleb128 0x9 - 1775 03fb FC010000 .4byte .LASF60 - 1776 03ff 0A .byte 0xa - 1777 0400 26 .byte 0x26 - 1778 0401 86020000 .4byte 0x286 - 1779 0405 02 .byte 0x2 - 1780 0406 23 .byte 0x23 - 1781 0407 00 .uleb128 0 - 1782 0408 09 .uleb128 0x9 - 1783 0409 E3020000 .4byte .LASF61 - 1784 040d 0A .byte 0xa - 1785 040e 28 .byte 0x28 - 1786 040f 2E010000 .4byte 0x12e - 1787 0413 02 .byte 0x2 - 1788 0414 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 34 - - - 1789 0415 08 .uleb128 0x8 - 1790 0416 00 .byte 0 - 1791 0417 02 .uleb128 0x2 - 1792 0418 67060000 .4byte .LASF59 - 1793 041c 0A .byte 0xa - 1794 041d 29 .byte 0x29 - 1795 041e EE030000 .4byte 0x3ee - 1796 0422 08 .uleb128 0x8 - 1797 0423 9C030000 .4byte .LASF62 - 1798 0427 10 .byte 0x10 - 1799 0428 0B .byte 0xb - 1800 0429 25 .byte 0x25 - 1801 042a 59040000 .4byte 0x459 - 1802 042e 09 .uleb128 0x9 - 1803 042f 24010000 .4byte .LASF63 - 1804 0433 0B .byte 0xb - 1805 0434 26 .byte 0x26 - 1806 0435 86020000 .4byte 0x286 - 1807 0439 02 .byte 0x2 - 1808 043a 23 .byte 0x23 - 1809 043b 00 .uleb128 0 - 1810 043c 09 .uleb128 0x9 - 1811 043d FA060000 .4byte .LASF64 - 1812 0441 0B .byte 0xb - 1813 0442 28 .byte 0x28 - 1814 0443 80020000 .4byte 0x280 - 1815 0447 02 .byte 0x2 - 1816 0448 23 .byte 0x23 - 1817 0449 08 .uleb128 0x8 - 1818 044a 09 .uleb128 0x9 - 1819 044b 0F060000 .4byte .LASF65 - 1820 044f 0B .byte 0xb - 1821 0450 2A .byte 0x2a - 1822 0451 59040000 .4byte 0x459 - 1823 0455 02 .byte 0x2 - 1824 0456 23 .byte 0x23 - 1825 0457 0C .uleb128 0xc - 1826 0458 00 .byte 0 - 1827 0459 06 .uleb128 0x6 - 1828 045a 04 .byte 0x4 - 1829 045b 22040000 .4byte 0x422 - 1830 045f 02 .uleb128 0x2 - 1831 0460 9C030000 .4byte .LASF62 - 1832 0464 0B .byte 0xb - 1833 0465 2C .byte 0x2c - 1834 0466 22040000 .4byte 0x422 - 1835 046a 02 .uleb128 0x2 - 1836 046b B4060000 .4byte .LASF66 - 1837 046f 0C .byte 0xc - 1838 0470 22 .byte 0x22 - 1839 0471 75040000 .4byte 0x475 - 1840 0475 08 .uleb128 0x8 - 1841 0476 B4060000 .4byte .LASF66 - 1842 047a 0C .byte 0xc - 1843 047b 0C .byte 0xc - 1844 047c 27 .byte 0x27 - 1845 047d AC040000 .4byte 0x4ac - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 35 - - - 1846 0481 09 .uleb128 0x9 - 1847 0482 36050000 .4byte .LASF67 - 1848 0486 0C .byte 0xc - 1849 0487 28 .byte 0x28 - 1850 0488 AC040000 .4byte 0x4ac - 1851 048c 02 .byte 0x2 - 1852 048d 23 .byte 0x23 - 1853 048e 00 .uleb128 0 - 1854 048f 09 .uleb128 0x9 - 1855 0490 E4040000 .4byte .LASF68 - 1856 0494 0C .byte 0xc - 1857 0495 2B .byte 0x2b - 1858 0496 80020000 .4byte 0x280 - 1859 049a 02 .byte 0x2 - 1860 049b 23 .byte 0x23 - 1861 049c 04 .uleb128 0x4 - 1862 049d 09 .uleb128 0x9 - 1863 049e B2030000 .4byte .LASF69 - 1864 04a2 0C .byte 0xc - 1865 04a3 2D .byte 0x2d - 1866 04a4 18010000 .4byte 0x118 - 1867 04a8 02 .byte 0x2 - 1868 04a9 23 .byte 0x23 - 1869 04aa 08 .uleb128 0x8 - 1870 04ab 00 .byte 0 - 1871 04ac 06 .uleb128 0x6 - 1872 04ad 04 .byte 0x4 - 1873 04ae 6A040000 .4byte 0x46a - 1874 04b2 08 .uleb128 0x8 - 1875 04b3 6B020000 .4byte .LASF70 - 1876 04b7 04 .byte 0x4 - 1877 04b8 0C .byte 0xc - 1878 04b9 35 .byte 0x35 - 1879 04ba CD040000 .4byte 0x4cd - 1880 04be 09 .uleb128 0x9 - 1881 04bf 85060000 .4byte .LASF71 - 1882 04c3 0C .byte 0xc - 1883 04c4 36 .byte 0x36 - 1884 04c5 AC040000 .4byte 0x4ac - 1885 04c9 02 .byte 0x2 - 1886 04ca 23 .byte 0x23 - 1887 04cb 00 .uleb128 0 - 1888 04cc 00 .byte 0 - 1889 04cd 02 .uleb128 0x2 - 1890 04ce 6B020000 .4byte .LASF70 - 1891 04d2 0C .byte 0xc - 1892 04d3 39 .byte 0x39 - 1893 04d4 B2040000 .4byte 0x4b2 - 1894 04d8 0B .uleb128 0xb - 1895 04d9 28 .byte 0x28 - 1896 04da 0D .byte 0xd - 1897 04db 2C .byte 0x2c - 1898 04dc 35050000 .4byte 0x535 - 1899 04e0 09 .uleb128 0x9 - 1900 04e1 DD030000 .4byte .LASF72 - 1901 04e5 0D .byte 0xd - 1902 04e6 2D .byte 0x2d - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 36 - - - 1903 04e7 35050000 .4byte 0x535 - 1904 04eb 02 .byte 0x2 - 1905 04ec 23 .byte 0x23 - 1906 04ed 00 .uleb128 0 - 1907 04ee 09 .uleb128 0x9 - 1908 04ef DD040000 .4byte .LASF73 - 1909 04f3 0D .byte 0xd - 1910 04f4 2F .byte 0x2f - 1911 04f5 35050000 .4byte 0x535 - 1912 04f9 02 .byte 0x2 - 1913 04fa 23 .byte 0x23 - 1914 04fb 04 .uleb128 0x4 - 1915 04fc 09 .uleb128 0x9 - 1916 04fd F1060000 .4byte .LASF74 - 1917 0501 0D .byte 0xd - 1918 0502 31 .byte 0x31 - 1919 0503 35050000 .4byte 0x535 - 1920 0507 02 .byte 0x2 - 1921 0508 23 .byte 0x23 - 1922 0509 08 .uleb128 0x8 - 1923 050a 09 .uleb128 0x9 - 1924 050b 93030000 .4byte .LASF75 - 1925 050f 0D .byte 0xd - 1926 0510 32 .byte 0x32 - 1927 0511 35050000 .4byte 0x535 - 1928 0515 02 .byte 0x2 - 1929 0516 23 .byte 0x23 - 1930 0517 0C .uleb128 0xc - 1931 0518 09 .uleb128 0x9 - 1932 0519 40000000 .4byte .LASF76 - 1933 051d 0D .byte 0xd - 1934 051e 33 .byte 0x33 - 1935 051f 17040000 .4byte 0x417 - 1936 0523 02 .byte 0x2 - 1937 0524 23 .byte 0x23 - 1938 0525 10 .uleb128 0x10 - 1939 0526 09 .uleb128 0x9 - 1940 0527 CD020000 .4byte .LASF77 - 1941 052b 0D .byte 0xd - 1942 052c 35 .byte 0x35 - 1943 052d 17040000 .4byte 0x417 - 1944 0531 02 .byte 0x2 - 1945 0532 23 .byte 0x23 - 1946 0533 1C .uleb128 0x1c - 1947 0534 00 .byte 0 - 1948 0535 06 .uleb128 0x6 - 1949 0536 04 .byte 0x4 - 1950 0537 0D010000 .4byte 0x10d - 1951 053b 02 .uleb128 0x2 - 1952 053c 6A000000 .4byte .LASF78 - 1953 0540 0D .byte 0xd - 1954 0541 37 .byte 0x37 - 1955 0542 D8040000 .4byte 0x4d8 - 1956 0546 0D .uleb128 0xd - 1957 0547 04 .byte 0x4 - 1958 0548 06 .byte 0x6 - 1959 0549 7F .byte 0x7f - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 37 - - - 1960 054a 7B050000 .4byte 0x57b - 1961 054e 0E .uleb128 0xe - 1962 054f 05000000 .4byte .LASF79 - 1963 0553 06 .byte 0x6 - 1964 0554 86 .byte 0x86 - 1965 0555 0D010000 .4byte 0x10d - 1966 0559 0E .uleb128 0xe - 1967 055a A3000000 .4byte .LASF80 - 1968 055e 06 .byte 0x6 - 1969 055f 8D .byte 0x8d - 1970 0560 0D010000 .4byte 0x10d - 1971 0564 0E .uleb128 0xe - 1972 0565 C2060000 .4byte .LASF81 - 1973 0569 06 .byte 0x6 - 1974 056a 94 .byte 0x94 - 1975 056b 73000000 .4byte 0x73 - 1976 056f 0E .uleb128 0xe - 1977 0570 20050000 .4byte .LASF82 - 1978 0574 06 .byte 0x6 - 1979 0575 9B .byte 0x9b - 1980 0576 18010000 .4byte 0x118 - 1981 057a 00 .byte 0 - 1982 057b 06 .uleb128 0x6 - 1983 057c 04 .byte 0x4 - 1984 057d 5F040000 .4byte 0x45f - 1985 0581 02 .uleb128 0x2 - 1986 0582 6B030000 .4byte .LASF83 - 1987 0586 0E .byte 0xe - 1988 0587 30 .byte 0x30 - 1989 0588 8C050000 .4byte 0x58c - 1990 058c 08 .uleb128 0x8 - 1991 058d 6B030000 .4byte .LASF83 - 1992 0591 20 .byte 0x20 - 1993 0592 0E .byte 0xe - 1994 0593 3E .byte 0x3e - 1995 0594 FB050000 .4byte 0x5fb - 1996 0598 09 .uleb128 0x9 - 1997 0599 11040000 .4byte .LASF84 - 1998 059d 0E .byte 0xe - 1999 059e 3F .byte 0x3f - 2000 059f 86020000 .4byte 0x286 - 2001 05a3 02 .byte 0x2 - 2002 05a4 23 .byte 0x23 - 2003 05a5 00 .uleb128 0 - 2004 05a6 09 .uleb128 0x9 - 2005 05a7 89030000 .4byte .LASF85 - 2006 05ab 0E .byte 0xe - 2007 05ac 40 .byte 0x40 - 2008 05ad 29000000 .4byte 0x29 - 2009 05b1 02 .byte 0x2 - 2010 05b2 23 .byte 0x23 - 2011 05b3 08 .uleb128 0x8 - 2012 05b4 09 .uleb128 0x9 - 2013 05b5 CE010000 .4byte .LASF86 - 2014 05b9 0E .byte 0xe - 2015 05ba 41 .byte 0x41 - 2016 05bb 1E060000 .4byte 0x61e - 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.byte 0x2 - 2050 05f8 23 .byte 0x23 - 2051 05f9 1C .uleb128 0x1c - 2052 05fa 00 .byte 0 - 2053 05fb 02 .uleb128 0x2 - 2054 05fc 61030000 .4byte .LASF91 - 2055 0600 0E .byte 0xe - 2056 0601 33 .byte 0x33 - 2057 0602 06060000 .4byte 0x606 - 2058 0606 06 .uleb128 0x6 - 2059 0607 04 .byte 0x4 - 2060 0608 0C060000 .4byte 0x60c - 2061 060c 0F .uleb128 0xf - 2062 060d 01 .byte 0x1 - 2063 060e 18060000 .4byte 0x618 - 2064 0612 10 .uleb128 0x10 - 2065 0613 18060000 .4byte 0x618 - 2066 0617 00 .byte 0 - 2067 0618 06 .uleb128 0x6 - 2068 0619 04 .byte 0x4 - 2069 061a 81050000 .4byte 0x581 - 2070 061e 06 .uleb128 0x6 - 2071 061f 04 .byte 0x4 - 2072 0620 94000000 .4byte 0x94 - 2073 0624 02 .uleb128 0x2 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 39 - - - 2074 0625 56030000 .4byte .LASF92 - 2075 0629 0E .byte 0xe - 2076 062a 6F .byte 0x6f - 2077 062b 81050000 .4byte 0x581 - 2078 062f 02 .uleb128 0x2 - 2079 0630 21000000 .4byte .LASF93 - 2080 0634 0E .byte 0xe - 2081 0635 DF .byte 0xdf - 2082 0636 81050000 .4byte 0x581 - 2083 063a 11 .uleb128 0x11 - 2084 063b 01 .byte 0x1 - 2085 063c 29000000 .4byte 0x29 - 2086 0640 54060000 .4byte 0x654 - 2087 0644 10 .uleb128 0x10 - 2088 0645 73000000 .4byte 0x73 - 2089 0649 10 .uleb128 0x10 - 2090 064a 54060000 .4byte 0x654 - 2091 064e 10 .uleb128 0x10 - 2092 064f 29000000 .4byte 0x29 - 2093 0653 00 .byte 0 - 2094 0654 06 .uleb128 0x6 - 2095 0655 04 .byte 0x4 - 2096 0656 5A060000 .4byte 0x65a - 2097 065a 07 .uleb128 0x7 - 2098 065b 94000000 .4byte 0x94 - 2099 065f 06 .uleb128 0x6 - 2100 0660 04 .byte 0x4 - 2101 0661 3A060000 .4byte 0x63a - 2102 0665 11 .uleb128 0x11 - 2103 0666 01 .byte 0x1 - 2104 0667 29000000 .4byte 0x29 - 2105 066b 7F060000 .4byte 0x67f - 2106 066f 10 .uleb128 0x10 - 2107 0670 73000000 .4byte 0x73 - 2108 0674 10 .uleb128 0x10 - 2109 0675 1E060000 .4byte 0x61e - 2110 0679 10 .uleb128 0x10 - 2111 067a 29000000 .4byte 0x29 - 2112 067e 00 .byte 0 - 2113 067f 06 .uleb128 0x6 - 2114 0680 04 .byte 0x4 - 2115 0681 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07d5 10 .uleb128 0x10 - 2278 07d6 15 .uleb128 0x15 - 2279 07d7 4B040000 .4byte .LASF101 - 2280 07db 10 .byte 0x10 - 2281 07dc 7402 .2byte 0x274 - 2282 07de 9F000000 .4byte 0x9f - 2283 07e2 02 .byte 0x2 - 2284 07e3 23 .byte 0x23 - 2285 07e4 12 .uleb128 0x12 - 2286 07e5 14 .uleb128 0x14 - 2287 07e6 45475200 .ascii "EGR\000" - 2288 07ea 10 .byte 0x10 - 2289 07eb 7502 .2byte 0x275 - 2290 07ed 42070000 .4byte 0x742 - 2291 07f1 02 .byte 0x2 - 2292 07f2 23 .byte 0x23 - 2293 07f3 14 .uleb128 0x14 - 2294 07f4 15 .uleb128 0x15 - 2295 07f5 62050000 .4byte .LASF102 - 2296 07f9 10 .byte 0x10 - 2297 07fa 7602 .2byte 0x276 - 2298 07fc 9F000000 .4byte 0x9f - 2299 0800 02 .byte 0x2 - 2300 0801 23 .byte 0x23 - 2301 0802 16 .uleb128 0x16 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 43 - - - 2302 0803 15 .uleb128 0x15 - 2303 0804 ED000000 .4byte .LASF103 - 2304 0808 10 .byte 0x10 - 2305 0809 7702 .2byte 0x277 - 2306 080b 42070000 .4byte 0x742 - 2307 080f 02 .byte 0x2 - 2308 0810 23 .byte 0x23 - 2309 0811 18 .uleb128 0x18 - 2310 0812 15 .uleb128 0x15 - 2311 0813 5C040000 .4byte .LASF104 - 2312 0817 10 .byte 0x10 - 2313 0818 7802 .2byte 0x278 - 2314 081a 9F000000 .4byte 0x9f - 2315 081e 02 .byte 0x2 - 2316 081f 23 .byte 0x23 - 2317 0820 1A .uleb128 0x1a - 2318 0821 15 .uleb128 0x15 - 2319 0822 F3000000 .4byte .LASF105 - 2320 0826 10 .byte 0x10 - 2321 0827 7902 .2byte 0x279 - 2322 0829 42070000 .4byte 0x742 - 2323 082d 02 .byte 0x2 - 2324 082e 23 .byte 0x23 - 2325 082f 1C .uleb128 0x1c - 2326 0830 15 .uleb128 0x15 - 2327 0831 7E050000 .4byte .LASF106 - 2328 0835 10 .byte 0x10 - 2329 0836 7A02 .2byte 0x27a - 2330 0838 9F000000 .4byte 0x9f - 2331 083c 02 .byte 0x2 - 2332 083d 23 .byte 0x23 - 2333 083e 1E .uleb128 0x1e - 2334 083f 15 .uleb128 0x15 - 2335 0840 0A060000 .4byte .LASF107 - 2336 0844 10 .byte 0x10 - 2337 0845 7B02 .2byte 0x27b - 2338 0847 42070000 .4byte 0x742 - 2339 084b 02 .byte 0x2 - 2340 084c 23 .byte 0x23 - 2341 084d 20 .uleb128 0x20 - 2342 084e 15 .uleb128 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15 .uleb128 0x15 - 2375 088b 3B010000 .4byte .LASF110 - 2376 088f 10 .byte 0x10 - 2377 0890 8002 .2byte 0x280 - 2378 0892 9F000000 .4byte 0x9f - 2379 0896 02 .byte 0x2 - 2380 0897 23 .byte 0x23 - 2381 0898 2A .uleb128 0x2a - 2382 0899 14 .uleb128 0x14 - 2383 089a 41525200 .ascii "ARR\000" - 2384 089e 10 .byte 0x10 - 2385 089f 8102 .2byte 0x281 - 2386 08a1 42070000 .4byte 0x742 - 2387 08a5 02 .byte 0x2 - 2388 08a6 23 .byte 0x23 - 2389 08a7 2C .uleb128 0x2c - 2390 08a8 15 .uleb128 0x15 - 2391 08a9 46010000 .4byte .LASF111 - 2392 08ad 10 .byte 0x10 - 2393 08ae 8202 .2byte 0x282 - 2394 08b0 9F000000 .4byte 0x9f - 2395 08b4 02 .byte 0x2 - 2396 08b5 23 .byte 0x23 - 2397 08b6 2E .uleb128 0x2e - 2398 08b7 15 .uleb128 0x15 - 2399 08b8 51010000 .4byte .LASF112 - 2400 08bc 10 .byte 0x10 - 2401 08bd 8302 .2byte 0x283 - 2402 08bf B5000000 .4byte 0xb5 - 2403 08c3 02 .byte 0x2 - 2404 08c4 23 .byte 0x23 - 2405 08c5 30 .uleb128 0x30 - 2406 08c6 15 .uleb128 0x15 - 2407 08c7 71060000 .4byte .LASF113 - 2408 08cb 10 .byte 0x10 - 2409 08cc 8402 .2byte 0x284 - 2410 08ce 42070000 .4byte 0x742 - 2411 08d2 02 .byte 0x2 - 2412 08d3 23 .byte 0x23 - 2413 08d4 34 .uleb128 0x34 - 2414 08d5 15 .uleb128 0x15 - 2415 08d6 5C010000 .4byte .LASF114 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 45 - - - 2416 08da 10 .byte 0x10 - 2417 08db 8502 .2byte 0x285 - 2418 08dd 9F000000 .4byte 0x9f - 2419 08e1 02 .byte 0x2 - 2420 08e2 23 .byte 0x23 - 2421 08e3 36 .uleb128 0x36 - 2422 08e4 15 .uleb128 0x15 - 2423 08e5 76060000 .4byte .LASF115 - 2424 08e9 10 .byte 0x10 - 2425 08ea 8602 .2byte 0x286 - 2426 08ec 42070000 .4byte 0x742 - 2427 08f0 02 .byte 0x2 - 2428 08f1 23 .byte 0x23 - 2429 08f2 38 .uleb128 0x38 - 2430 08f3 15 .uleb128 0x15 - 2431 08f4 67010000 .4byte .LASF116 - 2432 08f8 10 .byte 0x10 - 2433 08f9 8702 .2byte 0x287 - 2434 08fb 9F000000 .4byte 0x9f - 2435 08ff 02 .byte 0x2 - 2436 0900 23 .byte 0x23 - 2437 0901 3A .uleb128 0x3a - 2438 0902 15 .uleb128 0x15 - 2439 0903 7B060000 .4byte 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0xa8d - 2537 09bc 14 .uleb128 0x14 - 2538 09bd 535200 .ascii "SR\000" - 2539 09c0 10 .byte 0x10 - 2540 09c1 9B02 .2byte 0x29b - 2541 09c3 42070000 .4byte 0x742 - 2542 09c7 02 .byte 0x2 - 2543 09c8 23 .byte 0x23 - 2544 09c9 00 .uleb128 0 - 2545 09ca 15 .uleb128 0x15 - 2546 09cb 23040000 .4byte .LASF95 - 2547 09cf 10 .byte 0x10 - 2548 09d0 9C02 .2byte 0x29c - 2549 09d2 9F000000 .4byte 0x9f - 2550 09d6 02 .byte 0x2 - 2551 09d7 23 .byte 0x23 - 2552 09d8 02 .uleb128 0x2 - 2553 09d9 14 .uleb128 0x14 - 2554 09da 445200 .ascii "DR\000" - 2555 09dd 10 .byte 0x10 - 2556 09de 9D02 .2byte 0x29d - 2557 09e0 42070000 .4byte 0x742 - 2558 09e4 02 .byte 0x2 - 2559 09e5 23 .byte 0x23 - 2560 09e6 04 .uleb128 0x4 - 2561 09e7 15 .uleb128 0x15 - 2562 09e8 2D040000 .4byte .LASF96 - 2563 09ec 10 .byte 0x10 - 2564 09ed 9E02 .2byte 0x29e - 2565 09ef 9F000000 .4byte 0x9f - 2566 09f3 02 .byte 0x2 - 2567 09f4 23 .byte 0x23 - 2568 09f5 06 .uleb128 0x6 - 2569 09f6 14 .uleb128 0x14 - 2570 09f7 42525200 .ascii "BRR\000" - 2571 09fb 10 .byte 0x10 - 2572 09fc 9F02 .2byte 0x29f - 2573 09fe 42070000 .4byte 0x742 - 2574 0a02 02 .byte 0x2 - 2575 0a03 23 .byte 0x23 - 2576 0a04 08 .uleb128 0x8 - 2577 0a05 15 .uleb128 0x15 - 2578 0a06 37040000 .4byte .LASF98 - 2579 0a0a 10 .byte 0x10 - 2580 0a0b A002 .2byte 0x2a0 - 2581 0a0d 9F000000 .4byte 0x9f - 2582 0a11 02 .byte 0x2 - 2583 0a12 23 .byte 0x23 - 2584 0a13 0A .uleb128 0xa - 2585 0a14 14 .uleb128 0x14 - 2586 0a15 43523100 .ascii "CR1\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 48 - - - 2587 0a19 10 .byte 0x10 - 2588 0a1a A102 .2byte 0x2a1 - 2589 0a1c 42070000 .4byte 0x742 - 2590 0a20 02 .byte 0x2 - 2591 0a21 23 .byte 0x23 - 2592 0a22 0C .uleb128 0xc - 2593 0a23 15 .uleb128 0x15 - 2594 0a24 41040000 .4byte .LASF100 - 2595 0a28 10 .byte 0x10 - 2596 0a29 A202 .2byte 0x2a2 - 2597 0a2b 9F000000 .4byte 0x9f - 2598 0a2f 02 .byte 0x2 - 2599 0a30 23 .byte 0x23 - 2600 0a31 0E .uleb128 0xe - 2601 0a32 14 .uleb128 0x14 - 2602 0a33 43523200 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A702 .2byte 0x2a7 - 2637 0a76 42070000 .4byte 0x742 - 2638 0a7a 02 .byte 0x2 - 2639 0a7b 23 .byte 0x23 - 2640 0a7c 18 .uleb128 0x18 - 2641 0a7d 15 .uleb128 0x15 - 2642 0a7e 5C040000 .4byte .LASF104 - 2643 0a82 10 .byte 0x10 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 49 - - - 2644 0a83 A802 .2byte 0x2a8 - 2645 0a85 9F000000 .4byte 0x9f - 2646 0a89 02 .byte 0x2 - 2647 0a8a 23 .byte 0x23 - 2648 0a8b 1A .uleb128 0x1a - 2649 0a8c 00 .byte 0 - 2650 0a8d 12 .uleb128 0x12 - 2651 0a8e 22030000 .4byte .LASF128 - 2652 0a92 10 .byte 0x10 - 2653 0a93 A902 .2byte 0x2a9 - 2654 0a95 B3090000 .4byte 0x9b3 - 2655 0a99 0B .uleb128 0xb - 2656 0a9a 28 .byte 0x28 - 2657 0a9b 11 .byte 0x11 - 2658 0a9c 82 .byte 0x82 - 2659 0a9d 2E0B0000 .4byte 0xb2e - 2660 0aa1 09 .uleb128 0x9 - 2661 0aa2 72000000 .4byte .LASF129 - 2662 0aa6 11 .byte 0x11 - 2663 0aa7 84 .byte 0x84 - 2664 0aa8 42030000 .4byte 0x342 - 2665 0aac 02 .byte 0x2 - 2666 0aad 23 .byte 0x23 - 2667 0aae 00 .uleb128 0 - 2668 0aaf 09 .uleb128 0x9 - 2669 0ab0 2D000000 .4byte .LASF130 - 2670 0ab4 11 .byte 0x11 - 2671 0ab5 85 .byte 0x85 - 2672 0ab6 42030000 .4byte 0x342 - 2673 0aba 02 .byte 0x2 - 2674 0abb 23 .byte 0x23 - 2675 0abc 04 .uleb128 0x4 - 2676 0abd 09 .uleb128 0x9 - 2677 0abe 2E020000 .4byte .LASF131 - 2678 0ac2 11 .byte 0x11 - 2679 0ac3 86 .byte 0x86 - 2680 0ac4 42030000 .4byte 0x342 - 2681 0ac8 02 .byte 0x2 - 2682 0ac9 23 .byte 0x23 - 2683 0aca 08 .uleb128 0x8 - 2684 0acb 09 .uleb128 0x9 - 2685 0acc 9D000000 .4byte .LASF132 - 2686 0ad0 11 .byte 0x11 - 2687 0ad1 87 .byte 0x87 - 2688 0ad2 42030000 .4byte 0x342 - 2689 0ad6 02 .byte 0x2 - 2690 0ad7 23 .byte 0x23 - 2691 0ad8 0C .uleb128 0xc - 2692 0ad9 0A .uleb128 0xa - 2693 0ada 49445200 .ascii "IDR\000" - 2694 0ade 11 .byte 0x11 - 2695 0adf 88 .byte 0x88 - 2696 0ae0 42030000 .4byte 0x342 - 2697 0ae4 02 .byte 0x2 - 2698 0ae5 23 .byte 0x23 - 2699 0ae6 10 .uleb128 0x10 - 2700 0ae7 0A .uleb128 0xa - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 50 - - - 2701 0ae8 4F445200 .ascii "ODR\000" - 2702 0aec 11 .byte 0x11 - 2703 0aed 89 .byte 0x89 - 2704 0aee 42030000 .4byte 0x342 - 2705 0af2 02 .byte 0x2 - 2706 0af3 23 .byte 0x23 - 2707 0af4 14 .uleb128 0x14 - 2708 0af5 09 .uleb128 0x9 - 2709 0af6 13010000 .4byte .LASF133 - 2710 0afa 11 .byte 0x11 - 2711 0afb 8A .byte 0x8a - 2712 0afc 42030000 .4byte 0x342 - 2713 0b00 02 .byte 0x2 - 2714 0b01 23 .byte 0x23 - 2715 0b02 18 .uleb128 0x18 - 2716 0b03 09 .uleb128 0x9 - 2717 0b04 D9020000 .4byte .LASF134 - 2718 0b08 11 .byte 0x11 - 2719 0b09 8B .byte 0x8b - 2720 0b0a 42030000 .4byte 0x342 - 2721 0b0e 02 .byte 0x2 - 2722 0b0f 23 .byte 0x23 - 2723 0b10 1C .uleb128 0x1c - 2724 0b11 09 .uleb128 0x9 - 2725 0b12 0C040000 .4byte .LASF135 - 2726 0b16 11 .byte 0x11 - 2727 0b17 8C .byte 0x8c - 2728 0b18 42030000 .4byte 0x342 - 2729 0b1c 02 .byte 0x2 - 2730 0b1d 23 .byte 0x23 - 2731 0b1e 20 .uleb128 0x20 - 2732 0b1f 09 .uleb128 0x9 - 2733 0b20 07040000 .4byte .LASF136 - 2734 0b24 11 .byte 0x11 - 2735 0b25 8D .byte 0x8d - 2736 0b26 42030000 .4byte 0x342 - 2737 0b2a 02 .byte 0x2 - 2738 0b2b 23 .byte 0x23 - 2739 0b2c 24 .uleb128 0x24 - 2740 0b2d 00 .byte 0 - 2741 0b2e 02 .uleb128 0x2 - 2742 0b2f C0020000 .4byte .LASF137 - 2743 0b33 11 .byte 0x11 - 2744 0b34 8E .byte 0x8e - 2745 0b35 990A0000 .4byte 0xa99 - 2746 0b39 02 .uleb128 0x2 - 2747 0b3a 4B000000 .4byte .LASF138 - 2748 0b3e 11 .byte 0x11 - 2749 0b3f D8 .byte 0xd8 - 2750 0b40 B5000000 .4byte 0xb5 - 2751 0b44 16 .uleb128 0x16 - 2752 0b45 01 .byte 0x1 - 2753 0b46 12 .byte 0x12 - 2754 0b47 35 .byte 0x35 - 2755 0b48 6B0B0000 .4byte 0xb6b - 2756 0b4c 17 .uleb128 0x17 - 2757 0b4d E9020000 .4byte .LASF139 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 51 - - - 2758 0b51 00 .sleb128 0 - 2759 0b52 17 .uleb128 0x17 - 2760 0b53 6C050000 .4byte .LASF140 - 2761 0b57 01 .sleb128 1 - 2762 0b58 17 .uleb128 0x17 - 2763 0b59 A2030000 .4byte .LASF141 - 2764 0b5d 02 .sleb128 2 - 2765 0b5e 17 .uleb128 0x17 - 2766 0b5f 2C010000 .4byte .LASF142 - 2767 0b63 03 .sleb128 3 - 2768 0b64 17 .uleb128 0x17 - 2769 0b65 34000000 .4byte .LASF143 - 2770 0b69 04 .sleb128 4 - 2771 0b6a 00 .byte 0 - 2772 0b6b 02 .uleb128 0x2 - 2773 0b6c 77020000 .4byte .LASF144 - 2774 0b70 12 .byte 0x12 - 2775 0b71 3B .byte 0x3b - 2776 0b72 440B0000 .4byte 0xb44 - 2777 0b76 02 .uleb128 0x2 - 2778 0b77 3E020000 .4byte .LASF145 - 2779 0b7b 12 .byte 0x12 - 2780 0b7c 40 .byte 0x40 - 2781 0b7d 810B0000 .4byte 0xb81 - 2782 0b81 08 .uleb128 0x8 - 2783 0b82 3E020000 .4byte .LASF145 - 2784 0b86 10 .byte 0x10 - 2785 0b87 13 .byte 0x13 - 2786 0b88 D0 .byte 0xd0 - 2787 0b89 C60B0000 .4byte 0xbc6 - 2788 0b8d 09 .uleb128 0x9 - 2789 0b8e 9E010000 .4byte .LASF146 - 2790 0b92 13 .byte 0x13 - 2791 0b93 D4 .byte 0xd4 - 2792 0b94 6B0B0000 .4byte 0xb6b - 2793 0b98 02 .byte 0x2 - 2794 0b99 23 .byte 0x23 - 2795 0b9a 00 .uleb128 0 - 2796 0b9b 09 .uleb128 0x9 - 2797 0b9c DC050000 .4byte .LASF147 - 2798 0ba0 13 .byte 0x13 - 2799 0ba1 D8 .byte 0xd8 - 2800 0ba2 2F0C0000 .4byte 0xc2f - 2801 0ba6 02 .byte 0x2 - 2802 0ba7 23 .byte 0x23 - 2803 0ba8 04 .uleb128 0x4 - 2804 0ba9 09 .uleb128 0x9 - 2805 0baa D8060000 .4byte .LASF148 - 2806 0bae 13 .byte 0x13 - 2807 0baf E0 .byte 0xe0 - 2808 0bb0 B5000000 .4byte 0xb5 - 2809 0bb4 02 .byte 0x2 - 2810 0bb5 23 .byte 0x23 - 2811 0bb6 08 .uleb128 0x8 - 2812 0bb7 0A .uleb128 0xa - 2813 0bb8 74696D00 .ascii "tim\000" - 2814 0bbc 13 .byte 0x13 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 52 - - - 2815 0bbd E4 .byte 0xe4 - 2816 0bbe 3A0C0000 .4byte 0xc3a - 2817 0bc2 02 .byte 0x2 - 2818 0bc3 23 .byte 0x23 - 2819 0bc4 0C .uleb128 0xc - 2820 0bc5 00 .byte 0 - 2821 0bc6 02 .uleb128 0x2 - 2822 0bc7 04020000 .4byte .LASF149 - 2823 0bcb 12 .byte 0x12 - 2824 0bcc 47 .byte 0x47 - 2825 0bcd D10B0000 .4byte 0xbd1 - 2826 0bd1 06 .uleb128 0x6 - 2827 0bd2 04 .byte 0x4 - 2828 0bd3 D70B0000 .4byte 0xbd7 - 2829 0bd7 0F .uleb128 0xf - 2830 0bd8 01 .byte 0x1 - 2831 0bd9 E30B0000 .4byte 0xbe3 - 2832 0bdd 10 .uleb128 0x10 - 2833 0bde E30B0000 .4byte 0xbe3 - 2834 0be2 00 .byte 0 - 2835 0be3 06 .uleb128 0x6 - 2836 0be4 04 .byte 0x4 - 2837 0be5 760B0000 .4byte 0xb76 - 2838 0be9 02 .uleb128 0x2 - 2839 0bea FA020000 .4byte .LASF150 - 2840 0bee 13 .byte 0x13 - 2841 0bef B3 .byte 0xb3 - 2842 0bf0 B5000000 .4byte 0xb5 - 2843 0bf4 02 .uleb128 0x2 - 2844 0bf5 AD010000 .4byte .LASF151 - 2845 0bf9 13 .byte 0x13 - 2846 0bfa B8 .byte 0xb8 - 2847 0bfb 9F000000 .4byte 0x9f - 2848 0bff 0B .uleb128 0xb - 2849 0c00 08 .byte 0x8 - 2850 0c01 13 .byte 0x13 - 2851 0c02 BE .byte 0xbe - 2852 0c03 240C0000 .4byte 0xc24 - 2853 0c07 09 .uleb128 0x9 - 2854 0c08 CF000000 .4byte .LASF152 - 2855 0c0c 13 .byte 0x13 - 2856 0c0d C4 .byte 0xc4 - 2857 0c0e E90B0000 .4byte 0xbe9 - 2858 0c12 02 .byte 0x2 - 2859 0c13 23 .byte 0x23 - 2860 0c14 00 .uleb128 0 - 2861 0c15 09 .uleb128 0x9 - 2862 0c16 19030000 .4byte .LASF153 - 2863 0c1a 13 .byte 0x13 - 2864 0c1b C9 .byte 0xc9 - 2865 0c1c C60B0000 .4byte 0xbc6 - 2866 0c20 02 .byte 0x2 - 2867 0c21 23 .byte 0x23 - 2868 0c22 04 .uleb128 0x4 - 2869 0c23 00 .byte 0 - 2870 0c24 02 .uleb128 0x2 - 2871 0c25 32060000 .4byte .LASF154 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 53 - - - 2872 0c29 13 .byte 0x13 - 2873 0c2a CB .byte 0xcb - 2874 0c2b FF0B0000 .4byte 0xbff - 2875 0c2f 06 .uleb128 0x6 - 2876 0c30 04 .byte 0x4 - 2877 0c31 350C0000 .4byte 0xc35 - 2878 0c35 07 .uleb128 0x7 - 2879 0c36 240C0000 .4byte 0xc24 - 2880 0c3a 06 .uleb128 0x6 - 2881 0c3b 04 .byte 0x4 - 2882 0c3c A7090000 .4byte 0x9a7 - 2883 0c40 16 .uleb128 0x16 - 2884 0c41 01 .byte 0x1 - 2885 0c42 14 .byte 0x14 - 2886 0c43 5D .byte 0x5d - 2887 0c44 5B0C0000 .4byte 0xc5b - 2888 0c48 17 .uleb128 0x17 - 2889 0c49 58050000 .4byte .LASF155 - 2890 0c4d 00 .sleb128 0 - 2891 0c4e 17 .uleb128 0x17 - 2892 0c4f 3E050000 .4byte .LASF156 - 2893 0c53 01 .sleb128 1 - 2894 0c54 17 .uleb128 0x17 - 2895 0c55 5E060000 .4byte .LASF157 - 2896 0c59 02 .sleb128 2 - 2897 0c5a 00 .byte 0 - 2898 0c5b 02 .uleb128 0x2 - 2899 0c5c 90050000 .4byte .LASF158 - 2900 0c60 14 .byte 0x14 - 2901 0c61 61 .byte 0x61 - 2902 0c62 400C0000 .4byte 0xc40 - 2903 0c66 02 .uleb128 0x2 - 2904 0c67 A4050000 .4byte .LASF159 - 2905 0c6b 14 .byte 0x14 - 2906 0c6c 66 .byte 0x66 - 2907 0c6d 710C0000 .4byte 0xc71 - 2908 0c71 08 .uleb128 0x8 - 2909 0c72 A4050000 .4byte .LASF159 - 2910 0c76 74 .byte 0x74 - 2911 0c77 14 .byte 0x14 - 2912 0c78 80 .byte 0x80 - 2913 0c79 FA0C0000 .4byte 0xcfa - 2914 0c7d 0A .uleb128 0xa - 2915 0c7e 766D7400 .ascii "vmt\000" - 2916 0c82 14 .byte 0x14 - 2917 0c83 82 .byte 0x82 - 2918 0c84 850D0000 .4byte 0xd85 - 2919 0c88 02 .byte 0x2 - 2920 0c89 23 .byte 0x23 - 2921 0c8a 00 .uleb128 0 - 2922 0c8b 09 .uleb128 0x9 - 2923 0c8c F4020000 .4byte .LASF160 - 2924 0c90 14 .byte 0x14 - 2925 0c91 83 .byte 0x83 - 2926 0c92 CD040000 .4byte 0x4cd - 2927 0c96 02 .byte 0x2 - 2928 0c97 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 54 - - - 2929 0c98 04 .uleb128 0x4 - 2930 0c99 09 .uleb128 0x9 - 2931 0c9a AE060000 .4byte .LASF161 - 2932 0c9e 14 .byte 0x14 - 2933 0c9f 83 .byte 0x83 - 2934 0ca0 20070000 .4byte 0x720 - 2935 0ca4 02 .byte 0x2 - 2936 0ca5 23 .byte 0x23 - 2937 0ca6 08 .uleb128 0x8 - 2938 0ca7 09 .uleb128 0x9 - 2939 0ca8 9E010000 .4byte .LASF146 - 2940 0cac 14 .byte 0x14 - 2941 0cad 83 .byte 0x83 - 2942 0cae 5B0C0000 .4byte 0xc5b - 2943 0cb2 02 .byte 0x2 - 2944 0cb3 23 .byte 0x23 - 2945 0cb4 0C .uleb128 0xc - 2946 0cb5 09 .uleb128 0x9 - 2947 0cb6 AE020000 .4byte .LASF162 - 2948 0cba 14 .byte 0x14 - 2949 0cbb 83 .byte 0x83 - 2950 0cbc 24060000 .4byte 0x624 - 2951 0cc0 02 .byte 0x2 - 2952 0cc1 23 .byte 0x23 - 2953 0cc2 10 .uleb128 0x10 - 2954 0cc3 09 .uleb128 0x9 - 2955 0cc4 12030000 .4byte .LASF163 - 2956 0cc8 14 .byte 0x14 - 2957 0cc9 83 .byte 0x83 - 2958 0cca 2F060000 .4byte 0x62f - 2959 0cce 02 .byte 0x2 - 2960 0ccf 23 .byte 0x23 - 2961 0cd0 30 .uleb128 0x30 - 2962 0cd1 0A .uleb128 0xa - 2963 0cd2 696200 .ascii "ib\000" - 2964 0cd5 14 .byte 0x14 - 2965 0cd6 83 .byte 0x83 - 2966 0cd7 900D0000 .4byte 0xd90 - 2967 0cdb 02 .byte 0x2 - 2968 0cdc 23 .byte 0x23 - 2969 0cdd 50 .uleb128 0x50 - 2970 0cde 0A .uleb128 0xa - 2971 0cdf 6F6200 .ascii "ob\000" - 2972 0ce2 14 .byte 0x14 - 2973 0ce3 83 .byte 0x83 - 2974 0ce4 900D0000 .4byte 0xd90 - 2975 0ce8 02 .byte 0x2 - 2976 0ce9 23 .byte 0x23 - 2977 0cea 60 .uleb128 0x60 - 2978 0ceb 09 .uleb128 0x9 - 2979 0cec 82020000 .4byte .LASF164 - 2980 0cf0 14 .byte 0x14 - 2981 0cf1 83 .byte 0x83 - 2982 0cf2 A00D0000 .4byte 0xda0 - 2983 0cf6 02 .byte 0x2 - 2984 0cf7 23 .byte 0x23 - 2985 0cf8 70 .uleb128 0x70 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 55 - - - 2986 0cf9 00 .byte 0 - 2987 0cfa 08 .uleb128 0x8 - 2988 0cfb 9E020000 .4byte .LASF165 - 2989 0cff 24 .byte 0x24 - 2990 0d00 14 .byte 0x14 - 2991 0d01 75 .byte 0x75 - 2992 0d02 850D0000 .4byte 0xd85 - 2993 0d06 09 .uleb128 0x9 - 2994 0d07 83030000 .4byte .LASF166 - 2995 0d0b 14 .byte 0x14 - 2996 0d0c 76 .byte 0x76 - 2997 0d0d 5F060000 .4byte 0x65f - 2998 0d11 02 .byte 0x2 - 2999 0d12 23 .byte 0x23 - 3000 0d13 00 .uleb128 0 - 3001 0d14 09 .uleb128 0x9 - 3002 0d15 CD050000 .4byte .LASF167 - 3003 0d19 14 .byte 0x14 - 3004 0d1a 76 .byte 0x76 - 3005 0d1b 7F060000 .4byte 0x67f - 3006 0d1f 02 .byte 0x2 - 3007 0d20 23 .byte 0x23 - 3008 0d21 04 .uleb128 0x4 - 3009 0d22 09 .uleb128 0x9 - 3010 0d23 EE010000 .4byte .LASF168 - 3011 0d27 14 .byte 0x14 - 3012 0d28 76 .byte 0x76 - 3013 0d29 95060000 .4byte 0x695 - 3014 0d2d 02 .byte 0x2 - 3015 0d2e 23 .byte 0x23 - 3016 0d2f 08 .uleb128 0x8 - 3017 0d30 09 .uleb128 0x9 - 3018 0d31 DE060000 .4byte .LASF169 - 3019 0d35 14 .byte 0x14 - 3020 0d36 76 .byte 0x76 - 3021 0d37 95060000 .4byte 0x695 - 3022 0d3b 02 .byte 0x2 - 3023 0d3c 23 .byte 0x23 - 3024 0d3d 0C .uleb128 0xc - 3025 0d3e 0A .uleb128 0xa - 3026 0d3f 70757400 .ascii "put\000" - 3027 0d43 14 .byte 0x14 - 3028 0d44 76 .byte 0x76 - 3029 0d45 B5060000 .4byte 0x6b5 - 3030 0d49 02 .byte 0x2 - 3031 0d4a 23 .byte 0x23 - 3032 0d4b 10 .uleb128 0x10 - 3033 0d4c 0A .uleb128 0xa - 3034 0d4d 67657400 .ascii "get\000" - 3035 0d51 14 .byte 0x14 - 3036 0d52 76 .byte 0x76 - 3037 0d53 D0060000 .4byte 0x6d0 - 3038 0d57 02 .byte 0x2 - 3039 0d58 23 .byte 0x23 - 3040 0d59 14 .uleb128 0x14 - 3041 0d5a 09 .uleb128 0x9 - 3042 0d5b 30030000 .4byte .LASF170 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 56 - - - 3043 0d5f 14 .byte 0x14 - 3044 0d60 76 .byte 0x76 - 3045 0d61 F5060000 .4byte 0x6f5 - 3046 0d65 02 .byte 0x2 - 3047 0d66 23 .byte 0x23 - 3048 0d67 18 .uleb128 0x18 - 3049 0d68 09 .uleb128 0x9 - 3050 0d69 E7000000 .4byte .LASF171 - 3051 0d6d 14 .byte 0x14 - 3052 0d6e 76 .byte 0x76 - 3053 0d6f 1A070000 .4byte 0x71a - 3054 0d73 02 .byte 0x2 - 3055 0d74 23 .byte 0x23 - 3056 0d75 1C .uleb128 0x1c - 3057 0d76 09 .uleb128 0x9 - 3058 0d77 3C060000 .4byte .LASF172 - 3059 0d7b 14 .byte 0x14 - 3060 0d7c 76 .byte 0x76 - 3061 0d7d 3C070000 .4byte 0x73c - 3062 0d81 02 .byte 0x2 - 3063 0d82 23 .byte 0x23 - 3064 0d83 20 .uleb128 0x20 - 3065 0d84 00 .byte 0 - 3066 0d85 06 .uleb128 0x6 - 3067 0d86 04 .byte 0x4 - 3068 0d87 8B0D0000 .4byte 0xd8b - 3069 0d8b 07 .uleb128 0x7 - 3070 0d8c FA0C0000 .4byte 0xcfa - 3071 0d90 18 .uleb128 0x18 - 3072 0d91 94000000 .4byte 0x94 - 3073 0d95 A00D0000 .4byte 0xda0 - 3074 0d99 19 .uleb128 0x19 - 3075 0d9a 34000000 .4byte 0x34 - 3076 0d9e 0F .byte 0xf - 3077 0d9f 00 .byte 0 - 3078 0da0 06 .uleb128 0x6 - 3079 0da1 04 .byte 0x4 - 3080 0da2 8D0A0000 .4byte 0xa8d - 3081 0da6 1A .uleb128 0x1a - 3082 0da7 BC000000 .4byte .LASF173 - 3083 0dab 01 .byte 0x1 - 3084 0dac B9 .byte 0xb9 - 3085 0dad 01 .byte 0x1 - 3086 0dae 01 .byte 0x1 - 3087 0daf D10D0000 .4byte 0xdd1 - 3088 0db3 1B .uleb128 0x1b - 3089 0db4 6E00 .ascii "n\000" - 3090 0db6 01 .byte 0x1 - 3091 0db7 B9 .byte 0xb9 - 3092 0db8 B5000000 .4byte 0xb5 - 3093 0dbc 1C .uleb128 0x1c - 3094 0dbd 62756600 .ascii "buf\000" - 3095 0dc1 01 .byte 0x1 - 3096 0dc2 BA .byte 0xba - 3097 0dc3 D10D0000 .4byte 0xdd1 - 3098 0dc7 1C .uleb128 0x1c - 3099 0dc8 7000 .ascii "p\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 57 - - - 3100 0dca 01 .byte 0x1 - 3101 0dcb BA .byte 0xba - 3102 0dcc 7C000000 .4byte 0x7c - 3103 0dd0 00 .byte 0 - 3104 0dd1 18 .uleb128 0x18 - 3105 0dd2 82000000 .4byte 0x82 - 3106 0dd6 E10D0000 .4byte 0xde1 - 3107 0dda 19 .uleb128 0x19 - 3108 0ddb 34000000 .4byte 0x34 - 3109 0ddf 0F .byte 0xf - 3110 0de0 00 .byte 0 - 3111 0de1 1A .uleb128 0x1a - 3112 0de2 AC000000 .4byte .LASF174 - 3113 0de6 01 .byte 0x1 - 3114 0de7 AA .byte 0xaa - 3115 0de8 01 .byte 0x1 - 3116 0de9 01 .byte 0x1 - 3117 0dea F80D0000 .4byte 0xdf8 - 3118 0dee 1B .uleb128 0x1b - 3119 0def 7000 .ascii "p\000" - 3120 0df1 01 .byte 0x1 - 3121 0df2 AA .byte 0xaa - 3122 0df3 7C000000 .4byte 0x7c - 3123 0df7 00 .byte 0 - 3124 0df8 1D .uleb128 0x1d - 3125 0df9 BA030000 .4byte .LASF175 - 3126 0dfd 01 .byte 0x1 - 3127 0dfe B1 .byte 0xb1 - 3128 0dff 01 .byte 0x1 - 3129 0e00 00000000 .4byte .LFB66 - 3130 0e04 38000000 .4byte .LFE66 - 3131 0e08 00000000 .4byte .LLST0 - 3132 0e0c 1E0E0000 .4byte 0xe1e - 3133 0e10 1E .uleb128 0x1e - 3134 0e11 7000 .ascii "p\000" - 3135 0e13 01 .byte 0x1 - 3136 0e14 B1 .byte 0xb1 - 3137 0e15 7C000000 .4byte 0x7c - 3138 0e19 20000000 .4byte .LLST1 - 3139 0e1d 00 .byte 0 - 3140 0e1e 1D .uleb128 0x1d - 3141 0e1f D1060000 .4byte .LASF176 - 3142 0e23 01 .byte 0x1 - 3143 0e24 8A .byte 0x8a - 3144 0e25 01 .byte 0x1 - 3145 0e26 00000000 .4byte .LFB64 - 3146 0e2a 28000000 .4byte .LFE64 - 3147 0e2e 33000000 .4byte .LLST2 - 3148 0e32 890E0000 .4byte 0xe89 - 3149 0e36 1F .uleb128 0x1f - 3150 0e37 DE020000 .4byte .LASF177 - 3151 0e3b 01 .byte 0x1 - 3152 0e3c 8A .byte 0x8a - 3153 0e3d E30B0000 .4byte 0xbe3 - 3154 0e41 53000000 .4byte .LLST3 - 3155 0e45 20 .uleb128 0x20 - 3156 0e46 6D736700 .ascii "msg\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 58 - - - 3157 0e4a 01 .byte 0x1 - 3158 0e4b 8B .byte 0x8b - 3159 0e4c 0D010000 .4byte 0x10d - 3160 0e50 01 .byte 0x1 - 3161 0e51 50 .byte 0x50 - 3162 0e52 21 .uleb128 0x21 - 3163 0e53 02000000 .4byte .LBB34 - 3164 0e57 08000000 .4byte .LBE34 - 3165 0e5b 6F0E0000 .4byte 0xe6f - 3166 0e5f 22 .uleb128 0x22 - 3167 0e60 746D7000 .ascii "tmp\000" - 3168 0e64 01 .byte 0x1 - 3169 0e65 8E .byte 0x8e - 3170 0e66 B5000000 .4byte 0xb5 - 3171 0e6a 66000000 .4byte .LLST4 - 3172 0e6e 00 .byte 0 - 3173 0e6f 23 .uleb128 0x23 - 3174 0e70 18000000 .4byte .LBB35 - 3175 0e74 1E000000 .4byte .LBE35 - 3176 0e78 22 .uleb128 0x22 - 3177 0e79 746D7000 .ascii "tmp\000" - 3178 0e7d 01 .byte 0x1 - 3179 0e7e 92 .byte 0x92 - 3180 0e7f B5000000 .4byte 0xb5 - 3181 0e83 79000000 .4byte .LLST5 - 3182 0e87 00 .byte 0 - 3183 0e88 00 .byte 0 - 3184 0e89 1D .uleb128 0x1d - 3185 0e8a D9000000 .4byte .LASF178 - 3186 0e8e 01 .byte 0x1 - 3187 0e8f 7C .byte 0x7c - 3188 0e90 01 .byte 0x1 - 3189 0e91 00000000 .4byte .LFB63 - 3190 0e95 28000000 .4byte .LFE63 - 3191 0e99 8C000000 .4byte .LLST6 - 3192 0e9d F40E0000 .4byte 0xef4 - 3193 0ea1 1F .uleb128 0x1f - 3194 0ea2 DE020000 .4byte .LASF177 - 3195 0ea6 01 .byte 0x1 - 3196 0ea7 7C .byte 0x7c - 3197 0ea8 E30B0000 .4byte 0xbe3 - 3198 0eac AC000000 .4byte .LLST7 - 3199 0eb0 20 .uleb128 0x20 - 3200 0eb1 6D736700 .ascii "msg\000" - 3201 0eb5 01 .byte 0x1 - 3202 0eb6 7D .byte 0x7d - 3203 0eb7 0D010000 .4byte 0x10d - 3204 0ebb 01 .byte 0x1 - 3205 0ebc 50 .byte 0x50 - 3206 0ebd 21 .uleb128 0x21 - 3207 0ebe 02000000 .4byte .LBB36 - 3208 0ec2 08000000 .4byte .LBE36 - 3209 0ec6 DA0E0000 .4byte 0xeda - 3210 0eca 22 .uleb128 0x22 - 3211 0ecb 746D7000 .ascii "tmp\000" - 3212 0ecf 01 .byte 0x1 - 3213 0ed0 80 .byte 0x80 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 59 - - - 3214 0ed1 B5000000 .4byte 0xb5 - 3215 0ed5 BF000000 .4byte .LLST8 - 3216 0ed9 00 .byte 0 - 3217 0eda 23 .uleb128 0x23 - 3218 0edb 18000000 .4byte .LBB37 - 3219 0edf 1E000000 .4byte .LBE37 - 3220 0ee3 22 .uleb128 0x22 - 3221 0ee4 746D7000 .ascii "tmp\000" - 3222 0ee8 01 .byte 0x1 - 3223 0ee9 84 .byte 0x84 - 3224 0eea B5000000 .4byte 0xb5 - 3225 0eee D2000000 .4byte .LLST9 - 3226 0ef2 00 .byte 0 - 3227 0ef3 00 .byte 0 - 3228 0ef4 24 .uleb128 0x24 - 3229 0ef5 EE050000 .4byte .LASF194 - 3230 0ef9 01 .byte 0x1 - 3231 0efa 41 .byte 0x41 - 3232 0efb 01 .byte 0x1 - 3233 0efc 0D010000 .4byte 0x10d - 3234 0f00 00000000 .4byte .LFB62 - 3235 0f04 AC000000 .4byte .LFE62 - 3236 0f08 E5000000 .4byte .LLST10 - 3237 0f0c 790F0000 .4byte 0xf79 - 3238 0f10 1E .uleb128 0x1e - 3239 0f11 61726700 .ascii "arg\000" - 3240 0f15 01 .byte 0x1 - 3241 0f16 41 .byte 0x41 - 3242 0f17 73000000 .4byte 0x73 - 3243 0f1b 11010000 .4byte .LLST11 - 3244 0f1f 20 .uleb128 0x20 - 3245 0f20 7800 .ascii "x\000" - 3246 0f22 01 .byte 0x1 - 3247 0f23 42 .byte 0x42 - 3248 0f24 790F0000 .4byte 0xf79 - 3249 0f28 05 .byte 0x5 - 3250 0f29 03 .byte 0x3 - 3251 0f2a 00000000 .4byte x.3441 - 3252 0f2e 20 .uleb128 0x20 - 3253 0f2f 636E7400 .ascii "cnt\000" - 3254 0f33 01 .byte 0x1 - 3255 0f34 43 .byte 0x43 - 3256 0f35 34000000 .4byte 0x34 - 3257 0f39 05 .byte 0x5 - 3258 0f3a 03 .byte 0x3 - 3259 0f3b 00000000 .4byte cnt.3442 - 3260 0f3f 22 .uleb128 0x22 - 3261 0f40 6D6500 .ascii "me\000" - 3262 0f43 01 .byte 0x1 - 3263 0f44 44 .byte 0x44 - 3264 0f45 34000000 .4byte 0x34 - 3265 0f49 11010000 .4byte .LLST11 - 3266 0f4d 25 .uleb128 0x25 - 3267 0f4e 37030000 .4byte .LASF179 - 3268 0f52 01 .byte 0x1 - 3269 0f53 45 .byte 0x45 - 3270 0f54 34000000 .4byte 0x34 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 60 - - - 3271 0f58 31010000 .4byte .LLST13 - 3272 0f5c 22 .uleb128 0x22 - 3273 0f5d 7200 .ascii "r\000" - 3274 0f5f 01 .byte 0x1 - 3275 0f60 46 .byte 0x46 - 3276 0f61 34000000 .4byte 0x34 - 3277 0f65 4F010000 .4byte .LLST14 - 3278 0f69 22 .uleb128 0x22 - 3279 0f6a 6D736700 .ascii "msg\000" - 3280 0f6e 01 .byte 0x1 - 3281 0f6f 47 .byte 0x47 - 3282 0f70 0D010000 .4byte 0x10d - 3283 0f74 64010000 .4byte .LLST15 - 3284 0f78 00 .byte 0 - 3285 0f79 0C .uleb128 0xc - 3286 0f7a 34000000 .4byte 0x34 - 3287 0f7e 26 .uleb128 0x26 - 3288 0f7f A60D0000 .4byte 0xda6 - 3289 0f83 00000000 .4byte .LFB67 - 3290 0f87 68000000 .4byte .LFE67 - 3291 0f8b 83010000 .4byte .LLST16 - 3292 0f8f D30F0000 .4byte 0xfd3 - 3293 0f93 27 .uleb128 0x27 - 3294 0f94 B30D0000 .4byte 0xdb3 - 3295 0f98 AF010000 .4byte .LLST17 - 3296 0f9c 28 .uleb128 0x28 - 3297 0f9d BC0D0000 .4byte 0xdbc - 3298 0fa1 02 .byte 0x2 - 3299 0fa2 91 .byte 0x91 - 3300 0fa3 60 .sleb128 -32 - 3301 0fa4 29 .uleb128 0x29 - 3302 0fa5 C70D0000 .4byte 0xdc7 - 3303 0fa9 D8010000 .4byte .LLST18 - 3304 0fad 2A .uleb128 0x2a - 3305 0fae A60D0000 .4byte 0xda6 - 3306 0fb2 0C000000 .4byte .LBB40 - 3307 0fb6 00000000 .4byte .Ldebug_ranges0+0 - 3308 0fba 01 .byte 0x1 - 3309 0fbb B9 .byte 0xb9 - 3310 0fbc 2B .uleb128 0x2b - 3311 0fbd 18000000 .4byte .Ldebug_ranges0+0x18 - 3312 0fc1 2C .uleb128 0x2c - 3313 0fc2 BC0D0000 .4byte 0xdbc - 3314 0fc6 2C .uleb128 0x2c - 3315 0fc7 C70D0000 .4byte 0xdc7 - 3316 0fcb 2D .uleb128 0x2d - 3317 0fcc B30D0000 .4byte 0xdb3 - 3318 0fd0 00 .byte 0 - 3319 0fd1 00 .byte 0 - 3320 0fd2 00 .byte 0 - 3321 0fd3 2E .uleb128 0x2e - 3322 0fd4 01 .byte 0x1 - 3323 0fd5 EC060000 .4byte .LASF195 - 3324 0fd9 01 .byte 0x1 - 3325 0fda CA .byte 0xca - 3326 0fdb 01 .byte 0x1 - 3327 0fdc 57000000 .4byte 0x57 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 61 - - - 3328 0fe0 00000000 .4byte .LFB68 - 3329 0fe4 E4030000 .4byte .LFE68 - 3330 0fe8 F8010000 .4byte .LLST19 - 3331 0fec FA110000 .4byte 0x11fa - 3332 0ff0 22 .uleb128 0x22 - 3333 0ff1 6900 .ascii "i\000" - 3334 0ff3 01 .byte 0x1 - 3335 0ff4 CB .byte 0xcb - 3336 0ff5 34000000 .4byte 0x34 - 3337 0ff9 24020000 .4byte .LLST20 - 3338 0ffd 25 .uleb128 0x25 - 3339 0ffe 25020000 .4byte .LASF180 - 3340 1002 01 .byte 0x1 - 3341 1003 CC .byte 0xcc - 3342 1004 F40B0000 .4byte 0xbf4 - 3343 1008 5A020000 .4byte .LLST21 - 3344 100c 25 .uleb128 0x25 - 3345 100d B3040000 .4byte .LASF181 - 3346 1011 01 .byte 0x1 - 3347 1012 CC .byte 0xcc - 3348 1013 F40B0000 .4byte 0xbf4 - 3349 1017 86020000 .4byte .LLST22 - 3350 101b 25 .uleb128 0x25 - 3351 101c E7030000 .4byte .LASF182 - 3352 1020 01 .byte 0x1 - 3353 1021 CC .byte 0xcc - 3354 1022 F40B0000 .4byte 0xbf4 - 3355 1026 B0020000 .4byte .LLST23 - 3356 102a 2F .uleb128 0x2f - 3357 102b E10D0000 .4byte 0xde1 - 3358 102f 96000000 .4byte .LBB44 - 3359 1033 AA000000 .4byte .LBE44 - 3360 1037 01 .byte 0x1 - 3361 1038 F0 .byte 0xf0 - 3362 1039 47100000 .4byte 0x1047 - 3363 103d 27 .uleb128 0x27 - 3364 103e EE0D0000 .4byte 0xdee - 3365 1042 CF020000 .4byte .LLST24 - 3366 1046 00 .byte 0 - 3367 1047 2F .uleb128 0x2f - 3368 1048 E10D0000 .4byte 0xde1 - 3369 104c B4000000 .4byte .LBB46 - 3370 1050 C8000000 .4byte .LBE46 - 3371 1054 01 .byte 0x1 - 3372 1055 F3 .byte 0xf3 - 3373 1056 64100000 .4byte 0x1064 - 3374 105a 27 .uleb128 0x27 - 3375 105b EE0D0000 .4byte 0xdee - 3376 105f E7020000 .4byte .LLST25 - 3377 1063 00 .byte 0 - 3378 1064 2F .uleb128 0x2f - 3379 1065 E10D0000 .4byte 0xde1 - 3380 1069 D2000000 .4byte .LBB48 - 3381 106d E6000000 .4byte .LBE48 - 3382 1071 01 .byte 0x1 - 3383 1072 F6 .byte 0xf6 - 3384 1073 81100000 .4byte 0x1081 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 62 - - - 3385 1077 27 .uleb128 0x27 - 3386 1078 EE0D0000 .4byte 0xdee - 3387 107c FF020000 .4byte .LLST26 - 3388 1080 00 .byte 0 - 3389 1081 2F .uleb128 0x2f - 3390 1082 E10D0000 .4byte 0xde1 - 3391 1086 F0000000 .4byte .LBB50 - 3392 108a 04010000 .4byte .LBE50 - 3393 108e 01 .byte 0x1 - 3394 108f F9 .byte 0xf9 - 3395 1090 9E100000 .4byte 0x109e - 3396 1094 27 .uleb128 0x27 - 3397 1095 EE0D0000 .4byte 0xdee - 3398 1099 17030000 .4byte .LLST27 - 3399 109d 00 .byte 0 - 3400 109e 2F .uleb128 0x2f - 3401 109f E10D0000 .4byte 0xde1 - 3402 10a3 0E010000 .4byte .LBB52 - 3403 10a7 22010000 .4byte .LBE52 - 3404 10ab 01 .byte 0x1 - 3405 10ac FD .byte 0xfd - 3406 10ad BB100000 .4byte 0x10bb - 3407 10b1 27 .uleb128 0x27 - 3408 10b2 EE0D0000 .4byte 0xdee - 3409 10b6 2F030000 .4byte .LLST28 - 3410 10ba 00 .byte 0 - 3411 10bb 30 .uleb128 0x30 - 3412 10bc E10D0000 .4byte 0xde1 - 3413 10c0 2C010000 .4byte .LBB54 - 3414 10c4 40010000 .4byte .LBE54 - 3415 10c8 01 .byte 0x1 - 3416 10c9 0101 .2byte 0x101 - 3417 10cb D9100000 .4byte 0x10d9 - 3418 10cf 27 .uleb128 0x27 - 3419 10d0 EE0D0000 .4byte 0xdee - 3420 10d4 47030000 .4byte .LLST29 - 3421 10d8 00 .byte 0 - 3422 10d9 30 .uleb128 0x30 - 3423 10da E10D0000 .4byte 0xde1 - 3424 10de 50010000 .4byte .LBB56 - 3425 10e2 64010000 .4byte .LBE56 - 3426 10e6 01 .byte 0x1 - 3427 10e7 0501 .2byte 0x105 - 3428 10e9 F7100000 .4byte 0x10f7 - 3429 10ed 27 .uleb128 0x27 - 3430 10ee EE0D0000 .4byte 0xdee - 3431 10f2 5F030000 .4byte .LLST30 - 3432 10f6 00 .byte 0 - 3433 10f7 30 .uleb128 0x30 - 3434 10f8 E10D0000 .4byte 0xde1 - 3435 10fc 7A010000 .4byte .LBB58 - 3436 1100 8E010000 .4byte .LBE58 - 3437 1104 01 .byte 0x1 - 3438 1105 0801 .2byte 0x108 - 3439 1107 15110000 .4byte 0x1115 - 3440 110b 27 .uleb128 0x27 - 3441 110c EE0D0000 .4byte 0xdee - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 63 - - - 3442 1110 77030000 .4byte .LLST31 - 3443 1114 00 .byte 0 - 3444 1115 30 .uleb128 0x30 - 3445 1116 E10D0000 .4byte 0xde1 - 3446 111a 9E010000 .4byte .LBB60 - 3447 111e B2010000 .4byte .LBE60 - 3448 1122 01 .byte 0x1 - 3449 1123 0B01 .2byte 0x10b - 3450 1125 33110000 .4byte 0x1133 - 3451 1129 27 .uleb128 0x27 - 3452 112a EE0D0000 .4byte 0xdee - 3453 112e 8F030000 .4byte .LLST32 - 3454 1132 00 .byte 0 - 3455 1133 30 .uleb128 0x30 - 3456 1134 E10D0000 .4byte 0xde1 - 3457 1138 C2010000 .4byte .LBB62 - 3458 113c D6010000 .4byte .LBE62 - 3459 1140 01 .byte 0x1 - 3460 1141 0E01 .2byte 0x10e - 3461 1143 51110000 .4byte 0x1151 - 3462 1147 27 .uleb128 0x27 - 3463 1148 EE0D0000 .4byte 0xdee - 3464 114c A7030000 .4byte .LLST33 - 3465 1150 00 .byte 0 - 3466 1151 30 .uleb128 0x30 - 3467 1152 E10D0000 .4byte 0xde1 - 3468 1156 E6010000 .4byte .LBB64 - 3469 115a FC010000 .4byte .LBE64 - 3470 115e 01 .byte 0x1 - 3471 115f 1101 .2byte 0x111 - 3472 1161 6F110000 .4byte 0x116f - 3473 1165 27 .uleb128 0x27 - 3474 1166 EE0D0000 .4byte 0xdee - 3475 116a BF030000 .4byte .LLST34 - 3476 116e 00 .byte 0 - 3477 116f 30 .uleb128 0x30 - 3478 1170 E10D0000 .4byte 0xde1 - 3479 1174 22020000 .4byte .LBB66 - 3480 1178 36020000 .4byte .LBE66 - 3481 117c 01 .byte 0x1 - 3482 117d 1801 .2byte 0x118 - 3483 117f 8D110000 .4byte 0x118d - 3484 1183 27 .uleb128 0x27 - 3485 1184 EE0D0000 .4byte 0xdee - 3486 1188 D7030000 .4byte .LLST35 - 3487 118c 00 .byte 0 - 3488 118d 30 .uleb128 0x30 - 3489 118e E10D0000 .4byte 0xde1 - 3490 1192 CC020000 .4byte .LBB68 - 3491 1196 D4020000 .4byte .LBE68 - 3492 119a 01 .byte 0x1 - 3493 119b 2401 .2byte 0x124 - 3494 119d A7110000 .4byte 0x11a7 - 3495 11a1 2D .uleb128 0x2d - 3496 11a2 EE0D0000 .4byte 0xdee - 3497 11a6 00 .byte 0 - 3498 11a7 31 .uleb128 0x31 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 64 - - - 3499 11a8 E10D0000 .4byte 0xde1 - 3500 11ac 0C030000 .4byte .LBB70 - 3501 11b0 30000000 .4byte .Ldebug_ranges0+0x30 - 3502 11b4 01 .byte 0x1 - 3503 11b5 2601 .2byte 0x126 - 3504 11b7 C1110000 .4byte 0x11c1 - 3505 11bb 2D .uleb128 0x2d - 3506 11bc EE0D0000 .4byte 0xdee - 3507 11c0 00 .byte 0 - 3508 11c1 30 .uleb128 0x30 - 3509 11c2 E10D0000 .4byte 0xde1 - 3510 11c6 42030000 .4byte .LBB76 - 3511 11ca 56030000 .4byte .LBE76 - 3512 11ce 01 .byte 0x1 - 3513 11cf 2F01 .2byte 0x12f - 3514 11d1 DF110000 .4byte 0x11df - 3515 11d5 27 .uleb128 0x27 - 3516 11d6 EE0D0000 .4byte 0xdee - 3517 11da EF030000 .4byte .LLST38 - 3518 11de 00 .byte 0 - 3519 11df 32 .uleb128 0x32 - 3520 11e0 E10D0000 .4byte 0xde1 - 3521 11e4 8E030000 .4byte .LBB78 - 3522 11e8 A2030000 .4byte .LBE78 - 3523 11ec 01 .byte 0x1 - 3524 11ed 3901 .2byte 0x139 - 3525 11ef 27 .uleb128 0x27 - 3526 11f0 EE0D0000 .4byte 0xdee - 3527 11f4 07040000 .4byte .LLST39 - 3528 11f8 00 .byte 0 - 3529 11f9 00 .byte 0 - 3530 11fa 33 .uleb128 0x33 - 3531 11fb A0060000 .4byte .LASF183 - 3532 11ff 09 .byte 0x9 - 3533 1200 6B .byte 0x6b - 3534 1201 E3030000 .4byte 0x3e3 - 3535 1205 01 .byte 0x1 - 3536 1206 01 .byte 0x1 - 3537 1207 34 .uleb128 0x34 - 3538 1208 F0040000 .4byte .LASF184 - 3539 120c 15 .byte 0x15 - 3540 120d 8C04 .2byte 0x48c - 3541 120f 15120000 .4byte 0x1215 - 3542 1213 01 .byte 0x1 - 3543 1214 01 .byte 0x1 - 3544 1215 0C .uleb128 0xc - 3545 1216 AA000000 .4byte 0xaa - 3546 121a 33 .uleb128 0x33 - 3547 121b C3000000 .4byte .LASF185 - 3548 121f 13 .byte 0x13 - 3549 1220 F4 .byte 0xf4 - 3550 1221 760B0000 .4byte 0xb76 - 3551 1225 01 .byte 0x1 - 3552 1226 01 .byte 0x1 - 3553 1227 33 .uleb128 0x33 - 3554 1228 C9000000 .4byte .LASF186 - 3555 122c 13 .byte 0x13 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 65 - - - 3556 122d F8 .byte 0xf8 - 3557 122e 760B0000 .4byte 0xb76 - 3558 1232 01 .byte 0x1 - 3559 1233 01 .byte 0x1 - 3560 1234 35 .uleb128 0x35 - 3561 1235 53443100 .ascii "SD1\000" - 3562 1239 16 .byte 0x16 - 3563 123a DB .byte 0xdb - 3564 123b 660C0000 .4byte 0xc66 - 3565 123f 01 .byte 0x1 - 3566 1240 01 .byte 0x1 - 3567 1241 36 .uleb128 0x36 - 3568 1242 B2000000 .4byte .LASF187 - 3569 1246 01 .byte 0x1 - 3570 1247 35 .byte 0x35 - 3571 1248 D6000000 .4byte 0xd6 - 3572 124c 05 .byte 0x5 - 3573 124d 03 .byte 0x3 - 3574 124e 00000000 .4byte saturated - 3575 1252 18 .uleb128 0x18 - 3576 1253 3B050000 .4byte 0x53b - 3577 1257 62120000 .4byte 0x1262 - 3578 125b 19 .uleb128 0x19 - 3579 125c 34000000 .4byte 0x34 - 3580 1260 03 .byte 0x3 - 3581 1261 00 .byte 0 - 3582 1262 20 .uleb128 0x20 - 3583 1263 6D6200 .ascii "mb\000" - 3584 1266 01 .byte 0x1 - 3585 1267 3A .byte 0x3a - 3586 1268 52120000 .4byte 0x1252 - 3587 126c 05 .byte 0x5 - 3588 126d 03 .byte 0x3 - 3589 126e 00000000 .4byte mb - 3590 1272 18 .uleb128 0x18 - 3591 1273 0D010000 .4byte 0x10d - 3592 1277 88120000 .4byte 0x1288 - 3593 127b 19 .uleb128 0x19 - 3594 127c 34000000 .4byte 0x34 - 3595 1280 03 .byte 0x3 - 3596 1281 19 .uleb128 0x19 - 3597 1282 34000000 .4byte 0x34 - 3598 1286 03 .byte 0x3 - 3599 1287 00 .byte 0 - 3600 1288 20 .uleb128 0x20 - 3601 1289 6200 .ascii "b\000" - 3602 128b 01 .byte 0x1 - 3603 128c 3B .byte 0x3b - 3604 128d 72120000 .4byte 0x1272 - 3605 1291 05 .byte 0x5 - 3606 1292 03 .byte 0x3 - 3607 1293 00000000 .4byte b - 3608 1297 18 .uleb128 0x18 - 3609 1298 47030000 .4byte 0x347 - 3610 129c AD120000 .4byte 0x12ad - 3611 12a0 19 .uleb128 0x19 - 3612 12a1 34000000 .4byte 0x34 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 66 - - - 3613 12a5 03 .byte 0x3 - 3614 12a6 19 .uleb128 0x19 - 3615 12a7 34000000 .4byte 0x34 - 3616 12ab 23 .byte 0x23 - 3617 12ac 00 .byte 0 - 3618 12ad 36 .uleb128 0x36 - 3619 12ae FB050000 .4byte .LASF188 - 3620 12b2 01 .byte 0x1 - 3621 12b3 40 .byte 0x40 - 3622 12b4 97120000 .4byte 0x1297 - 3623 12b8 05 .byte 0x5 - 3624 12b9 03 .byte 0x3 - 3625 12ba 00000000 .4byte waWorkerThread - 3626 12be 36 .uleb128 0x36 - 3627 12bf 63020000 .4byte .LASF189 - 3628 12c3 01 .byte 0x1 - 3629 12c4 98 .byte 0x98 - 3630 12c5 350C0000 .4byte 0xc35 - 3631 12c9 05 .byte 0x5 - 3632 12ca 03 .byte 0x3 - 3633 12cb 00000000 .4byte gpt2cfg - 3634 12cf 36 .uleb128 0x36 - 3635 12d0 B6010000 .4byte .LASF190 - 3636 12d4 01 .byte 0x1 - 3637 12d5 A0 .byte 0xa0 - 3638 12d6 350C0000 .4byte 0xc35 - 3639 12da 05 .byte 0x5 - 3640 12db 03 .byte 0x3 - 3641 12dc 00000000 .4byte gpt3cfg - 3642 12e0 33 .uleb128 0x33 - 3643 12e1 A0060000 .4byte .LASF183 - 3644 12e5 09 .byte 0x9 - 3645 12e6 6B .byte 0x6b - 3646 12e7 E3030000 .4byte 0x3e3 - 3647 12eb 01 .byte 0x1 - 3648 12ec 01 .byte 0x1 - 3649 12ed 34 .uleb128 0x34 - 3650 12ee F0040000 .4byte .LASF184 - 3651 12f2 15 .byte 0x15 - 3652 12f3 8C04 .2byte 0x48c - 3653 12f5 15120000 .4byte 0x1215 - 3654 12f9 01 .byte 0x1 - 3655 12fa 01 .byte 0x1 - 3656 12fb 33 .uleb128 0x33 - 3657 12fc C3000000 .4byte .LASF185 - 3658 1300 13 .byte 0x13 - 3659 1301 F4 .byte 0xf4 - 3660 1302 760B0000 .4byte 0xb76 - 3661 1306 01 .byte 0x1 - 3662 1307 01 .byte 0x1 - 3663 1308 33 .uleb128 0x33 - 3664 1309 C9000000 .4byte .LASF186 - 3665 130d 13 .byte 0x13 - 3666 130e F8 .byte 0xf8 - 3667 130f 760B0000 .4byte 0xb76 - 3668 1313 01 .byte 0x1 - 3669 1314 01 .byte 0x1 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 67 - - - 3670 1315 35 .uleb128 0x35 - 3671 1316 53443100 .ascii "SD1\000" - 3672 131a 16 .byte 0x16 - 3673 131b DB .byte 0xdb - 3674 131c 660C0000 .4byte 0xc66 - 3675 1320 01 .byte 0x1 - 3676 1321 01 .byte 0x1 - 3677 1322 00 .byte 0 - 3678 .section .debug_abbrev,"",%progbits - 3679 .Ldebug_abbrev0: - 3680 0000 01 .uleb128 0x1 - 3681 0001 11 .uleb128 0x11 - 3682 0002 01 .byte 0x1 - 3683 0003 25 .uleb128 0x25 - 3684 0004 0E .uleb128 0xe - 3685 0005 13 .uleb128 0x13 - 3686 0006 0B .uleb128 0xb - 3687 0007 03 .uleb128 0x3 - 3688 0008 0E .uleb128 0xe - 3689 0009 1B .uleb128 0x1b - 3690 000a 0E .uleb128 0xe - 3691 000b 11 .uleb128 0x11 - 3692 000c 01 .uleb128 0x1 - 3693 000d 52 .uleb128 0x52 - 3694 000e 01 .uleb128 0x1 - 3695 000f 55 .uleb128 0x55 - 3696 0010 06 .uleb128 0x6 - 3697 0011 10 .uleb128 0x10 - 3698 0012 06 .uleb128 0x6 - 3699 0013 00 .byte 0 - 3700 0014 00 .byte 0 - 3701 0015 02 .uleb128 0x2 - 3702 0016 16 .uleb128 0x16 - 3703 0017 00 .byte 0 - 3704 0018 03 .uleb128 0x3 - 3705 0019 0E .uleb128 0xe - 3706 001a 3A .uleb128 0x3a - 3707 001b 0B .uleb128 0xb - 3708 001c 3B .uleb128 0x3b - 3709 001d 0B .uleb128 0xb - 3710 001e 49 .uleb128 0x49 - 3711 001f 13 .uleb128 0x13 - 3712 0020 00 .byte 0 - 3713 0021 00 .byte 0 - 3714 0022 03 .uleb128 0x3 - 3715 0023 24 .uleb128 0x24 - 3716 0024 00 .byte 0 - 3717 0025 0B .uleb128 0xb - 3718 0026 0B .uleb128 0xb - 3719 0027 3E .uleb128 0x3e - 3720 0028 0B .uleb128 0xb - 3721 0029 03 .uleb128 0x3 - 3722 002a 0E .uleb128 0xe - 3723 002b 00 .byte 0 - 3724 002c 00 .byte 0 - 3725 002d 04 .uleb128 0x4 - 3726 002e 24 .uleb128 0x24 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 68 - - - 3727 002f 00 .byte 0 - 3728 0030 0B .uleb128 0xb - 3729 0031 0B .uleb128 0xb - 3730 0032 3E .uleb128 0x3e - 3731 0033 0B .uleb128 0xb - 3732 0034 03 .uleb128 0x3 - 3733 0035 08 .uleb128 0x8 - 3734 0036 00 .byte 0 - 3735 0037 00 .byte 0 - 3736 0038 05 .uleb128 0x5 - 3737 0039 0F .uleb128 0xf - 3738 003a 00 .byte 0 - 3739 003b 0B .uleb128 0xb - 3740 003c 0B .uleb128 0xb - 3741 003d 00 .byte 0 - 3742 003e 00 .byte 0 - 3743 003f 06 .uleb128 0x6 - 3744 0040 0F .uleb128 0xf - 3745 0041 00 .byte 0 - 3746 0042 0B .uleb128 0xb - 3747 0043 0B .uleb128 0xb - 3748 0044 49 .uleb128 0x49 - 3749 0045 13 .uleb128 0x13 - 3750 0046 00 .byte 0 - 3751 0047 00 .byte 0 - 3752 0048 07 .uleb128 0x7 - 3753 0049 26 .uleb128 0x26 - 3754 004a 00 .byte 0 - 3755 004b 49 .uleb128 0x49 - 3756 004c 13 .uleb128 0x13 - 3757 004d 00 .byte 0 - 3758 004e 00 .byte 0 - 3759 004f 08 .uleb128 0x8 - 3760 0050 13 .uleb128 0x13 - 3761 0051 01 .byte 0x1 - 3762 0052 03 .uleb128 0x3 - 3763 0053 0E .uleb128 0xe - 3764 0054 0B .uleb128 0xb - 3765 0055 0B .uleb128 0xb - 3766 0056 3A .uleb128 0x3a - 3767 0057 0B .uleb128 0xb - 3768 0058 3B .uleb128 0x3b - 3769 0059 0B .uleb128 0xb - 3770 005a 01 .uleb128 0x1 - 3771 005b 13 .uleb128 0x13 - 3772 005c 00 .byte 0 - 3773 005d 00 .byte 0 - 3774 005e 09 .uleb128 0x9 - 3775 005f 0D .uleb128 0xd - 3776 0060 00 .byte 0 - 3777 0061 03 .uleb128 0x3 - 3778 0062 0E .uleb128 0xe - 3779 0063 3A .uleb128 0x3a - 3780 0064 0B .uleb128 0xb - 3781 0065 3B .uleb128 0x3b - 3782 0066 0B .uleb128 0xb - 3783 0067 49 .uleb128 0x49 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 69 - - - 3784 0068 13 .uleb128 0x13 - 3785 0069 38 .uleb128 0x38 - 3786 006a 0A .uleb128 0xa - 3787 006b 00 .byte 0 - 3788 006c 00 .byte 0 - 3789 006d 0A .uleb128 0xa - 3790 006e 0D .uleb128 0xd - 3791 006f 00 .byte 0 - 3792 0070 03 .uleb128 0x3 - 3793 0071 08 .uleb128 0x8 - 3794 0072 3A .uleb128 0x3a - 3795 0073 0B .uleb128 0xb - 3796 0074 3B .uleb128 0x3b - 3797 0075 0B .uleb128 0xb - 3798 0076 49 .uleb128 0x49 - 3799 0077 13 .uleb128 0x13 - 3800 0078 38 .uleb128 0x38 - 3801 0079 0A .uleb128 0xa - 3802 007a 00 .byte 0 - 3803 007b 00 .byte 0 - 3804 007c 0B .uleb128 0xb - 3805 007d 13 .uleb128 0x13 - 3806 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- - - 3841 00a1 0E .uleb128 0xe - 3842 00a2 3A .uleb128 0x3a - 3843 00a3 0B .uleb128 0xb - 3844 00a4 3B .uleb128 0x3b - 3845 00a5 0B .uleb128 0xb - 3846 00a6 49 .uleb128 0x49 - 3847 00a7 13 .uleb128 0x13 - 3848 00a8 00 .byte 0 - 3849 00a9 00 .byte 0 - 3850 00aa 0F .uleb128 0xf - 3851 00ab 15 .uleb128 0x15 - 3852 00ac 01 .byte 0x1 - 3853 00ad 27 .uleb128 0x27 - 3854 00ae 0C .uleb128 0xc - 3855 00af 01 .uleb128 0x1 - 3856 00b0 13 .uleb128 0x13 - 3857 00b1 00 .byte 0 - 3858 00b2 00 .byte 0 - 3859 00b3 10 .uleb128 0x10 - 3860 00b4 05 .uleb128 0x5 - 3861 00b5 00 .byte 0 - 3862 00b6 49 .uleb128 0x49 - 3863 00b7 13 .uleb128 0x13 - 3864 00b8 00 .byte 0 - 3865 00b9 00 .byte 0 - 3866 00ba 11 .uleb128 0x11 - 3867 00bb 15 .uleb128 0x15 - 3868 00bc 01 .byte 0x1 - 3869 00bd 27 .uleb128 0x27 - 3870 00be 0C .uleb128 0xc - 3871 00bf 49 .uleb128 0x49 - 3872 00c0 13 .uleb128 0x13 - 3873 00c1 01 .uleb128 0x1 - 3874 00c2 13 .uleb128 0x13 - 3875 00c3 00 .byte 0 - 3876 00c4 00 .byte 0 - 3877 00c5 12 .uleb128 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00 .byte 0 - 3949 010d 03 .uleb128 0x3 - 3950 010e 0E .uleb128 0xe - 3951 010f 1C .uleb128 0x1c - 3952 0110 0D .uleb128 0xd - 3953 0111 00 .byte 0 - 3954 0112 00 .byte 0 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 72 - - - 3955 0113 18 .uleb128 0x18 - 3956 0114 01 .uleb128 0x1 - 3957 0115 01 .byte 0x1 - 3958 0116 49 .uleb128 0x49 - 3959 0117 13 .uleb128 0x13 - 3960 0118 01 .uleb128 0x1 - 3961 0119 13 .uleb128 0x13 - 3962 011a 00 .byte 0 - 3963 011b 00 .byte 0 - 3964 011c 19 .uleb128 0x19 - 3965 011d 21 .uleb128 0x21 - 3966 011e 00 .byte 0 - 3967 011f 49 .uleb128 0x49 - 3968 0120 13 .uleb128 0x13 - 3969 0121 2F .uleb128 0x2f - 3970 0122 0B .uleb128 0xb - 3971 0123 00 .byte 0 - 3972 0124 00 .byte 0 - 3973 0125 1A .uleb128 0x1a - 3974 0126 2E .uleb128 0x2e - 3975 0127 01 .byte 0x1 - 3976 0128 03 .uleb128 0x3 - 3977 0129 0E .uleb128 0xe - 3978 012a 3A .uleb128 0x3a - 3979 012b 0B .uleb128 0xb - 3980 012c 3B .uleb128 0x3b - 3981 012d 0B .uleb128 0xb - 3982 012e 27 .uleb128 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4017 0151 2E .uleb128 0x2e - 4018 0152 01 .byte 0x1 - 4019 0153 03 .uleb128 0x3 - 4020 0154 0E .uleb128 0xe - 4021 0155 3A .uleb128 0x3a - 4022 0156 0B .uleb128 0xb - 4023 0157 3B .uleb128 0x3b - 4024 0158 0B .uleb128 0xb - 4025 0159 27 .uleb128 0x27 - 4026 015a 0C .uleb128 0xc - 4027 015b 11 .uleb128 0x11 - 4028 015c 01 .uleb128 0x1 - 4029 015d 12 .uleb128 0x12 - 4030 015e 01 .uleb128 0x1 - 4031 015f 40 .uleb128 0x40 - 4032 0160 06 .uleb128 0x6 - 4033 0161 01 .uleb128 0x1 - 4034 0162 13 .uleb128 0x13 - 4035 0163 00 .byte 0 - 4036 0164 00 .byte 0 - 4037 0165 1E .uleb128 0x1e - 4038 0166 05 .uleb128 0x5 - 4039 0167 00 .byte 0 - 4040 0168 03 .uleb128 0x3 - 4041 0169 08 .uleb128 0x8 - 4042 016a 3A .uleb128 0x3a - 4043 016b 0B .uleb128 0xb - 4044 016c 3B .uleb128 0x3b - 4045 016d 0B .uleb128 0xb - 4046 016e 49 .uleb128 0x49 - 4047 016f 13 .uleb128 0x13 - 4048 0170 02 .uleb128 0x2 - 4049 0171 06 .uleb128 0x6 - 4050 0172 00 .byte 0 - 4051 0173 00 .byte 0 - 4052 0174 1F .uleb128 0x1f - 4053 0175 05 .uleb128 0x5 - 4054 0176 00 .byte 0 - 4055 0177 03 .uleb128 0x3 - 4056 0178 0E .uleb128 0xe - 4057 0179 3A .uleb128 0x3a - 4058 017a 0B .uleb128 0xb - 4059 017b 3B .uleb128 0x3b - 4060 017c 0B .uleb128 0xb - 4061 017d 49 .uleb128 0x49 - 4062 017e 13 .uleb128 0x13 - 4063 017f 02 .uleb128 0x2 - 4064 0180 06 .uleb128 0x6 - 4065 0181 00 .byte 0 - 4066 0182 00 .byte 0 - 4067 0183 20 .uleb128 0x20 - 4068 0184 34 .uleb128 0x34 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 74 - - - 4069 0185 00 .byte 0 - 4070 0186 03 .uleb128 0x3 - 4071 0187 08 .uleb128 0x8 - 4072 0188 3A .uleb128 0x3a - 4073 0189 0B .uleb128 0xb - 4074 018a 3B .uleb128 0x3b - 4075 018b 0B .uleb128 0xb - 4076 018c 49 .uleb128 0x49 - 4077 018d 13 .uleb128 0x13 - 4078 018e 02 .uleb128 0x2 - 4079 018f 0A .uleb128 0xa - 4080 0190 00 .byte 0 - 4081 0191 00 .byte 0 - 4082 0192 21 .uleb128 0x21 - 4083 0193 0B .uleb128 0xb - 4084 0194 01 .byte 0x1 - 4085 0195 11 .uleb128 0x11 - 4086 0196 01 .uleb128 0x1 - 4087 0197 12 .uleb128 0x12 - 4088 0198 01 .uleb128 0x1 - 4089 0199 01 .uleb128 0x1 - 4090 019a 13 .uleb128 0x13 - 4091 019b 00 .byte 0 - 4092 019c 00 .byte 0 - 4093 019d 22 .uleb128 0x22 - 4094 019e 34 .uleb128 0x34 - 4095 019f 00 .byte 0 - 4096 01a0 03 .uleb128 0x3 - 4097 01a1 08 .uleb128 0x8 - 4098 01a2 3A .uleb128 0x3a - 4099 01a3 0B .uleb128 0xb - 4100 01a4 3B .uleb128 0x3b - 4101 01a5 0B .uleb128 0xb - 4102 01a6 49 .uleb128 0x49 - 4103 01a7 13 .uleb128 0x13 - 4104 01a8 02 .uleb128 0x2 - 4105 01a9 06 .uleb128 0x6 - 4106 01aa 00 .byte 0 - 4107 01ab 00 .byte 0 - 4108 01ac 23 .uleb128 0x23 - 4109 01ad 0B .uleb128 0xb - 4110 01ae 01 .byte 0x1 - 4111 01af 11 .uleb128 0x11 - 4112 01b0 01 .uleb128 0x1 - 4113 01b1 12 .uleb128 0x12 - 4114 01b2 01 .uleb128 0x1 - 4115 01b3 00 .byte 0 - 4116 01b4 00 .byte 0 - 4117 01b5 24 .uleb128 0x24 - 4118 01b6 2E .uleb128 0x2e - 4119 01b7 01 .byte 0x1 - 4120 01b8 03 .uleb128 0x3 - 4121 01b9 0E .uleb128 0xe - 4122 01ba 3A .uleb128 0x3a - 4123 01bb 0B .uleb128 0xb - 4124 01bc 3B .uleb128 0x3b - 4125 01bd 0B .uleb128 0xb - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 75 - - - 4126 01be 27 .uleb128 0x27 - 4127 01bf 0C .uleb128 0xc - 4128 01c0 49 .uleb128 0x49 - 4129 01c1 13 .uleb128 0x13 - 4130 01c2 11 .uleb128 0x11 - 4131 01c3 01 .uleb128 0x1 - 4132 01c4 12 .uleb128 0x12 - 4133 01c5 01 .uleb128 0x1 - 4134 01c6 40 .uleb128 0x40 - 4135 01c7 06 .uleb128 0x6 - 4136 01c8 01 .uleb128 0x1 - 4137 01c9 13 .uleb128 0x13 - 4138 01ca 00 .byte 0 - 4139 01cb 00 .byte 0 - 4140 01cc 25 .uleb128 0x25 - 4141 01cd 34 .uleb128 0x34 - 4142 01ce 00 .byte 0 - 4143 01cf 03 .uleb128 0x3 - 4144 01d0 0E .uleb128 0xe - 4145 01d1 3A .uleb128 0x3a - 4146 01d2 0B .uleb128 0xb - 4147 01d3 3B .uleb128 0x3b - 4148 01d4 0B .uleb128 0xb - 4149 01d5 49 .uleb128 0x49 - 4150 01d6 13 .uleb128 0x13 - 4151 01d7 02 .uleb128 0x2 - 4152 01d8 06 .uleb128 0x6 - 4153 01d9 00 .byte 0 - 4154 01da 00 .byte 0 - 4155 01db 26 .uleb128 0x26 - 4156 01dc 2E .uleb128 0x2e - 4157 01dd 01 .byte 0x1 - 4158 01de 31 .uleb128 0x31 - 4159 01df 13 .uleb128 0x13 - 4160 01e0 11 .uleb128 0x11 - 4161 01e1 01 .uleb128 0x1 - 4162 01e2 12 .uleb128 0x12 - 4163 01e3 01 .uleb128 0x1 - 4164 01e4 40 .uleb128 0x40 - 4165 01e5 06 .uleb128 0x6 - 4166 01e6 01 .uleb128 0x1 - 4167 01e7 13 .uleb128 0x13 - 4168 01e8 00 .byte 0 - 4169 01e9 00 .byte 0 - 4170 01ea 27 .uleb128 0x27 - 4171 01eb 05 .uleb128 0x5 - 4172 01ec 00 .byte 0 - 4173 01ed 31 .uleb128 0x31 - 4174 01ee 13 .uleb128 0x13 - 4175 01ef 02 .uleb128 0x2 - 4176 01f0 06 .uleb128 0x6 - 4177 01f1 00 .byte 0 - 4178 01f2 00 .byte 0 - 4179 01f3 28 .uleb128 0x28 - 4180 01f4 34 .uleb128 0x34 - 4181 01f5 00 .byte 0 - 4182 01f6 31 .uleb128 0x31 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 76 - - - 4183 01f7 13 .uleb128 0x13 - 4184 01f8 02 .uleb128 0x2 - 4185 01f9 0A .uleb128 0xa - 4186 01fa 00 .byte 0 - 4187 01fb 00 .byte 0 - 4188 01fc 29 .uleb128 0x29 - 4189 01fd 34 .uleb128 0x34 - 4190 01fe 00 .byte 0 - 4191 01ff 31 .uleb128 0x31 - 4192 0200 13 .uleb128 0x13 - 4193 0201 02 .uleb128 0x2 - 4194 0202 06 .uleb128 0x6 - 4195 0203 00 .byte 0 - 4196 0204 00 .byte 0 - 4197 0205 2A .uleb128 0x2a - 4198 0206 1D .uleb128 0x1d - 4199 0207 01 .byte 0x1 - 4200 0208 31 .uleb128 0x31 - 4201 0209 13 .uleb128 0x13 - 4202 020a 52 .uleb128 0x52 - 4203 020b 01 .uleb128 0x1 - 4204 020c 55 .uleb128 0x55 - 4205 020d 06 .uleb128 0x6 - 4206 020e 58 .uleb128 0x58 - 4207 020f 0B .uleb128 0xb - 4208 0210 59 .uleb128 0x59 - 4209 0211 0B .uleb128 0xb - 4210 0212 00 .byte 0 - 4211 0213 00 .byte 0 - 4212 0214 2B .uleb128 0x2b - 4213 0215 0B .uleb128 0xb - 4214 0216 01 .byte 0x1 - 4215 0217 55 .uleb128 0x55 - 4216 0218 06 .uleb128 0x6 - 4217 0219 00 .byte 0 - 4218 021a 00 .byte 0 - 4219 021b 2C .uleb128 0x2c - 4220 021c 34 .uleb128 0x34 - 4221 021d 00 .byte 0 - 4222 021e 31 .uleb128 0x31 - 4223 021f 13 .uleb128 0x13 - 4224 0220 00 .byte 0 - 4225 0221 00 .byte 0 - 4226 0222 2D .uleb128 0x2d - 4227 0223 05 .uleb128 0x5 - 4228 0224 00 .byte 0 - 4229 0225 31 .uleb128 0x31 - 4230 0226 13 .uleb128 0x13 - 4231 0227 00 .byte 0 - 4232 0228 00 .byte 0 - 4233 0229 2E .uleb128 0x2e - 4234 022a 2E .uleb128 0x2e - 4235 022b 01 .byte 0x1 - 4236 022c 3F .uleb128 0x3f - 4237 022d 0C .uleb128 0xc - 4238 022e 03 .uleb128 0x3 - 4239 022f 0E .uleb128 0xe - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 77 - - - 4240 0230 3A .uleb128 0x3a - 4241 0231 0B .uleb128 0xb - 4242 0232 3B .uleb128 0x3b - 4243 0233 0B .uleb128 0xb - 4244 0234 27 .uleb128 0x27 - 4245 0235 0C .uleb128 0xc - 4246 0236 49 .uleb128 0x49 - 4247 0237 13 .uleb128 0x13 - 4248 0238 11 .uleb128 0x11 - 4249 0239 01 .uleb128 0x1 - 4250 023a 12 .uleb128 0x12 - 4251 023b 01 .uleb128 0x1 - 4252 023c 40 .uleb128 0x40 - 4253 023d 06 .uleb128 0x6 - 4254 023e 01 .uleb128 0x1 - 4255 023f 13 .uleb128 0x13 - 4256 0240 00 .byte 0 - 4257 0241 00 .byte 0 - 4258 0242 2F .uleb128 0x2f - 4259 0243 1D .uleb128 0x1d - 4260 0244 01 .byte 0x1 - 4261 0245 31 .uleb128 0x31 - 4262 0246 13 .uleb128 0x13 - 4263 0247 11 .uleb128 0x11 - 4264 0248 01 .uleb128 0x1 - 4265 0249 12 .uleb128 0x12 - 4266 024a 01 .uleb128 0x1 - 4267 024b 58 .uleb128 0x58 - 4268 024c 0B .uleb128 0xb - 4269 024d 59 .uleb128 0x59 - 4270 024e 0B .uleb128 0xb - 4271 024f 01 .uleb128 0x1 - 4272 0250 13 .uleb128 0x13 - 4273 0251 00 .byte 0 - 4274 0252 00 .byte 0 - 4275 0253 30 .uleb128 0x30 - 4276 0254 1D .uleb128 0x1d - 4277 0255 01 .byte 0x1 - 4278 0256 31 .uleb128 0x31 - 4279 0257 13 .uleb128 0x13 - 4280 0258 11 .uleb128 0x11 - 4281 0259 01 .uleb128 0x1 - 4282 025a 12 .uleb128 0x12 - 4283 025b 01 .uleb128 0x1 - 4284 025c 58 .uleb128 0x58 - 4285 025d 0B .uleb128 0xb - 4286 025e 59 .uleb128 0x59 - 4287 025f 05 .uleb128 0x5 - 4288 0260 01 .uleb128 0x1 - 4289 0261 13 .uleb128 0x13 - 4290 0262 00 .byte 0 - 4291 0263 00 .byte 0 - 4292 0264 31 .uleb128 0x31 - 4293 0265 1D .uleb128 0x1d - 4294 0266 01 .byte 0x1 - 4295 0267 31 .uleb128 0x31 - 4296 0268 13 .uleb128 0x13 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 78 - - - 4297 0269 52 .uleb128 0x52 - 4298 026a 01 .uleb128 0x1 - 4299 026b 55 .uleb128 0x55 - 4300 026c 06 .uleb128 0x6 - 4301 026d 58 .uleb128 0x58 - 4302 026e 0B .uleb128 0xb - 4303 026f 59 .uleb128 0x59 - 4304 0270 05 .uleb128 0x5 - 4305 0271 01 .uleb128 0x1 - 4306 0272 13 .uleb128 0x13 - 4307 0273 00 .byte 0 - 4308 0274 00 .byte 0 - 4309 0275 32 .uleb128 0x32 - 4310 0276 1D .uleb128 0x1d - 4311 0277 01 .byte 0x1 - 4312 0278 31 .uleb128 0x31 - 4313 0279 13 .uleb128 0x13 - 4314 027a 11 .uleb128 0x11 - 4315 027b 01 .uleb128 0x1 - 4316 027c 12 .uleb128 0x12 - 4317 027d 01 .uleb128 0x1 - 4318 027e 58 .uleb128 0x58 - 4319 027f 0B .uleb128 0xb - 4320 0280 59 .uleb128 0x59 - 4321 0281 05 .uleb128 0x5 - 4322 0282 00 .byte 0 - 4323 0283 00 .byte 0 - 4324 0284 33 .uleb128 0x33 - 4325 0285 34 .uleb128 0x34 - 4326 0286 00 .byte 0 - 4327 0287 03 .uleb128 0x3 - 4328 0288 0E .uleb128 0xe - 4329 0289 3A .uleb128 0x3a - 4330 028a 0B .uleb128 0xb - 4331 028b 3B .uleb128 0x3b - 4332 028c 0B .uleb128 0xb - 4333 028d 49 .uleb128 0x49 - 4334 028e 13 .uleb128 0x13 - 4335 028f 3F .uleb128 0x3f - 4336 0290 0C .uleb128 0xc - 4337 0291 3C .uleb128 0x3c - 4338 0292 0C .uleb128 0xc - 4339 0293 00 .byte 0 - 4340 0294 00 .byte 0 - 4341 0295 34 .uleb128 0x34 - 4342 0296 34 .uleb128 0x34 - 4343 0297 00 .byte 0 - 4344 0298 03 .uleb128 0x3 - 4345 0299 0E .uleb128 0xe - 4346 029a 3A .uleb128 0x3a - 4347 029b 0B .uleb128 0xb - 4348 029c 3B .uleb128 0x3b - 4349 029d 05 .uleb128 0x5 - 4350 029e 49 .uleb128 0x49 - 4351 029f 13 .uleb128 0x13 - 4352 02a0 3F .uleb128 0x3f - 4353 02a1 0C .uleb128 0xc - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 79 - - - 4354 02a2 3C .uleb128 0x3c - 4355 02a3 0C .uleb128 0xc - 4356 02a4 00 .byte 0 - 4357 02a5 00 .byte 0 - 4358 02a6 35 .uleb128 0x35 - 4359 02a7 34 .uleb128 0x34 - 4360 02a8 00 .byte 0 - 4361 02a9 03 .uleb128 0x3 - 4362 02aa 08 .uleb128 0x8 - 4363 02ab 3A .uleb128 0x3a - 4364 02ac 0B .uleb128 0xb - 4365 02ad 3B .uleb128 0x3b - 4366 02ae 0B .uleb128 0xb - 4367 02af 49 .uleb128 0x49 - 4368 02b0 13 .uleb128 0x13 - 4369 02b1 3F .uleb128 0x3f - 4370 02b2 0C .uleb128 0xc - 4371 02b3 3C .uleb128 0x3c - 4372 02b4 0C .uleb128 0xc - 4373 02b5 00 .byte 0 - 4374 02b6 00 .byte 0 - 4375 02b7 36 .uleb128 0x36 - 4376 02b8 34 .uleb128 0x34 - 4377 02b9 00 .byte 0 - 4378 02ba 03 .uleb128 0x3 - 4379 02bb 0E .uleb128 0xe - 4380 02bc 3A .uleb128 0x3a - 4381 02bd 0B .uleb128 0xb - 4382 02be 3B .uleb128 0x3b - 4383 02bf 0B .uleb128 0xb - 4384 02c0 49 .uleb128 0x49 - 4385 02c1 13 .uleb128 0x13 - 4386 02c2 02 .uleb128 0x2 - 4387 02c3 0A .uleb128 0xa - 4388 02c4 00 .byte 0 - 4389 02c5 00 .byte 0 - 4390 02c6 00 .byte 0 - 4391 .section .debug_loc,"",%progbits - 4392 .Ldebug_loc0: - 4393 .LLST0: - 4394 0000 00000000 .4byte .LFB66 - 4395 0004 02000000 .4byte .LCFI0 - 4396 0008 0200 .2byte 0x2 - 4397 000a 7D .byte 0x7d - 4398 000b 00 .sleb128 0 - 4399 000c 02000000 .4byte .LCFI0 - 4400 0010 38000000 .4byte .LFE66 - 4401 0014 0200 .2byte 0x2 - 4402 0016 7D .byte 0x7d - 4403 0017 10 .sleb128 16 - 4404 0018 00000000 .4byte 0 - 4405 001c 00000000 .4byte 0 - 4406 .LLST1: - 4407 0020 00000000 .4byte .LVL0 - 4408 0024 0A000000 .4byte .LVL1 - 4409 0028 0100 .2byte 0x1 - 4410 002a 50 .byte 0x50 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 80 - - - 4411 002b 00000000 .4byte 0 - 4412 002f 00000000 .4byte 0 - 4413 .LLST2: - 4414 0033 00000000 .4byte .LFB64 - 4415 0037 02000000 .4byte .LCFI1 - 4416 003b 0200 .2byte 0x2 - 4417 003d 7D .byte 0x7d - 4418 003e 00 .sleb128 0 - 4419 003f 02000000 .4byte .LCFI1 - 4420 0043 28000000 .4byte .LFE64 - 4421 0047 0200 .2byte 0x2 - 4422 0049 7D .byte 0x7d - 4423 004a 08 .sleb128 8 - 4424 004b 00000000 .4byte 0 - 4425 004f 00000000 .4byte 0 - 4426 .LLST3: - 4427 0053 00000000 .4byte .LVL2 - 4428 0057 0A000000 .4byte .LVL5 - 4429 005b 0100 .2byte 0x1 - 4430 005d 50 .byte 0x50 - 4431 005e 00000000 .4byte 0 - 4432 0062 00000000 .4byte 0 - 4433 .LLST4: - 4434 0066 08000000 .4byte .LVL4 - 4435 006a 0F000000 .4byte .LVL6-1 - 4436 006e 0100 .2byte 0x1 - 4437 0070 53 .byte 0x53 - 4438 0071 00000000 .4byte 0 - 4439 0075 00000000 .4byte 0 - 4440 .LLST5: - 4441 0079 1E000000 .4byte .LVL8 - 4442 007d 28000000 .4byte .LFE64 - 4443 0081 0100 .2byte 0x1 - 4444 0083 53 .byte 0x53 - 4445 0084 00000000 .4byte 0 - 4446 0088 00000000 .4byte 0 - 4447 .LLST6: - 4448 008c 00000000 .4byte .LFB63 - 4449 0090 02000000 .4byte .LCFI2 - 4450 0094 0200 .2byte 0x2 - 4451 0096 7D .byte 0x7d - 4452 0097 00 .sleb128 0 - 4453 0098 02000000 .4byte .LCFI2 - 4454 009c 28000000 .4byte .LFE63 - 4455 00a0 0200 .2byte 0x2 - 4456 00a2 7D .byte 0x7d - 4457 00a3 08 .sleb128 8 - 4458 00a4 00000000 .4byte 0 - 4459 00a8 00000000 .4byte 0 - 4460 .LLST7: - 4461 00ac 00000000 .4byte .LVL9 - 4462 00b0 0A000000 .4byte .LVL12 - 4463 00b4 0100 .2byte 0x1 - 4464 00b6 50 .byte 0x50 - 4465 00b7 00000000 .4byte 0 - 4466 00bb 00000000 .4byte 0 - 4467 .LLST8: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 81 - - - 4468 00bf 08000000 .4byte .LVL11 - 4469 00c3 0F000000 .4byte .LVL13-1 - 4470 00c7 0100 .2byte 0x1 - 4471 00c9 53 .byte 0x53 - 4472 00ca 00000000 .4byte 0 - 4473 00ce 00000000 .4byte 0 - 4474 .LLST9: - 4475 00d2 1E000000 .4byte .LVL15 - 4476 00d6 28000000 .4byte .LFE63 - 4477 00da 0100 .2byte 0x1 - 4478 00dc 53 .byte 0x53 - 4479 00dd 00000000 .4byte 0 - 4480 00e1 00000000 .4byte 0 - 4481 .LLST10: - 4482 00e5 00000000 .4byte .LFB62 - 4483 00e9 04000000 .4byte .LCFI3 - 4484 00ed 0200 .2byte 0x2 - 4485 00ef 7D .byte 0x7d - 4486 00f0 00 .sleb128 0 - 4487 00f1 04000000 .4byte .LCFI3 - 4488 00f5 18000000 .4byte .LCFI4 - 4489 00f9 0200 .2byte 0x2 - 4490 00fb 7D .byte 0x7d - 4491 00fc 24 .sleb128 36 - 4492 00fd 18000000 .4byte .LCFI4 - 4493 0101 AC000000 .4byte .LFE62 - 4494 0105 0200 .2byte 0x2 - 4495 0107 7D .byte 0x7d - 4496 0108 30 .sleb128 48 - 4497 0109 00000000 .4byte 0 - 4498 010d 00000000 .4byte 0 - 4499 .LLST11: - 4500 0111 00000000 .4byte .LVL16 - 4501 0115 2A000000 .4byte .LVL17 - 4502 0119 0100 .2byte 0x1 - 4503 011b 50 .byte 0x50 - 4504 011c 2A000000 .4byte .LVL17 - 4505 0120 AC000000 .4byte .LFE62 - 4506 0124 0300 .2byte 0x3 - 4507 0126 79 .byte 0x79 - 4508 0127 01 .sleb128 1 - 4509 0128 9F .byte 0x9f - 4510 0129 00000000 .4byte 0 - 4511 012d 00000000 .4byte 0 - 4512 .LLST13: - 4513 0131 4E000000 .4byte .LVL21 - 4514 0135 54000000 .4byte .LVL22 - 4515 0139 0100 .2byte 0x1 - 4516 013b 53 .byte 0x53 - 4517 013c 76000000 .4byte .LVL23 - 4518 0140 7A000000 .4byte .LVL24 - 4519 0144 0100 .2byte 0x1 - 4520 0146 53 .byte 0x53 - 4521 0147 00000000 .4byte 0 - 4522 014b 00000000 .4byte 0 - 4523 .LLST14: - 4524 014f 36000000 .4byte .LVL19 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 82 - - - 4525 0153 3A000000 .4byte .LVL20 - 4526 0157 0300 .2byte 0x3 - 4527 0159 75 .byte 0x75 - 4528 015a 7F .sleb128 -1 - 4529 015b 9F .byte 0x9f - 4530 015c 00000000 .4byte 0 - 4531 0160 00000000 .4byte 0 - 4532 .LLST15: - 4533 0164 2A000000 .4byte .LVL17 - 4534 0168 2C000000 .4byte .LVL18 - 4535 016c 0100 .2byte 0x1 - 4536 016e 50 .byte 0x50 - 4537 016f 2C000000 .4byte .LVL18 - 4538 0173 AC000000 .4byte .LFE62 - 4539 0177 0200 .2byte 0x2 - 4540 0179 91 .byte 0x91 - 4541 017a 54 .sleb128 -44 - 4542 017b 00000000 .4byte 0 - 4543 017f 00000000 .4byte 0 - 4544 .LLST16: - 4545 0183 00000000 .4byte .LFB67 - 4546 0187 02000000 .4byte .LCFI5 - 4547 018b 0200 .2byte 0x2 - 4548 018d 7D .byte 0x7d - 4549 018e 00 .sleb128 0 - 4550 018f 02000000 .4byte .LCFI5 - 4551 0193 04000000 .4byte .LCFI6 - 4552 0197 0200 .2byte 0x2 - 4553 0199 7D .byte 0x7d - 4554 019a 10 .sleb128 16 - 4555 019b 04000000 .4byte .LCFI6 - 4556 019f 68000000 .4byte .LFE67 - 4557 01a3 0200 .2byte 0x2 - 4558 01a5 7D .byte 0x7d - 4559 01a6 20 .sleb128 32 - 4560 01a7 00000000 .4byte 0 - 4561 01ab 00000000 .4byte 0 - 4562 .LLST17: - 4563 01af 00000000 .4byte .LVL25 - 4564 01b3 14000000 .4byte .LVL26 - 4565 01b7 0100 .2byte 0x1 - 4566 01b9 50 .byte 0x50 - 4567 01ba 2C000000 .4byte .LVL27 - 4568 01be 3A000000 .4byte .LVL29 - 4569 01c2 0100 .2byte 0x1 - 4570 01c4 53 .byte 0x53 - 4571 01c5 52000000 .4byte .LVL30 - 4572 01c9 54000000 .4byte .LVL31 - 4573 01cd 0100 .2byte 0x1 - 4574 01cf 50 .byte 0x50 - 4575 01d0 00000000 .4byte 0 - 4576 01d4 00000000 .4byte 0 - 4577 .LLST18: - 4578 01d8 2C000000 .4byte .LVL27 - 4579 01dc 38000000 .4byte .LVL28 - 4580 01e0 0100 .2byte 0x1 - 4581 01e2 54 .byte 0x54 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 83 - - - 4582 01e3 38000000 .4byte .LVL28 - 4583 01e7 3A000000 .4byte .LVL29 - 4584 01eb 0300 .2byte 0x3 - 4585 01ed 74 .byte 0x74 - 4586 01ee 01 .sleb128 1 - 4587 01ef 9F .byte 0x9f - 4588 01f0 00000000 .4byte 0 - 4589 01f4 00000000 .4byte 0 - 4590 .LLST19: - 4591 01f8 00000000 .4byte .LFB68 - 4592 01fc 04000000 .4byte .LCFI7 - 4593 0200 0200 .2byte 0x2 - 4594 0202 7D .byte 0x7d - 4595 0203 00 .sleb128 0 - 4596 0204 04000000 .4byte .LCFI7 - 4597 0208 06000000 .4byte .LCFI8 - 4598 020c 0200 .2byte 0x2 - 4599 020e 7D .byte 0x7d - 4600 020f 20 .sleb128 32 - 4601 0210 06000000 .4byte .LCFI8 - 4602 0214 E4030000 .4byte .LFE68 - 4603 0218 0200 .2byte 0x2 - 4604 021a 7D .byte 0x7d - 4605 021b 30 .sleb128 48 - 4606 021c 00000000 .4byte 0 - 4607 0220 00000000 .4byte 0 - 4608 .LLST20: - 4609 0224 4A000000 .4byte .LVL32 - 4610 0228 52000000 .4byte .LVL33 - 4611 022c 0200 .2byte 0x2 - 4612 022e 30 .byte 0x30 - 4613 022f 9F .byte 0x9f - 4614 0230 74000000 .4byte .LVL34 - 4615 0234 8C000000 .4byte .LVL35 - 4616 0238 0100 .2byte 0x1 - 4617 023a 54 .byte 0x54 - 4618 023b 0E020000 .4byte .LVL58 - 4619 023f 1E020000 .4byte .LVL59 - 4620 0243 0200 .2byte 0x2 - 4621 0245 31 .byte 0x31 - 4622 0246 9F .byte 0x9f - 4623 0247 7A030000 .4byte .LVL72 - 4624 024b E4030000 .4byte .LFE68 - 4625 024f 0100 .2byte 0x1 - 4626 0251 59 .byte 0x59 - 4627 0252 00000000 .4byte 0 - 4628 0256 00000000 .4byte 0 - 4629 .LLST21: - 4630 025a 4E020000 .4byte .LVL61 - 4631 025e CC020000 .4byte .LVL62 - 4632 0262 0400 .2byte 0x4 - 4633 0264 0A .byte 0xa - 4634 0265 D007 .2byte 0x7d0 - 4635 0267 9F .byte 0x9f - 4636 0268 DE020000 .4byte .LVL64 - 4637 026c E2020000 .4byte .LVL65 - 4638 0270 0100 .2byte 0x1 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 84 - - - 4639 0272 56 .byte 0x56 - 4640 0273 2E030000 .4byte .LVL68 - 4641 0277 32030000 .4byte .LVL69 - 4642 027b 0100 .2byte 0x1 - 4643 027d 56 .byte 0x56 - 4644 027e 00000000 .4byte 0 - 4645 0282 00000000 .4byte 0 - 4646 .LLST22: - 4647 0286 4E020000 .4byte .LVL61 - 4648 028a CC020000 .4byte .LVL62 - 4649 028e 0200 .2byte 0x2 - 4650 0290 30 .byte 0x30 - 4651 0291 9F .byte 0x9f - 4652 0292 D4020000 .4byte .LVL63 - 4653 0296 E2020000 .4byte .LVL65 - 4654 029a 0100 .2byte 0x1 - 4655 029c 54 .byte 0x54 - 4656 029d 24030000 .4byte .LVL67 - 4657 02a1 32030000 .4byte .LVL69 - 4658 02a5 0100 .2byte 0x1 - 4659 02a7 54 .byte 0x54 - 4660 02a8 00000000 .4byte 0 - 4661 02ac 00000000 .4byte 0 - 4662 .LLST23: - 4663 02b0 0E020000 .4byte .LVL58 - 4664 02b4 1E020000 .4byte .LVL59 - 4665 02b8 0200 .2byte 0x2 - 4666 02ba 30 .byte 0x30 - 4667 02bb 9F .byte 0x9f - 4668 02bc 7A030000 .4byte .LVL72 - 4669 02c0 E4030000 .4byte .LFE68 - 4670 02c4 0100 .2byte 0x1 - 4671 02c6 5A .byte 0x5a - 4672 02c7 00000000 .4byte 0 - 4673 02cb 00000000 .4byte 0 - 4674 .LLST24: - 4675 02cf 94000000 .4byte .LVL36 - 4676 02d3 96000000 .4byte .LVL37 - 4677 02d7 0600 .2byte 0x6 - 4678 02d9 03 .byte 0x3 - 4679 02da 40000000 .4byte .LC5 - 4680 02de 9F .byte 0x9f - 4681 02df 00000000 .4byte 0 - 4682 02e3 00000000 .4byte 0 - 4683 .LLST25: - 4684 02e7 B2000000 .4byte .LVL38 - 4685 02eb B4000000 .4byte .LVL39 - 4686 02ef 0600 .2byte 0x6 - 4687 02f1 03 .byte 0x3 - 4688 02f2 64000000 .4byte .LC7 - 4689 02f6 9F .byte 0x9f - 4690 02f7 00000000 .4byte 0 - 4691 02fb 00000000 .4byte 0 - 4692 .LLST26: - 4693 02ff D0000000 .4byte .LVL40 - 4694 0303 D2000000 .4byte .LVL41 - 4695 0307 0600 .2byte 0x6 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 85 - - - 4696 0309 03 .byte 0x3 - 4697 030a 80000000 .4byte .LC9 - 4698 030e 9F .byte 0x9f - 4699 030f 00000000 .4byte 0 - 4700 0313 00000000 .4byte 0 - 4701 .LLST27: - 4702 0317 EE000000 .4byte .LVL42 - 4703 031b F0000000 .4byte .LVL43 - 4704 031f 0600 .2byte 0x6 - 4705 0321 03 .byte 0x3 - 4706 0322 9C000000 .4byte .LC11 - 4707 0326 9F .byte 0x9f - 4708 0327 00000000 .4byte 0 - 4709 032b 00000000 .4byte 0 - 4710 .LLST28: - 4711 032f 0C010000 .4byte .LVL44 - 4712 0333 0E010000 .4byte .LVL45 - 4713 0337 0600 .2byte 0x6 - 4714 0339 03 .byte 0x3 - 4715 033a BC000000 .4byte .LC13 - 4716 033e 9F .byte 0x9f - 4717 033f 00000000 .4byte 0 - 4718 0343 00000000 .4byte 0 - 4719 .LLST29: - 4720 0347 2A010000 .4byte .LVL46 - 4721 034b 2C010000 .4byte .LVL47 - 4722 034f 0600 .2byte 0x6 - 4723 0351 03 .byte 0x3 - 4724 0352 F8000000 .4byte .LC15 - 4725 0356 9F .byte 0x9f - 4726 0357 00000000 .4byte 0 - 4727 035b 00000000 .4byte 0 - 4728 .LLST30: - 4729 035f 4E010000 .4byte .LVL48 - 4730 0363 50010000 .4byte .LVL49 - 4731 0367 0600 .2byte 0x6 - 4732 0369 03 .byte 0x3 - 4733 036a 20010000 .4byte .LC17 - 4734 036e 9F .byte 0x9f - 4735 036f 00000000 .4byte 0 - 4736 0373 00000000 .4byte 0 - 4737 .LLST31: - 4738 0377 78010000 .4byte .LVL50 - 4739 037b 7A010000 .4byte .LVL51 - 4740 037f 0600 .2byte 0x6 - 4741 0381 03 .byte 0x3 - 4742 0382 34010000 .4byte .LC18 - 4743 0386 9F .byte 0x9f - 4744 0387 00000000 .4byte 0 - 4745 038b 00000000 .4byte 0 - 4746 .LLST32: - 4747 038f 9C010000 .4byte .LVL52 - 4748 0393 9E010000 .4byte .LVL53 - 4749 0397 0600 .2byte 0x6 - 4750 0399 03 .byte 0x3 - 4751 039a 48010000 .4byte .LC19 - 4752 039e 9F .byte 0x9f - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 86 - - - 4753 039f 00000000 .4byte 0 - 4754 03a3 00000000 .4byte 0 - 4755 .LLST33: - 4756 03a7 C0010000 .4byte .LVL54 - 4757 03ab C2010000 .4byte .LVL55 - 4758 03af 0600 .2byte 0x6 - 4759 03b1 03 .byte 0x3 - 4760 03b2 5C010000 .4byte .LC20 - 4761 03b6 9F .byte 0x9f - 4762 03b7 00000000 .4byte 0 - 4763 03bb 00000000 .4byte 0 - 4764 .LLST34: - 4765 03bf E2010000 .4byte .LVL56 - 4766 03c3 E6010000 .4byte .LVL57 - 4767 03c7 0600 .2byte 0x6 - 4768 03c9 03 .byte 0x3 - 4769 03ca 70010000 .4byte .LC21 - 4770 03ce 9F .byte 0x9f - 4771 03cf 00000000 .4byte 0 - 4772 03d3 00000000 .4byte 0 - 4773 .LLST35: - 4774 03d7 1E020000 .4byte .LVL59 - 4775 03db 22020000 .4byte .LVL60 - 4776 03df 0600 .2byte 0x6 - 4777 03e1 03 .byte 0x3 - 4778 03e2 98010000 .4byte .LC24 - 4779 03e6 9F .byte 0x9f - 4780 03e7 00000000 .4byte 0 - 4781 03eb 00000000 .4byte 0 - 4782 .LLST38: - 4783 03ef 40030000 .4byte .LVL70 - 4784 03f3 42030000 .4byte .LVL71 - 4785 03f7 0600 .2byte 0x6 - 4786 03f9 03 .byte 0x3 - 4787 03fa 84010000 .4byte .LC22 - 4788 03fe 9F .byte 0x9f - 4789 03ff 00000000 .4byte 0 - 4790 0403 00000000 .4byte 0 - 4791 .LLST39: - 4792 0407 8C030000 .4byte .LVL73 - 4793 040b 8E030000 .4byte .LVL74 - 4794 040f 0600 .2byte 0x6 - 4795 0411 03 .byte 0x3 - 4796 0412 A4010000 .4byte .LC25 - 4797 0416 9F .byte 0x9f - 4798 0417 00000000 .4byte 0 - 4799 041b 00000000 .4byte 0 - 4800 .section .debug_aranges,"",%progbits - 4801 0000 44000000 .4byte 0x44 - 4802 0004 0200 .2byte 0x2 - 4803 0006 00000000 .4byte .Ldebug_info0 - 4804 000a 04 .byte 0x4 - 4805 000b 00 .byte 0 - 4806 000c 0000 .2byte 0 - 4807 000e 0000 .2byte 0 - 4808 0010 00000000 .4byte .LFB66 - 4809 0014 38000000 .4byte .LFE66-.LFB66 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 87 - - - 4810 0018 00000000 .4byte .LFB64 - 4811 001c 28000000 .4byte .LFE64-.LFB64 - 4812 0020 00000000 .4byte .LFB63 - 4813 0024 28000000 .4byte .LFE63-.LFB63 - 4814 0028 00000000 .4byte .LFB62 - 4815 002c AC000000 .4byte .LFE62-.LFB62 - 4816 0030 00000000 .4byte .LFB67 - 4817 0034 68000000 .4byte .LFE67-.LFB67 - 4818 0038 00000000 .4byte .LFB68 - 4819 003c E4030000 .4byte .LFE68-.LFB68 - 4820 0040 00000000 .4byte 0 - 4821 0044 00000000 .4byte 0 - 4822 .section .debug_ranges,"",%progbits - 4823 .Ldebug_ranges0: - 4824 0000 0C000000 .4byte .LBB40 - 4825 0004 0E000000 .4byte .LBE40 - 4826 0008 52000000 .4byte .LBB43 - 4827 000c 68000000 .4byte .LBE43 - 4828 0010 00000000 .4byte 0 - 4829 0014 00000000 .4byte 0 - 4830 0018 0C000000 .4byte .LBB41 - 4831 001c 0E000000 .4byte .LBE41 - 4832 0020 52000000 .4byte .LBB42 - 4833 0024 68000000 .4byte .LBE42 - 4834 0028 00000000 .4byte 0 - 4835 002c 00000000 .4byte 0 - 4836 0030 0C030000 .4byte .LBB70 - 4837 0034 14030000 .4byte .LBE70 - 4838 0038 18030000 .4byte .LBB74 - 4839 003c 1A030000 .4byte .LBE74 - 4840 0040 20030000 .4byte .LBB75 - 4841 0044 24030000 .4byte .LBE75 - 4842 0048 00000000 .4byte 0 - 4843 004c 00000000 .4byte 0 - 4844 0050 00000000 .4byte .LFB66 - 4845 0054 38000000 .4byte .LFE66 - 4846 0058 00000000 .4byte .LFB64 - 4847 005c 28000000 .4byte .LFE64 - 4848 0060 00000000 .4byte .LFB63 - 4849 0064 28000000 .4byte .LFE63 - 4850 0068 00000000 .4byte .LFB62 - 4851 006c AC000000 .4byte .LFE62 - 4852 0070 00000000 .4byte .LFB67 - 4853 0074 68000000 .4byte .LFE67 - 4854 0078 00000000 .4byte .LFB68 - 4855 007c E4030000 .4byte .LFE68 - 4856 0080 00000000 .4byte 0 - 4857 0084 00000000 .4byte 0 - 4858 .section .debug_line,"",%progbits - 4859 .Ldebug_line0: - 4860 0000 55040000 .section .debug_str,"MS",%progbits,1 - 4860 02009402 - 4860 00000201 - 4860 FB0E0D00 - 4860 01010101 - 4861 .LASF99: - 4862 0000 44494552 .ascii "DIER\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 88 - - - 4862 00 - 4863 .LASF79: - 4864 0005 7264796D .ascii "rdymsg\000" - 4864 736700 - 4865 .LASF15: - 4866 000c 75696E74 .ascii "uint64_t\000" - 4866 36345F74 - 4866 00 - 4867 .LASF191: - 4868 0015 474E5520 .ascii "GNU C 4.6.0\000" - 4868 4320342E - 4868 362E3000 - 4869 .LASF93: - 4870 0021 4F757470 .ascii "OutputQueue\000" - 4870 75745175 - 4870 65756500 - 4871 .LASF130: - 4872 002d 4F545950 .ascii "OTYPER\000" - 4872 455200 - 4873 .LASF143: - 4874 0034 4750545F .ascii "GPT_ONESHOT\000" - 4874 4F4E4553 - 4874 484F5400 - 4875 .LASF76: - 4876 0040 6D625F66 .ascii "mb_fullsem\000" - 4876 756C6C73 - 4876 656D00 - 4877 .LASF138: - 4878 004b 696F706F .ascii "ioportmask_t\000" - 4878 72746D61 - 4878 736B5F74 - 4878 00 - 4879 .LASF126: - 4880 0058 54494D5F .ascii "TIM_TypeDef\000" - 4880 54797065 - 4880 44656600 - 4881 .LASF87: - 4882 0064 715F746F .ascii "q_top\000" - 4882 7000 - 4883 .LASF78: - 4884 006a 4D61696C .ascii "Mailbox\000" - 4884 626F7800 - 4885 .LASF129: - 4886 0072 4D4F4445 .ascii "MODER\000" - 4886 5200 - 4887 .LASF16: - 4888 0078 75696E74 .ascii "uint_fast16_t\000" - 4888 5F666173 - 4888 7431365F - 4888 7400 - 4889 .LASF6: - 4890 0086 6C6F6E67 .ascii "long long unsigned int\000" - 4890 206C6F6E - 4890 6720756E - 4890 7369676E - 4890 65642069 - 4891 .LASF132: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 89 - - - 4892 009d 50555044 .ascii "PUPDR\000" - 4892 5200 - 4893 .LASF80: - 4894 00a3 65786974 .ascii "exitcode\000" - 4894 636F6465 - 4894 00 - 4895 .LASF174: - 4896 00ac 7072696E .ascii "print\000" - 4896 7400 - 4897 .LASF187: - 4898 00b2 73617475 .ascii "saturated\000" - 4898 72617465 - 4898 6400 - 4899 .LASF173: - 4900 00bc 7072696E .ascii "printn\000" - 4900 746E00 - 4901 .LASF185: - 4902 00c3 47505444 .ascii "GPTD2\000" - 4902 3200 - 4903 .LASF186: - 4904 00c9 47505444 .ascii "GPTD3\000" - 4904 3300 - 4905 .LASF152: - 4906 00cf 66726571 .ascii "frequency\000" - 4906 75656E63 - 4906 7900 - 4907 .LASF178: - 4908 00d9 67707432 .ascii "gpt2cb\000" - 4908 636200 - 4909 .LASF29: - 4910 00e0 705F7072 .ascii "p_prio\000" - 4910 696F00 - 4911 .LASF171: - 4912 00e7 72656164 .ascii "readt\000" - 4912 7400 - 4913 .LASF103: - 4914 00ed 43434D52 .ascii "CCMR1\000" - 4914 3100 - 4915 .LASF105: - 4916 00f3 43434D52 .ascii "CCMR2\000" - 4916 3200 - 4917 .LASF5: - 4918 00f9 6C6F6E67 .ascii "long long int\000" - 4918 206C6F6E - 4918 6720696E - 4918 7400 - 4919 .LASF1: - 4920 0107 7369676E .ascii "signed char\000" - 4920 65642063 - 4920 68617200 - 4921 .LASF133: - 4922 0113 42535252 .ascii "BSRR\000" - 4922 00 - 4923 .LASF127: - 4924 0118 47545052 .ascii "GTPR\000" - 4924 00 - 4925 .LASF17: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 90 - - - 4926 011d 626F6F6C .ascii "bool_t\000" - 4926 5F7400 - 4927 .LASF63: - 4928 0124 6D5F7175 .ascii "m_queue\000" - 4928 65756500 - 4929 .LASF142: - 4930 012c 4750545F .ascii "GPT_CONTINUOUS\000" - 4930 434F4E54 - 4930 494E554F - 4930 555300 - 4931 .LASF110: - 4932 013b 52455345 .ascii "RESERVED10\000" - 4932 52564544 - 4932 313000 - 4933 .LASF111: - 4934 0146 52455345 .ascii "RESERVED11\000" - 4934 52564544 - 4934 313100 - 4935 .LASF112: - 4936 0151 52455345 .ascii "RESERVED12\000" - 4936 52564544 - 4936 313200 - 4937 .LASF114: - 4938 015c 52455345 .ascii "RESERVED13\000" - 4938 52564544 - 4938 313300 - 4939 .LASF116: - 4940 0167 52455345 .ascii "RESERVED14\000" - 4940 52564544 - 4940 313400 - 4941 .LASF118: - 4942 0172 52455345 .ascii "RESERVED15\000" - 4942 52564544 - 4942 313500 - 4943 .LASF120: - 4944 017d 52455345 .ascii "RESERVED16\000" - 4944 52564544 - 4944 313600 - 4945 .LASF121: - 4946 0188 52455345 .ascii "RESERVED17\000" - 4946 52564544 - 4946 313700 - 4947 .LASF122: - 4948 0193 52455345 .ascii "RESERVED18\000" - 4948 52564544 - 4948 313800 - 4949 .LASF146: - 4950 019e 73746174 .ascii "state\000" - 4950 6500 - 4951 .LASF7: - 4952 01a4 6C6F6E67 .ascii "long int\000" - 4952 20696E74 - 4952 00 - 4953 .LASF151: - 4954 01ad 67707463 .ascii "gptcnt_t\000" - 4954 6E745F74 - 4954 00 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 91 - - - 4955 .LASF190: - 4956 01b6 67707433 .ascii "gpt3cfg\000" - 4956 63666700 - 4957 .LASF19: - 4958 01be 74737461 .ascii "tstate_t\000" - 4958 74655F74 - 4958 00 - 4959 .LASF36: - 4960 01c7 705F7265 .ascii "p_refs\000" - 4960 667300 - 4961 .LASF86: - 4962 01ce 715F6275 .ascii "q_buffer\000" - 4962 66666572 - 4962 00 - 4963 .LASF88: - 4964 01d7 715F7772 .ascii "q_wrptr\000" - 4964 70747200 - 4965 .LASF37: - 4966 01df 705F7469 .ascii "p_time\000" - 4966 6D6500 - 4967 .LASF31: - 4968 01e6 705F6E65 .ascii "p_newer\000" - 4968 77657200 - 4969 .LASF168: - 4970 01ee 70757477 .ascii "putwouldblock\000" - 4970 6F756C64 - 4970 626C6F63 - 4970 6B00 - 4971 .LASF60: - 4972 01fc 735F7175 .ascii "s_queue\000" - 4972 65756500 - 4973 .LASF149: - 4974 0204 67707463 .ascii "gptcallback_t\000" - 4974 616C6C62 - 4974 61636B5F - 4974 7400 - 4975 .LASF4: - 4976 0212 73686F72 .ascii "short unsigned int\000" - 4976 7420756E - 4976 7369676E - 4976 65642069 - 4976 6E7400 - 4977 .LASF180: - 4978 0225 696E7465 .ascii "interval\000" - 4978 7276616C - 4978 00 - 4979 .LASF131: - 4980 022e 4F535045 .ascii "OSPEEDR\000" - 4980 45445200 - 4981 .LASF54: - 4982 0236 725F6E65 .ascii "r_newer\000" - 4982 77657200 - 4983 .LASF145: - 4984 023e 47505444 .ascii "GPTDriver\000" - 4984 72697665 - 4984 7200 - 4985 .LASF47: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 92 - - - 4986 0248 72656761 .ascii "regarm_t\000" - 4986 726D5F74 - 4986 00 - 4987 .LASF10: - 4988 0251 73697A65 .ascii "size_t\000" - 4988 5F7400 - 4989 .LASF125: - 4990 0258 52455345 .ascii "RESERVED20\000" - 4990 52564544 - 4990 323000 - 4991 .LASF189: - 4992 0263 67707432 .ascii "gpt2cfg\000" - 4992 63666700 - 4993 .LASF70: - 4994 026b 4576656E .ascii "EventSource\000" - 4994 74536F75 - 4994 72636500 - 4995 .LASF144: - 4996 0277 67707473 .ascii "gptstate_t\000" - 4996 74617465 - 4996 5F7400 - 4997 .LASF164: - 4998 0282 75736172 .ascii "usart\000" - 4998 7400 - 4999 .LASF0: - 5000 0288 756E7369 .ascii "unsigned int\000" - 5000 676E6564 - 5000 20696E74 - 5000 00 - 5001 .LASF12: - 5002 0295 75696E74 .ascii "uint16_t\000" - 5002 31365F74 - 5002 00 - 5003 .LASF165: - 5004 029e 53657269 .ascii "SerialDriverVMT\000" - 5004 616C4472 - 5004 69766572 - 5004 564D5400 - 5005 .LASF162: - 5006 02ae 69717565 .ascii "iqueue\000" - 5006 756500 - 5007 .LASF39: - 5008 02b5 705F6D73 .ascii "p_msgqueue\000" - 5008 67717565 - 5008 756500 - 5009 .LASF137: - 5010 02c0 4750494F .ascii "GPIO_TypeDef\000" - 5010 5F547970 - 5010 65446566 - 5010 00 - 5011 .LASF77: - 5012 02cd 6D625F65 .ascii "mb_emptysem\000" - 5012 6D707479 - 5012 73656D00 - 5013 .LASF134: - 5014 02d9 4C434B52 .ascii "LCKR\000" - 5014 00 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 93 - - - 5015 .LASF177: - 5016 02de 67707470 .ascii "gptp\000" - 5016 00 - 5017 .LASF61: - 5018 02e3 735F636E .ascii "s_cnt\000" - 5018 7400 - 5019 .LASF139: - 5020 02e9 4750545F .ascii "GPT_UNINIT\000" - 5020 554E494E - 5020 495400 - 5021 .LASF160: - 5022 02f4 6576656E .ascii "event\000" - 5022 7400 - 5023 .LASF150: - 5024 02fa 67707466 .ascii "gptfreq_t\000" - 5024 7265715F - 5024 7400 - 5025 .LASF44: - 5026 0304 705F6D70 .ascii "p_mpool\000" - 5026 6F6F6C00 - 5027 .LASF22: - 5028 030c 6D73675F .ascii "msg_t\000" - 5028 7400 - 5029 .LASF163: - 5030 0312 6F717565 .ascii "oqueue\000" - 5030 756500 - 5031 .LASF153: - 5032 0319 63616C6C .ascii "callback\000" - 5032 6261636B - 5032 00 - 5033 .LASF128: - 5034 0322 55534152 .ascii "USART_TypeDef\000" - 5034 545F5479 - 5034 70654465 - 5034 6600 - 5035 .LASF170: - 5036 0330 77726974 .ascii "writet\000" - 5036 657400 - 5037 .LASF179: - 5038 0337 74617267 .ascii "target\000" - 5038 657400 - 5039 .LASF46: - 5040 033e 54687265 .ascii "ThreadsList\000" - 5040 6164734C - 5040 69737400 - 5041 .LASF23: - 5042 034a 6576656E .ascii "eventmask_t\000" - 5042 746D6173 - 5042 6B5F7400 - 5043 .LASF92: - 5044 0356 496E7075 .ascii "InputQueue\000" - 5044 74517565 - 5044 756500 - 5045 .LASF91: - 5046 0361 716E6F74 .ascii "qnotify_t\000" - 5046 6966795F - 5046 7400 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 94 - - - 5047 .LASF83: - 5048 036b 47656E65 .ascii "GenericQueue\000" - 5048 72696351 - 5048 75657565 - 5048 00 - 5049 .LASF49: - 5050 0378 73746B61 .ascii "stkalign_t\000" - 5050 6C69676E - 5050 5F7400 - 5051 .LASF166: - 5052 0383 77726974 .ascii "write\000" - 5052 6500 - 5053 .LASF85: - 5054 0389 715F636F .ascii "q_counter\000" - 5054 756E7465 - 5054 7200 - 5055 .LASF75: - 5056 0393 6D625F72 .ascii "mb_rdptr\000" - 5056 64707472 - 5056 00 - 5057 .LASF62: - 5058 039c 4D757465 .ascii "Mutex\000" - 5058 7800 - 5059 .LASF141: - 5060 03a2 4750545F .ascii "GPT_READY\000" - 5060 52454144 - 5060 5900 - 5061 .LASF25: - 5062 03ac 636E745F .ascii "cnt_t\000" - 5062 7400 - 5063 .LASF69: - 5064 03b2 656C5F6D .ascii "el_mask\000" - 5064 61736B00 - 5065 .LASF175: - 5066 03ba 7072696E .ascii "println\000" - 5066 746C6E00 - 5067 .LASF32: - 5068 03c2 705F6F6C .ascii "p_older\000" - 5068 64657200 - 5069 .LASF53: - 5070 03ca 725F6374 .ascii "r_ctx\000" - 5070 7800 - 5071 .LASF45: - 5072 03d0 54687265 .ascii "ThreadsQueue\000" - 5072 61647351 - 5072 75657565 - 5072 00 - 5073 .LASF72: - 5074 03dd 6D625F62 .ascii "mb_buffer\000" - 5074 75666665 - 5074 7200 - 5075 .LASF182: - 5076 03e7 776F7273 .ascii "worst\000" - 5076 7400 - 5077 .LASF192: - 5078 03ed 6D61696E .ascii "main.c\000" - 5078 2E6300 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 95 - - - 5079 .LASF55: - 5080 03f4 725F6F6C .ascii "r_older\000" - 5080 64657200 - 5081 .LASF124: - 5082 03fc 52455345 .ascii "RESERVED19\000" - 5082 52564544 - 5082 313900 - 5083 .LASF136: - 5084 0407 41465248 .ascii "AFRH\000" - 5084 00 - 5085 .LASF135: - 5086 040c 4146524C .ascii "AFRL\000" - 5086 00 - 5087 .LASF84: - 5088 0411 715F7761 .ascii "q_waiting\000" - 5088 6974696E - 5088 6700 - 5089 .LASF20: - 5090 041b 74726566 .ascii "trefs_t\000" - 5090 735F7400 - 5091 .LASF95: - 5092 0423 52455345 .ascii "RESERVED0\000" - 5092 52564544 - 5092 3000 - 5093 .LASF96: - 5094 042d 52455345 .ascii "RESERVED1\000" - 5094 52564544 - 5094 3100 - 5095 .LASF98: - 5096 0437 52455345 .ascii "RESERVED2\000" - 5096 52564544 - 5096 3200 - 5097 .LASF100: - 5098 0441 52455345 .ascii "RESERVED3\000" - 5098 52564544 - 5098 3300 - 5099 .LASF101: - 5100 044b 52455345 .ascii "RESERVED4\000" - 5100 52564544 - 5100 3400 - 5101 .LASF28: - 5102 0455 705F7072 .ascii "p_prev\000" - 5102 657600 - 5103 .LASF104: - 5104 045c 52455345 .ascii "RESERVED6\000" - 5104 52564544 - 5104 3600 - 5105 .LASF108: - 5106 0466 52455345 .ascii "RESERVED8\000" - 5106 52564544 - 5106 3800 - 5107 .LASF21: - 5108 0470 74707269 .ascii "tprio_t\000" - 5108 6F5F7400 - 5109 .LASF89: - 5110 0478 715F7264 .ascii "q_rdptr\000" - 5110 70747200 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 96 - - - 5111 .LASF193: - 5112 0480 443A5C50 .ascii "D:\\Progetti\\ChibiOS-RT\\testhal\\STM32L1xx\\IRQ_S" - 5112 726F6765 - 5112 7474695C - 5112 43686962 - 5112 694F532D - 5113 04ae 544F524D .ascii "TORM\000" - 5113 00 - 5114 .LASF181: - 5115 04b3 74687265 .ascii "threshold\000" - 5115 73686F6C - 5115 6400 - 5116 .LASF56: - 5117 04bd 725F7072 .ascii "r_preempt\000" - 5117 65656D70 - 5117 7400 - 5118 .LASF13: - 5119 04c7 696E7433 .ascii "int32_t\000" - 5119 325F7400 - 5120 .LASF2: - 5121 04cf 756E7369 .ascii "unsigned char\000" - 5121 676E6564 - 5121 20636861 - 5121 7200 - 5122 .LASF73: - 5123 04dd 6D625F74 .ascii "mb_top\000" - 5123 6F7000 - 5124 .LASF68: - 5125 04e4 656C5F6C .ascii "el_listener\000" - 5125 69737465 - 5125 6E657200 - 5126 .LASF184: - 5127 04f0 49544D5F .ascii "ITM_RxBuffer\000" - 5127 52784275 - 5127 66666572 - 5127 00 - 5128 .LASF34: - 5129 04fd 705F7374 .ascii "p_state\000" - 5129 61746500 - 5130 .LASF42: - 5131 0505 705F6D74 .ascii "p_mtxlist\000" - 5131 786C6973 - 5131 7400 - 5132 .LASF3: - 5133 050f 73686F72 .ascii "short int\000" - 5133 7420696E - 5133 7400 - 5134 .LASF52: - 5135 0519 725F7072 .ascii "r_prio\000" - 5135 696F00 - 5136 .LASF82: - 5137 0520 65776D61 .ascii "ewmask\000" - 5137 736B00 - 5138 .LASF27: - 5139 0527 705F6E65 .ascii "p_next\000" - 5139 787400 - 5140 .LASF35: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 97 - - - 5141 052e 705F666C .ascii "p_flags\000" - 5141 61677300 - 5142 .LASF67: - 5143 0536 656C5F6E .ascii "el_next\000" - 5143 65787400 - 5144 .LASF156: - 5145 053e 53445F53 .ascii "SD_STOP\000" - 5145 544F5000 - 5146 .LASF26: - 5147 0546 54687265 .ascii "Thread\000" - 5147 616400 - 5148 .LASF41: - 5149 054d 705F6570 .ascii "p_epending\000" - 5149 656E6469 - 5149 6E6700 - 5150 .LASF155: - 5151 0558 53445F55 .ascii "SD_UNINIT\000" - 5151 4E494E49 - 5151 5400 - 5152 .LASF102: - 5153 0562 52455345 .ascii "RESERVED5\000" - 5153 52564544 - 5153 3500 - 5154 .LASF140: - 5155 056c 4750545F .ascii "GPT_STOP\000" - 5155 53544F50 - 5155 00 - 5156 .LASF14: - 5157 0575 75696E74 .ascii "uint32_t\000" - 5157 33325F74 - 5157 00 - 5158 .LASF106: - 5159 057e 52455345 .ascii "RESERVED7\000" - 5159 52564544 - 5159 3700 - 5160 .LASF51: - 5161 0588 725F7175 .ascii "r_queue\000" - 5161 65756500 - 5162 .LASF158: - 5163 0590 73647374 .ascii "sdstate_t\000" - 5163 6174655F - 5163 7400 - 5164 .LASF109: - 5165 059a 52455345 .ascii "RESERVED9\000" - 5165 52564544 - 5165 3900 - 5166 .LASF159: - 5167 05a4 53657269 .ascii "SerialDriver\000" - 5167 616C4472 - 5167 69766572 - 5167 00 - 5168 .LASF8: - 5169 05b1 6C6F6E67 .ascii "long unsigned int\000" - 5169 20756E73 - 5169 69676E65 - 5169 6420696E - 5169 7400 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 98 - - - 5170 .LASF57: - 5171 05c3 725F6375 .ascii "r_current\000" - 5171 7272656E - 5171 7400 - 5172 .LASF167: - 5173 05cd 72656164 .ascii "read\000" - 5173 00 - 5174 .LASF9: - 5175 05d2 63686172 .ascii "char\000" - 5175 00 - 5176 .LASF97: - 5177 05d7 534D4352 .ascii "SMCR\000" - 5177 00 - 5178 .LASF147: - 5179 05dc 636F6E66 .ascii "config\000" - 5179 696700 - 5180 .LASF40: - 5181 05e3 705F6D73 .ascii "p_msg\000" - 5181 6700 - 5182 .LASF123: - 5183 05e9 444D4152 .ascii "DMAR\000" - 5183 00 - 5184 .LASF194: - 5185 05ee 576F726B .ascii "WorkerThread\000" - 5185 65725468 - 5185 72656164 - 5185 00 - 5186 .LASF188: - 5187 05fb 7761576F .ascii "waWorkerThread\000" - 5187 726B6572 - 5187 54687265 - 5187 616400 - 5188 .LASF107: - 5189 060a 43434552 .ascii "CCER\000" - 5189 00 - 5190 .LASF65: - 5191 060f 6D5F6E65 .ascii "m_next\000" - 5191 787400 - 5192 .LASF24: - 5193 0616 73797374 .ascii "systime_t\000" - 5193 696D655F - 5193 7400 - 5194 .LASF43: - 5195 0620 705F7265 .ascii "p_realprio\000" - 5195 616C7072 - 5195 696F00 - 5196 .LASF33: - 5197 062b 705F6E61 .ascii "p_name\000" - 5197 6D6500 - 5198 .LASF154: - 5199 0632 47505443 .ascii "GPTConfig\000" - 5199 6F6E6669 - 5199 6700 - 5200 .LASF172: - 5201 063c 67657466 .ascii "getflags\000" - 5201 6C616773 - 5201 00 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 99 - - - 5202 .LASF50: - 5203 0645 636F6E74 .ascii "context\000" - 5203 65787400 - 5204 .LASF94: - 5205 064d 696F666C .ascii "ioflags_t\000" - 5205 6167735F - 5205 7400 - 5206 .LASF48: - 5207 0657 696E7463 .ascii "intctx\000" - 5207 747800 - 5208 .LASF157: - 5209 065e 53445F52 .ascii "SD_READY\000" - 5209 45414459 - 5209 00 - 5210 .LASF59: - 5211 0667 53656D61 .ascii "Semaphore\000" - 5211 70686F72 - 5211 6500 - 5212 .LASF113: - 5213 0671 43435231 .ascii "CCR1\000" - 5213 00 - 5214 .LASF115: - 5215 0676 43435232 .ascii "CCR2\000" - 5215 00 - 5216 .LASF117: - 5217 067b 43435233 .ascii "CCR3\000" - 5217 00 - 5218 .LASF119: - 5219 0680 43435234 .ascii "CCR4\000" - 5219 00 - 5220 .LASF71: - 5221 0685 65735F6E .ascii "es_next\000" - 5221 65787400 - 5222 .LASF58: - 5223 068d 52656164 .ascii "ReadyList\000" - 5223 794C6973 - 5223 7400 - 5224 .LASF90: - 5225 0697 715F6E6F .ascii "q_notify\000" - 5225 74696679 - 5225 00 - 5226 .LASF183: - 5227 06a0 726C6973 .ascii "rlist\000" - 5227 7400 - 5228 .LASF11: - 5229 06a6 75696E74 .ascii "uint8_t\000" - 5229 385F7400 - 5230 .LASF161: - 5231 06ae 666C6167 .ascii "flags\000" - 5231 7300 - 5232 .LASF66: - 5233 06b4 4576656E .ascii "EventListener\000" - 5233 744C6973 - 5233 74656E65 - 5233 7200 - 5234 .LASF81: - 5235 06c2 77746F62 .ascii "wtobjp\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 100 - - - 5235 6A7000 - 5236 .LASF18: - 5237 06c9 746D6F64 .ascii "tmode_t\000" - 5237 655F7400 - 5238 .LASF176: - 5239 06d1 67707433 .ascii "gpt3cb\000" - 5239 636200 - 5240 .LASF148: - 5241 06d8 636C6F63 .ascii "clock\000" - 5241 6B00 - 5242 .LASF169: - 5243 06de 67657477 .ascii "getwouldblock\000" - 5243 6F756C64 - 5243 626C6F63 - 5243 6B00 - 5244 .LASF195: - 5245 06ec 6D61696E .ascii "main\000" - 5245 00 - 5246 .LASF74: - 5247 06f1 6D625F77 .ascii "mb_wrptr\000" - 5247 72707472 - 5247 00 - 5248 .LASF64: - 5249 06fa 6D5F6F77 .ascii "m_owner\000" - 5249 6E657200 - 5250 .LASF30: - 5251 0702 705F6374 .ascii "p_ctx\000" - 5251 7800 - 5252 .LASF38: - 5253 0708 705F7761 .ascii "p_waiting\000" - 5253 6974696E - 5253 6700 - 5254 .ident "GCC: (GNU) 4.6.0" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 101 - - -DEFINED SYMBOLS - *ABS*:00000000 main.c -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:18 .text.println:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:23 .text.println:00000000 println -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:69 .text.println:00000030 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:75 .text.gpt3cb:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:80 .text.gpt3cb:00000000 gpt3cb -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:130 .text.gpt3cb:00000020 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:136 .text.gpt2cb:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:141 .text.gpt2cb:00000000 gpt2cb -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:191 .text.gpt2cb:00000020 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:197 .text.WorkerThread:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:202 .text.WorkerThread:00000000 WorkerThread -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1087 .bss.saturated:00000000 .LANCHOR1 -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:318 .text.WorkerThread:00000098 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:327 .text.printn:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:332 .text.printn:00000000 printn -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:422 .text.printn:00000064 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:429 .text.startup.main:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:435 .text.startup.main:00000000 main -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:854 .text.startup.main:00000250 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:890 .text.startup.main:000002cc $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1059 .text.startup.main:000003c4 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1071 .rodata.gpt2cfg:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1075 .rodata.gpt2cfg:00000000 gpt2cfg -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1079 .bss.waWorkerThread:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1083 .bss.waWorkerThread:00000000 waWorkerThread -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1086 .bss.saturated:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1090 .bss.saturated:00000000 saturated -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1093 .rodata.gpt3cfg:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1097 .rodata.gpt3cfg:00000000 gpt3cfg -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1101 .rodata.str1.4:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1178 .bss.mb:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1182 .bss.mb:00000000 mb -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1185 .bss.b:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1189 .bss.b:00000000 b -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1192 .bss.x.3441:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1196 .bss.x.3441:00000000 x.3441 -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1199 .bss.cnt.3442:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1203 .bss.cnt.3442:00000000 cnt.3442 - .debug_frame:00000010 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:74 .text.println:00000038 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:135 .text.gpt3cb:00000028 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:196 .text.gpt2cb:00000028 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:326 .text.WorkerThread:000000ac $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:428 .text.printn:00000068 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1070 .text.startup.main:000003e4 $t - -UNDEFINED SYMBOLS -SD1 -chMBPostI -chMBFetch -chMBPost -rlist -halInit -chSysInit -sdStart - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 102 - - -_pal_lld_setgroupmode -gptStart -chMBInit -chThdCreateStatic -GPTD2 -GPTD3 -gptStartContinuous -chThdSleep -gptStopTimer -- cgit v1.2.3 From f5c7e2f7cd4e43f272db4e9f053053eea9f92dde Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 14:01:42 +0000 Subject: Fixed an STM32 GPT driver problem. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3353 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 4fadc4f9c..380d9650c 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -29,7 +29,7 @@ static void gpt2cb(GPTDriver *gptp) { (void)gptp; palSetPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); - gptStartOneShotI(&GPTD3, 200); /* 0.02 second pulse.*/ + gptStartOneShotI(&GPTD3, 1000); /* 0.02 second pulse.*/ chSysUnlockFromIsr(); } -- cgit v1.2.3 From f90273557f060f07b87c1c9e3765f74491910533 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 20 Sep 2011 19:44:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3373 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/EXT/Makefile | 202 +++++++++++++++ testhal/STM32L1xx/EXT/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/EXT/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/EXT/main.c | 108 ++++++++ testhal/STM32L1xx/EXT/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/EXT/readme.txt | 30 +++ 6 files changed, 1388 insertions(+) create mode 100644 testhal/STM32L1xx/EXT/Makefile create mode 100644 testhal/STM32L1xx/EXT/chconf.h create mode 100644 testhal/STM32L1xx/EXT/halconf.h create mode 100644 testhal/STM32L1xx/EXT/main.c create mode 100644 testhal/STM32L1xx/EXT/mcuconf.h create mode 100644 testhal/STM32L1xx/EXT/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/EXT/Makefile b/testhal/STM32L1xx/EXT/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/EXT/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h new file mode 100644 index 000000000..d7df1593a --- /dev/null +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c new file mode 100644 index 000000000..7bf0cb54e --- /dev/null +++ b/testhal/STM32L1xx/EXT/main.c @@ -0,0 +1,108 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led4off(void *arg) { + + (void)arg; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* Triggered when the button is pressed or released. The LED4 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led4off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + }, + EXT_MODE_EXTI(EXT_MODE_GPIOA, /* Button.*/ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + EXTI->SWIER = 64; + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + EXTI->SWIER = 64; + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h new file mode 100644 index 000000000..d214c9d12 --- /dev/null +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/EXT/readme.txt b/testhal/STM32L1xx/EXT/readme.txt new file mode 100644 index 000000000..b0d1883e9 --- /dev/null +++ b/testhal/STM32L1xx/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From ae42ff1857ee56d67feca50d379c5f4b66d7fe69 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 21 Sep 2011 17:10:15 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3377 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/Makefile | 202 +++++++++++++++ testhal/STM32L1xx/ADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/ADC/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/ADC/main.c | 124 +++++++++ testhal/STM32L1xx/ADC/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/ADC/readme.txt | 30 +++ 6 files changed, 1404 insertions(+) create mode 100644 testhal/STM32L1xx/ADC/Makefile create mode 100644 testhal/STM32L1xx/ADC/chconf.h create mode 100644 testhal/STM32L1xx/ADC/halconf.h create mode 100644 testhal/STM32L1xx/ADC/main.c create mode 100644 testhal/STM32L1xx/ADC/mcuconf.h create mode 100644 testhal/STM32L1xx/ADC/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/Makefile b/testhal/STM32L1xx/ADC/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/ADC/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h new file mode 100644 index 000000000..62cc1e67d --- /dev/null +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c new file mode 100644 index 000000000..48616f7d8 --- /dev/null +++ b/testhal/STM32L1xx/ADC/main.c @@ -0,0 +1,124 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +/* + * ADC conversion group. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + adccallback, + 0, 0, /* CR1, CR2 */ + 0, 0, 0, /* SMPR1...SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, 0, /* SQR2, SQR3 */ + ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOB, GPIOB_LED4); + chThdSleepMilliseconds(500); + palSetPad(GPIOB, GPIOB_LED4); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Starts an ADC continuous conversion. + */ + adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + adcSTM32DisableTSVREFE(); + } + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h new file mode 100644 index 000000000..d214c9d12 --- /dev/null +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt new file mode 100644 index 000000000..adceab611 --- /dev/null +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx ADC driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 4a3e3fc01ec6dfb4a710db771bee262d5dc9327e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Sep 2011 14:53:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3381 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 48616f7d8..82ac4c4d8 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -41,6 +41,12 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { } } +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + /* * ADC conversion group. * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. @@ -50,6 +56,7 @@ static const ADCConversionGroup adcgrpcfg = { TRUE, ADC_GRP1_NUM_CHANNELS, adccallback, + adcerrorcallback, 0, 0, /* CR1, CR2 */ 0, 0, 0, /* SMPR1...SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), -- cgit v1.2.3 From d2721c36a6d74fd18de7e4de95fdd166083e343e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Sep 2011 17:22:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3383 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/.cproject | 210 +++++++++++++++++++++++++++++++++ testhal/STM32L1xx/ADC/.project | 85 ++++++++++++++ testhal/STM32L1xx/EXT/.cproject | 211 ++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/EXT/.project | 85 ++++++++++++++ testhal/STM32L1xx/GPT/.cproject | 210 +++++++++++++++++++++++++++++++++ testhal/STM32L1xx/GPT/.project | 85 ++++++++++++++ testhal/STM32L1xx/IRQ_STORM/.cproject | 210 +++++++++++++++++++++++++++++++++ testhal/STM32L1xx/IRQ_STORM/.project | 85 ++++++++++++++ testhal/STM32L1xx/PWM-ICU/.cproject | 210 +++++++++++++++++++++++++++++++++ testhal/STM32L1xx/PWM-ICU/.project | 85 ++++++++++++++ testhal/STM32L1xx/SPI/.cproject | 210 +++++++++++++++++++++++++++++++++ testhal/STM32L1xx/SPI/.project | 85 ++++++++++++++ testhal/STM32L1xx/UART/.cproject | 210 +++++++++++++++++++++++++++++++++ testhal/STM32L1xx/UART/.project | 85 ++++++++++++++ 14 files changed, 2066 insertions(+) create mode 100644 testhal/STM32L1xx/ADC/.cproject create mode 100644 testhal/STM32L1xx/ADC/.project create mode 100644 testhal/STM32L1xx/EXT/.cproject create mode 100644 testhal/STM32L1xx/EXT/.project create mode 100644 testhal/STM32L1xx/GPT/.cproject create mode 100644 testhal/STM32L1xx/GPT/.project create mode 100644 testhal/STM32L1xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32L1xx/IRQ_STORM/.project create mode 100644 testhal/STM32L1xx/PWM-ICU/.cproject create mode 100644 testhal/STM32L1xx/PWM-ICU/.project create mode 100644 testhal/STM32L1xx/SPI/.cproject create mode 100644 testhal/STM32L1xx/SPI/.project create mode 100644 testhal/STM32L1xx/UART/.cproject create mode 100644 testhal/STM32L1xx/UART/.project (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/.cproject b/testhal/STM32L1xx/ADC/.cproject new file mode 100644 index 000000000..46dec9738 --- /dev/null +++ b/testhal/STM32L1xx/ADC/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/ADC/.project b/testhal/STM32L1xx/ADC/.project new file mode 100644 index 000000000..93c7da8ef --- /dev/null +++ b/testhal/STM32L1xx/ADC/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/EXT/.cproject b/testhal/STM32L1xx/EXT/.cproject new file mode 100644 index 000000000..8fc88e937 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.cproject @@ -0,0 +1,211 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/EXT/.project b/testhal/STM32L1xx/EXT/.project new file mode 100644 index 000000000..9153ff4a2 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + mingw32-make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/GPT/.cproject b/testhal/STM32L1xx/GPT/.cproject new file mode 100644 index 000000000..b86a1ca62 --- /dev/null +++ b/testhal/STM32L1xx/GPT/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/GPT/.project b/testhal/STM32L1xx/GPT/.project new file mode 100644 index 000000000..a0bea0071 --- /dev/null +++ b/testhal/STM32L1xx/GPT/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-GPT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/IRQ_STORM/.cproject b/testhal/STM32L1xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..fd11cb653 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/IRQ_STORM/.project b/testhal/STM32L1xx/IRQ_STORM/.project new file mode 100644 index 000000000..bbb5a4a93 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.cproject b/testhal/STM32L1xx/PWM-ICU/.cproject new file mode 100644 index 000000000..075107e60 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.project b/testhal/STM32L1xx/PWM-ICU/.project new file mode 100644 index 000000000..6a4599f39 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/SPI/.cproject b/testhal/STM32L1xx/SPI/.cproject new file mode 100644 index 000000000..85ae1ed2f --- /dev/null +++ b/testhal/STM32L1xx/SPI/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/SPI/.project b/testhal/STM32L1xx/SPI/.project new file mode 100644 index 000000000..bcd828174 --- /dev/null +++ b/testhal/STM32L1xx/SPI/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/UART/.cproject b/testhal/STM32L1xx/UART/.cproject new file mode 100644 index 000000000..68e20f694 --- /dev/null +++ b/testhal/STM32L1xx/UART/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/UART/.project b/testhal/STM32L1xx/UART/.project new file mode 100644 index 000000000..ad5b96f16 --- /dev/null +++ b/testhal/STM32L1xx/UART/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + -- cgit v1.2.3 From c39d08fc2ae9c43f73114e24292520306bddde19 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 23 Sep 2011 15:48:55 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3384 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/readme.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt index adceab611..157c3b93e 100644 --- a/testhal/STM32L1xx/ADC/readme.txt +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -12,7 +12,8 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Board Setup ** -None required. +- Remove the LCD module. +- Connect PC0 to 3.3V and PC1 to GND for analog measurements. ** Build Procedure ** -- cgit v1.2.3 From a24fe0108e2f7e05db454048ccf3ae9262109bb4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 23 Sep 2011 18:18:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3385 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 12 ++++++------ testhal/STM32L1xx/ADC/main.c | 2 -- 2 files changed, 6 insertions(+), 8 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index a5d129956..9dd831c96 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#define CH_DBG_SYSTEM_STATE_CHECK FALSE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE +#define CH_DBG_ENABLE_CHECKS FALSE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE +#define CH_DBG_ENABLE_ASSERTS FALSE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE +#define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE +#define CH_DBG_FILL_THREADS FALSE #endif /** diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 82ac4c4d8..c7c7622a8 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -81,7 +81,6 @@ static msg_t Thread1(void *arg) { palSetPad(GPIOB, GPIOB_LED4); chThdSleepMilliseconds(500); } - return 0; } /* @@ -127,5 +126,4 @@ int main(void) { } chThdSleepMilliseconds(500); } - return 0; } -- cgit v1.2.3 From 09d93604e7d02274f433d0854f9bfdfcab53cc9f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 23 Sep 2011 20:38:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3386 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index c7c7622a8..706ec690e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -78,7 +78,7 @@ static msg_t Thread1(void *arg) { while (TRUE) { palSetPad(GPIOB, GPIOB_LED4); chThdSleepMilliseconds(500); - palSetPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOB, GPIOB_LED4); chThdSleepMilliseconds(500); } } -- cgit v1.2.3 From 76d35140c961634760955219d0dc1406dee58a12 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 07:11:11 +0000 Subject: IAR startup updated to export symbol __main_thread_stack_base__. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3388 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** -- cgit v1.2.3 From 859c2c759973f52bfacbd33a7cc56d12a1eab581 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 07:39:20 +0000 Subject: Modified STM32L HAL test applications to run always in full debug mode. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3392 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/chconf.h | 12 ++++++------ testhal/STM32L1xx/IRQ_STORM/chconf.h | 12 ++++++------ testhal/STM32L1xx/PWM-ICU/chconf.h | 12 ++++++------ testhal/STM32L1xx/UART/chconf.h | 12 ++++++------ 4 files changed, 24 insertions(+), 24 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** -- cgit v1.2.3 From a91a8ffdbf5679a2afdf37944483488e7fef4ad3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 07:45:22 +0000 Subject: Removed ADC DMA error hook macro from the various mcuconf.h, it is no more required. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3393 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 1 - testhal/STM32L1xx/EXT/mcuconf.h | 1 - testhal/STM32L1xx/GPT/mcuconf.h | 1 - testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 1 - testhal/STM32L1xx/PWM-ICU/mcuconf.h | 1 - testhal/STM32L1xx/SPI/mcuconf.h | 1 - testhal/STM32L1xx/UART/mcuconf.h | 1 - 7 files changed, 7 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index d214c9d12..3702fa62f 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index d214c9d12..3702fa62f 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index d214c9d12..3702fa62f 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 5839ef86a..2562d6b67 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index ac551ee4f..4f9182094 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index a87325ff7..4071c4507 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index a210c468b..33119bd78 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. -- cgit v1.2.3 From 8976b7b89888c036744db65a70fa167748bd38ae Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 08:16:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3394 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/IRQ_STORM/chconf.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index a5d129956..9dd831c96 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#define CH_DBG_SYSTEM_STATE_CHECK FALSE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE +#define CH_DBG_ENABLE_CHECKS FALSE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE +#define CH_DBG_ENABLE_ASSERTS FALSE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE +#define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE +#define CH_DBG_FILL_THREADS FALSE #endif /** -- cgit v1.2.3 From a6310af1976c528e7eae1c757cff6e4d14aa37a1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 05:41:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3400 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 38 ++++++++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 706ec690e..75729108e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -49,10 +49,30 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. */ -static const ADCConversionGroup adcgrpcfg = { +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, 0, /* CR1, CR2 */ + 0, 0, 0, /* SMPR1...SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, 0, /* SQR2, SQR3 */ + ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP1_NUM_CHANNELS, adccallback, @@ -110,11 +130,21 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Starts an ADC continuous conversion. + * Activates the ADC1 driver and the thermal sensor. */ adcStart(&ADCD1, NULL); adcSTM32EnableTSVREFE(); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples, ADC_GRP1_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. -- cgit v1.2.3 From 4c37f7b08813f3c0b805c605780938d7d2ef8ae6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 05:55:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3401 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 36 +++++++++++++++++++++--------------- 1 file changed, 21 insertions(+), 15 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 75729108e..9f740a49c 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -21,10 +21,14 @@ #include "ch.h" #include "hal.h" -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 +#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_BUF_DEPTH 8 -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; /* * ADC streaming callback. @@ -33,7 +37,7 @@ size_t nx = 0, ny = 0; static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { (void)adcp; - if (samples == buffer) { + if (samples2 == buffer) { nx += n; } else { @@ -58,13 +62,12 @@ static const ADCConversionGroup adcgrpcfg1 = { NULL, adcerrorcallback, 0, 0, /* CR1, CR2 */ - 0, 0, 0, /* SMPR1...SMPR3 */ + 0, /* SMPR1 */ + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_9), + 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, 0, /* SQR2, SQR3 */ - ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) + 0, 0, 0, /* SQR2, SQR3, SQR4 */ + ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) }; /* @@ -74,12 +77,15 @@ static const ADCConversionGroup adcgrpcfg1 = { */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, - ADC_GRP1_NUM_CHANNELS, + ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, 0, 0, /* CR1, CR2 */ - 0, 0, 0, /* SMPR1...SMPR3 */ - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, /* SMPR1 */ + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | + ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), + 0, /* SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), 0, 0, /* SQR2, SQR3 */ ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | @@ -138,13 +144,13 @@ int main(void) { /* * Linear conversion. */ - adcConvert(&ADCD1, &adcgrpcfg1, samples, ADC_GRP1_BUF_DEPTH); + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); chThdSleepMilliseconds(1000); /* * Starts an ADC continuous conversion. */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples, ADC_GRP1_BUF_DEPTH); + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. -- cgit v1.2.3 From 81d6a0d4b67af3260dc5367314510187781640f2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 06:20:11 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3402 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 9f740a49c..b9890100e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -63,7 +63,7 @@ static const ADCConversionGroup adcgrpcfg1 = { adcerrorcallback, 0, 0, /* CR1, CR2 */ 0, /* SMPR1 */ - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_9), + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4), 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), 0, 0, 0, /* SQR2, SQR3, SQR4 */ -- cgit v1.2.3 From 8ce9365e009b1f1555bcd4901118ebf8de2eaa3d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 15:31:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3411 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/.cproject | 210 --------------------------------- testhal/STM32L1xx/ADC/.project | 85 -------------- testhal/STM32L1xx/EXT/.cproject | 211 ---------------------------------- testhal/STM32L1xx/EXT/.project | 85 -------------- testhal/STM32L1xx/GPT/.cproject | 210 --------------------------------- testhal/STM32L1xx/GPT/.project | 85 -------------- testhal/STM32L1xx/IRQ_STORM/.cproject | 210 --------------------------------- testhal/STM32L1xx/IRQ_STORM/.project | 85 -------------- testhal/STM32L1xx/PWM-ICU/.cproject | 210 --------------------------------- testhal/STM32L1xx/PWM-ICU/.project | 85 -------------- testhal/STM32L1xx/SPI/.cproject | 210 --------------------------------- testhal/STM32L1xx/SPI/.project | 85 -------------- testhal/STM32L1xx/UART/.cproject | 210 --------------------------------- testhal/STM32L1xx/UART/.project | 85 -------------- 14 files changed, 2066 deletions(-) delete mode 100644 testhal/STM32L1xx/ADC/.cproject delete mode 100644 testhal/STM32L1xx/ADC/.project delete mode 100644 testhal/STM32L1xx/EXT/.cproject delete mode 100644 testhal/STM32L1xx/EXT/.project delete mode 100644 testhal/STM32L1xx/GPT/.cproject delete mode 100644 testhal/STM32L1xx/GPT/.project delete mode 100644 testhal/STM32L1xx/IRQ_STORM/.cproject delete mode 100644 testhal/STM32L1xx/IRQ_STORM/.project delete mode 100644 testhal/STM32L1xx/PWM-ICU/.cproject delete mode 100644 testhal/STM32L1xx/PWM-ICU/.project delete mode 100644 testhal/STM32L1xx/SPI/.cproject delete mode 100644 testhal/STM32L1xx/SPI/.project delete mode 100644 testhal/STM32L1xx/UART/.cproject delete mode 100644 testhal/STM32L1xx/UART/.project (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/.cproject b/testhal/STM32L1xx/ADC/.cproject deleted file mode 100644 index 46dec9738..000000000 --- a/testhal/STM32L1xx/ADC/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/ADC/.project b/testhal/STM32L1xx/ADC/.project deleted file mode 100644 index 93c7da8ef..000000000 --- a/testhal/STM32L1xx/ADC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-ADC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/EXT/.cproject b/testhal/STM32L1xx/EXT/.cproject deleted file mode 100644 index 8fc88e937..000000000 --- a/testhal/STM32L1xx/EXT/.cproject +++ /dev/null @@ -1,211 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/EXT/.project b/testhal/STM32L1xx/EXT/.project deleted file mode 100644 index 9153ff4a2..000000000 --- a/testhal/STM32L1xx/EXT/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-EXT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - mingw32-make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - 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b/testhal/STM32L1xx/GPT/.project deleted file mode 100644 index a0bea0071..000000000 --- a/testhal/STM32L1xx/GPT/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-GPT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - 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deleted file mode 100644 index bbb5a4a93..000000000 --- a/testhal/STM32L1xx/IRQ_STORM/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-IRQ_STORM - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - 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file mode 100644 index 6a4599f39..000000000 --- a/testhal/STM32L1xx/PWM-ICU/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-PWM-ICU - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/SPI/.cproject b/testhal/STM32L1xx/SPI/.cproject deleted file mode 100644 index 85ae1ed2f..000000000 --- a/testhal/STM32L1xx/SPI/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/SPI/.project b/testhal/STM32L1xx/SPI/.project deleted file mode 100644 index bcd828174..000000000 --- a/testhal/STM32L1xx/SPI/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-SPI - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/UART/.cproject b/testhal/STM32L1xx/UART/.cproject deleted file mode 100644 index 68e20f694..000000000 --- a/testhal/STM32L1xx/UART/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/UART/.project b/testhal/STM32L1xx/UART/.project deleted file mode 100644 index ad5b96f16..000000000 --- a/testhal/STM32L1xx/UART/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-UART - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - -- cgit v1.2.3 From 538f257a6710eebea358e12845ae241437d70031 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Oct 2011 09:22:34 +0000 Subject: New build system for GCC ARM ports. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3428 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/Makefile | 6 +++--- testhal/STM32L1xx/EXT/Makefile | 6 +++--- testhal/STM32L1xx/GPT/Makefile | 6 +++--- testhal/STM32L1xx/IRQ_STORM/Makefile | 6 +++--- testhal/STM32L1xx/PWM-ICU/Makefile | 6 +++--- testhal/STM32L1xx/SPI/Makefile | 6 +++--- testhal/STM32L1xx/UART/Makefile | 6 +++--- 7 files changed, 21 insertions(+), 21 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/Makefile b/testhal/STM32L1xx/ADC/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/ADC/Makefile +++ b/testhal/STM32L1xx/ADC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/EXT/Makefile b/testhal/STM32L1xx/EXT/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/EXT/Makefile +++ b/testhal/STM32L1xx/EXT/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/IRQ_STORM/Makefile +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/UART/Makefile +++ b/testhal/STM32L1xx/UART/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # -- cgit v1.2.3 From eea23b22826e76dba443a12c651d5490a0314471 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Oct 2011 16:56:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3439 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/halconf.h | 7 +++++++ testhal/STM32L1xx/EXT/halconf.h | 7 +++++++ testhal/STM32L1xx/GPT/halconf.h | 7 +++++++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32L1xx/SPI/halconf.h | 7 +++++++ testhal/STM32L1xx/UART/halconf.h | 7 +++++++ 7 files changed, 49 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 62cc1e67d..b1de4bf39 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index d7df1593a..775428e22 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index ff9202a66..3be209376 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index f5e7cc1ed..f9a1b78f6 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index e5eeb8b7a..5d3985cdd 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index a825e65c5..b3bbd85fd 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 2dd31e012..8a458d702 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ -- cgit v1.2.3 From a8feb8613bd20eea8031ae6c8a62ac67ec750a02 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 2 Nov 2011 20:39:26 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3461 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/Makefile | 5 +++++ testhal/STM32L1xx/EXT/Makefile | 5 +++++ testhal/STM32L1xx/GPT/Makefile | 5 +++++ testhal/STM32L1xx/IRQ_STORM/Makefile | 5 +++++ testhal/STM32L1xx/PWM-ICU/Makefile | 5 +++++ testhal/STM32L1xx/SPI/Makefile | 5 +++++ testhal/STM32L1xx/UART/Makefile | 5 +++++ 7 files changed, 35 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/Makefile b/testhal/STM32L1xx/ADC/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/ADC/Makefile +++ b/testhal/STM32L1xx/ADC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/EXT/Makefile b/testhal/STM32L1xx/EXT/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/EXT/Makefile +++ b/testhal/STM32L1xx/EXT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/IRQ_STORM/Makefile +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/UART/Makefile +++ b/testhal/STM32L1xx/UART/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti -- cgit v1.2.3 From 97d1a377042e1847cb45adeafac98fedf97ccefe Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 10 Nov 2011 20:27:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3484 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 2 ++ testhal/STM32L1xx/EXT/mcuconf.h | 2 ++ testhal/STM32L1xx/GPT/mcuconf.h | 2 ++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32L1xx/SPI/mcuconf.h | 2 ++ testhal/STM32L1xx/UART/mcuconf.h | 2 ++ 7 files changed, 14 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 3702fa62f..b2ad1faca 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 3702fa62f..b2ad1faca 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 3702fa62f..b2ad1faca 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 2562d6b67..4458168c1 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 4f9182094..433013b38 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 4071c4507..116f26170 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 33119bd78..d1b9069be 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. -- cgit v1.2.3 From d4187a3454cbfb1735d286d4acf23b062b1febdf Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 15 Nov 2011 19:06:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3494 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 2 +- testhal/STM32L1xx/IRQ_STORM/main.c | 12 +++++++++--- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/readme.txt | 6 +++--- 4 files changed, 14 insertions(+), 8 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 380d9650c..d63743628 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -29,7 +29,7 @@ static void gpt2cb(GPTDriver *gptp) { (void)gptp; palSetPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); - gptStartOneShotI(&GPTD3, 1000); /* 0.02 second pulse.*/ + gptStartOneShotI(&GPTD3, 1000); /* 0.1 second pulse.*/ chSysUnlockFromIsr(); } diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index d3c7a6521..f8e7b7bc5 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -239,9 +239,11 @@ int main(void) { println("***"); print("*** Kernel: "); println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); #endif print("*** Architecture: "); println(CH_ARCHITECTURE_NAME); @@ -249,6 +251,10 @@ int main(void) { print("*** Core Variant: "); println(CH_CORE_VARIANT_NAME); #endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif #ifdef PLATFORM_NAME print("*** Platform: "); println(PLATFORM_NAME); diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 4458168c1..b4e3ea258 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index f55cf8471..19af96363 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -8,12 +8,12 @@ The demo will on an STMicroelectronics STM32L-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32L1xx PWM-ICU drivers. +The application demonstrates the use of the STM32L1xx GPT, PAL and Serial +drivers in order to implement a system stress demo. ** Board Setup ** -- Remove the LCD module. -- Connect PA15 and PC6 together. +None. ** Build Procedure ** -- cgit v1.2.3 From 759a95a23a2e41651f46d25dfdface09525760d1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 16 Nov 2011 18:58:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3501 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index b9890100e..c13ebfe2a 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -53,8 +53,8 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. + * Channels: IN10. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -82,8 +82,8 @@ static const ADCConversionGroup adcgrpcfg2 = { adcerrorcallback, 0, 0, /* CR1, CR2 */ 0, /* SMPR1 */ - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | - ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), + ADC_SMPR2_SMP_AN11(ADC_SAMPLE_48) | ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | + ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), 0, 0, /* SQR2, SQR3 */ -- cgit v1.2.3 From 4286b14a9e6d82823c8e5c759495575b1b7fa5ef Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 23 Nov 2011 19:58:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3520 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/UART/main.c | 3 +-- testhal/STM32L1xx/UART/readme.txt | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 30f4c3326..ce1804f2e 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -125,8 +125,7 @@ int main(void) { chSysInit(); /* - * Activates the serial driver 2 using the driver default configuration. - * PA9 and PA10 are routed to USART1. + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index ac65242ac..2968b2288 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - UART driver demo for STM32F1xx. ** +** ChibiOS/RT HAL - UART driver demo for STM32L1xx. ** ***************************************************************************** ** TARGET ** -- cgit v1.2.3 From 46870077b874696c09704da37dc4c33c8eb21402 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 24 Nov 2011 17:58:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3523 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 18 ++++++++++-------- testhal/STM32L1xx/ADC/mcuconf.h | 3 ++- testhal/STM32L1xx/EXT/mcuconf.h | 3 ++- testhal/STM32L1xx/GPT/mcuconf.h | 3 ++- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 3 ++- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 3 ++- testhal/STM32L1xx/SPI/mcuconf.h | 3 ++- testhal/STM32L1xx/UART/mcuconf.h | 3 ++- 8 files changed, 24 insertions(+), 15 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index c13ebfe2a..2af3703e8 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -61,12 +61,13 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - 0, /* SMPR1 */ + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + 0, /* SMPR1 */ ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4), - 0, /* SMPR3 */ + 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, 0, 0, /* SQR2, SQR3, SQR4 */ + 0, 0, 0, /* SQR2, SQR3, SQR4 */ ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) }; @@ -80,13 +81,14 @@ static const ADCConversionGroup adcgrpcfg2 = { ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - 0, /* SMPR1 */ + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + 0, /* SMPR1 */ ADC_SMPR2_SMP_AN11(ADC_SAMPLE_48) | ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), - 0, /* SMPR3 */ + 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), - 0, 0, /* SQR2, SQR3 */ + 0, 0, /* SQR2, SQR3 */ ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index b2ad1faca..a75fb49cf 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index b2ad1faca..a75fb49cf 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index b2ad1faca..a75fb49cf 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index b4e3ea258..b17805089 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 433013b38..b1e760697 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 116f26170..0e6333b7a 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index d1b9069be..8a232fe4d 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. -- cgit v1.2.3 From 3aa821af1a657f41cfb284f2ca60a695aa4b08c3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Dec 2011 12:14:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3637 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/readme.txt | 2 +- testhal/STM32L1xx/EXT/readme.txt | 2 +- testhal/STM32L1xx/GPT/readme.txt | 2 +- testhal/STM32L1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32L1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32L1xx/SPI/readme.txt | 2 +- testhal/STM32L1xx/UART/readme.txt | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt index 157c3b93e..5c54c211a 100644 --- a/testhal/STM32L1xx/ADC/readme.txt +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/EXT/readme.txt b/testhal/STM32L1xx/EXT/readme.txt index b0d1883e9..6d3873fff 100644 --- a/testhal/STM32L1xx/EXT/readme.txt +++ b/testhal/STM32L1xx/EXT/readme.txt @@ -16,7 +16,7 @@ None required. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt index 7b561e8f8..2627af47f 100644 --- a/testhal/STM32L1xx/GPT/readme.txt +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -16,7 +16,7 @@ None required. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index 19af96363..ce396ab93 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -17,7 +17,7 @@ None. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/PWM-ICU/readme.txt b/testhal/STM32L1xx/PWM-ICU/readme.txt index f55cf8471..5f0c82854 100644 --- a/testhal/STM32L1xx/PWM-ICU/readme.txt +++ b/testhal/STM32L1xx/PWM-ICU/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32L1xx PWM-ICU drivers. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt index 1d0499baa..e4d1a26e3 100644 --- a/testhal/STM32L1xx/SPI/readme.txt +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32L1xx SPI driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index 2968b2288..5f32eb071 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -18,7 +18,7 @@ The application demonstrates the use of the STM32L1xx UART driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. -- cgit v1.2.3 From c397738010966f85c7ae841e21d74790ac49611c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Dec 2011 10:07:43 +0000 Subject: Changes to palSetGroupMode(), various adjustments to the PAL driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3695 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 2af3703e8..e84e4843e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -130,7 +130,7 @@ int main(void) { * Setting up analog inputs used by the demo. */ palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); + 0, PAL_MODE_INPUT_ANALOG); /* * Creates the blinker thread. -- cgit v1.2.3 From 45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 4 Jan 2012 22:00:44 +0000 Subject: Documentation related fixes and updated all the mcuconf.h for the STM32. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3735 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 4 +++- testhal/STM32L1xx/EXT/mcuconf.h | 4 +++- testhal/STM32L1xx/GPT/mcuconf.h | 4 +++- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 4 +++- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 4 +++- testhal/STM32L1xx/SPI/mcuconf.h | 4 +++- testhal/STM32L1xx/UART/mcuconf.h | 4 +++- 7 files changed, 21 insertions(+), 7 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index b17805089..9db07a695 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index b1e760697..e5f0ce333 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 0e6333b7a..482b34a8a 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 8a232fe4d..74a5bf578 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. -- cgit v1.2.3 From 1f4343efb2c22313bbce16fd9bdb17d4307b56a4 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 5 Jan 2012 07:35:32 +0000 Subject: PVD. Added tests fro F4x and L1x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3737 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/PVD/Makefile | 207 +++++++++++++++ testhal/STM32L1xx/PVD/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/PVD/halconf.h | 335 ++++++++++++++++++++++++ testhal/STM32L1xx/PVD/main.c | 92 +++++++ testhal/STM32L1xx/PVD/mcuconf.h | 189 ++++++++++++++ testhal/STM32L1xx/PVD/readme.txt | 30 +++ 6 files changed, 1388 insertions(+) create mode 100644 testhal/STM32L1xx/PVD/Makefile create mode 100644 testhal/STM32L1xx/PVD/chconf.h create mode 100644 testhal/STM32L1xx/PVD/halconf.h create mode 100644 testhal/STM32L1xx/PVD/main.c create mode 100644 testhal/STM32L1xx/PVD/mcuconf.h create mode 100644 testhal/STM32L1xx/PVD/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/PVD/Makefile b/testhal/STM32L1xx/PVD/Makefile new file mode 100644 index 000000000..0d3a8e2b2 --- /dev/null +++ b/testhal/STM32L1xx/PVD/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/PVD/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h new file mode 100644 index 000000000..775428e22 --- /dev/null +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PVD/main.c b/testhal/STM32L1xx/PVD/main.c new file mode 100644 index 000000000..d1de74715 --- /dev/null +++ b/testhal/STM32L1xx/PVD/main.c @@ -0,0 +1,92 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + + +#include "ch.h" +#include "hal.h" + +static void extcb(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + + if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ + palClearPad(GPIOB, GPIOB_LED4); /* switch off LED*/ + } + else{ + palSetPad(GPIOB, GPIOB_LED4); /* switch on LED*/ + } +} + +/* If you want to monitor only lover (higher) threshold events than set + * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h new file mode 100644 index 000000000..14cc92d49 --- /dev/null +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -0,0 +1,189 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE TRUE +#define STM32_PLS STM32_PLS_LEV6 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PVD/readme.txt b/testhal/STM32L1xx/PVD/readme.txt new file mode 100644 index 000000000..6d3873fff --- /dev/null +++ b/testhal/STM32L1xx/PVD/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From a2708c091beb3331967dff2af9a9232744427de4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 9 Jan 2012 19:37:58 +0000 Subject: Updated all halconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3777 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/halconf.h | 7 +++++++ testhal/STM32L1xx/EXT/halconf.h | 7 +++++++ testhal/STM32L1xx/GPT/halconf.h | 7 +++++++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32L1xx/PVD/halconf.h | 7 +++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32L1xx/SPI/halconf.h | 7 +++++++ testhal/STM32L1xx/UART/halconf.h | 14 ++++++++++++++ 8 files changed, 63 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index b1de4bf39..6cb28fb0a 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 3be209376..8d737d99a 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index f9a1b78f6..df586a1df 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32L1xx/PVD/halconf.h +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 5d3985cdd..934c0a66b 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index b3bbd85fd..1083c2291 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 8a458d702..f63aacaae 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From de5dcbba856524599a8f06d3a9bdbf1b01db44c2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Jan 2012 14:29:42 +0000 Subject: License text updated with new year. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3846 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 2 +- testhal/STM32L1xx/ADC/halconf.h | 2 +- testhal/STM32L1xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/mcuconf.h | 2 +- testhal/STM32L1xx/EXT/chconf.h | 2 +- testhal/STM32L1xx/EXT/halconf.h | 2 +- testhal/STM32L1xx/EXT/main.c | 2 +- testhal/STM32L1xx/EXT/mcuconf.h | 2 +- testhal/STM32L1xx/GPT/chconf.h | 2 +- testhal/STM32L1xx/GPT/halconf.h | 2 +- testhal/STM32L1xx/GPT/main.c | 2 +- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/main.c | 2 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/PVD/chconf.h | 2 +- testhal/STM32L1xx/PVD/halconf.h | 2 +- testhal/STM32L1xx/PVD/main.c | 2 +- testhal/STM32L1xx/PVD/mcuconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/main.c | 2 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32L1xx/SPI/chconf.h | 2 +- testhal/STM32L1xx/SPI/halconf.h | 2 +- testhal/STM32L1xx/SPI/main.c | 2 +- testhal/STM32L1xx/SPI/mcuconf.h | 2 +- testhal/STM32L1xx/UART/chconf.h | 2 +- testhal/STM32L1xx/UART/halconf.h | 2 +- testhal/STM32L1xx/UART/main.c | 2 +- testhal/STM32L1xx/UART/mcuconf.h | 2 +- 32 files changed, 32 insertions(+), 32 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 6cb28fb0a..2c6d2beaf 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index e84e4843e..140834f9c 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index fe2c4972a..8b2565209 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 7bf0cb54e..5d8e03009 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index fe2c4972a..8b2565209 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 8d737d99a..1b9896157 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index d63743628..ea48f2545 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index fe2c4972a..8b2565209 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index df586a1df..1ad8f74ce 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index f8e7b7bc5..a062a1bd3 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 9db07a695..2b9e92bf8 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/PVD/chconf.h +++ b/testhal/STM32L1xx/PVD/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32L1xx/PVD/halconf.h +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/main.c b/testhal/STM32L1xx/PVD/main.c index d1de74715..888d63c0d 100644 --- a/testhal/STM32L1xx/PVD/main.c +++ b/testhal/STM32L1xx/PVD/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index 14cc92d49..660580a8b 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 934c0a66b..539b810db 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index bc33ecb0e..22d31a379 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index e5f0ce333..40bb8dfcd 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 1083c2291..84a220f12 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 7a96f0e22..b466b9819 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 482b34a8a..d22b6df0d 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index f63aacaae..5f667087c 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index ce1804f2e..8bb5ea6d7 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 74a5bf578..8d0d117bc 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From 7941098261bd0ec28831e8ec236e697c6ab2165b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 5 Feb 2012 08:56:06 +0000 Subject: Fixed typo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3918 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/readme.txt | 2 +- testhal/STM32L1xx/EXT/readme.txt | 2 +- testhal/STM32L1xx/GPT/readme.txt | 2 +- testhal/STM32L1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32L1xx/PVD/readme.txt | 2 +- testhal/STM32L1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32L1xx/SPI/readme.txt | 2 +- testhal/STM32L1xx/UART/readme.txt | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt index 5c54c211a..91e9574b3 100644 --- a/testhal/STM32L1xx/ADC/readme.txt +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/EXT/readme.txt b/testhal/STM32L1xx/EXT/readme.txt index 6d3873fff..16953a3c9 100644 --- a/testhal/STM32L1xx/EXT/readme.txt +++ b/testhal/STM32L1xx/EXT/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt index 2627af47f..bb42bbc29 100644 --- a/testhal/STM32L1xx/GPT/readme.txt +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index ce396ab93..41cff1b2c 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/PVD/readme.txt b/testhal/STM32L1xx/PVD/readme.txt index 6d3873fff..16953a3c9 100644 --- a/testhal/STM32L1xx/PVD/readme.txt +++ b/testhal/STM32L1xx/PVD/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/readme.txt b/testhal/STM32L1xx/PWM-ICU/readme.txt index 5f0c82854..52a2dd2ad 100644 --- a/testhal/STM32L1xx/PWM-ICU/readme.txt +++ b/testhal/STM32L1xx/PWM-ICU/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt index e4d1a26e3..2ce870851 100644 --- a/testhal/STM32L1xx/SPI/readme.txt +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index 5f32eb071..5f3edb851 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -26,7 +26,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com -- cgit v1.2.3 From 28c1f163a94e9aaad5d4ec3f9534b89677f9e5b1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 5 Feb 2012 09:12:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3925 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/EXT/main.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 5d8e03009..84d57e682 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -98,10 +98,8 @@ int main(void) { * button EXT channel using 5 seconds intervals. */ while (TRUE) { - EXTI->SWIER = 64; chThdSleepMilliseconds(5000); extChannelDisable(&EXTD1, 0); - EXTI->SWIER = 64; chThdSleepMilliseconds(5000); extChannelEnable(&EXTD1, 0); } -- cgit v1.2.3 From 18b8b495244411bb33254ea0d8b868259077be7d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 8 Feb 2012 17:53:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3946 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/UART/main.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 8bb5ea6d7..65f834672 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -26,7 +26,10 @@ static VirtualTimer vt1, vt2; static void restart(void *p) { (void)p; + + chSysLockFromIsr(); uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); } static void ledoff(void *p) { -- cgit v1.2.3 From 1f05b803edfb45940c544aa01ae3af3693b1a4cd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 10 Mar 2012 11:56:43 +0000 Subject: Overflow handling in ICU driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4033 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/PWM-ICU/main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index 22d31a379..35044663c 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -51,20 +51,22 @@ icucnt_t last_width, last_period; static void icuwidthcb(ICUDriver *icup) { palSetPad(GPIOB, GPIOB_LED3); - last_width = icuGetWidthI(icup); + last_width = icuGetWidth(icup); } static void icuperiodcb(ICUDriver *icup) { palClearPad(GPIOB, GPIOB_LED3); - last_period = icuGetPeriodI(icup); + last_period = icuGetPeriod(icup); } static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, 10000, /* 10KHz ICU clock frequency. */ icuwidthcb, - icuperiodcb + icuperiodcb, + NULL, + ICU_CHANNEL_1 }; /* -- cgit v1.2.3 From f038bffdb512f67d4f90e8cba499713458eebd67 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Apr 2012 09:13:04 +0000 Subject: Fixed bug 3510812. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4066 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 2 +- testhal/STM32L1xx/ADC/halconf.h | 2 +- testhal/STM32L1xx/EXT/chconf.h | 2 +- testhal/STM32L1xx/EXT/halconf.h | 2 +- testhal/STM32L1xx/GPT/chconf.h | 2 +- testhal/STM32L1xx/GPT/halconf.h | 2 +- testhal/STM32L1xx/GPT/main.c | 4 ++-- testhal/STM32L1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32L1xx/PVD/chconf.h | 2 +- testhal/STM32L1xx/PVD/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/main.c | 4 ++-- testhal/STM32L1xx/SPI/chconf.h | 2 +- testhal/STM32L1xx/SPI/halconf.h | 2 +- testhal/STM32L1xx/SPI/main.c | 2 +- testhal/STM32L1xx/UART/chconf.h | 2 +- testhal/STM32L1xx/UART/halconf.h | 2 +- 19 files changed, 21 insertions(+), 21 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 2c6d2beaf..545241783 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 1b9896157..ad048e08f 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index ea48f2545..e263c4813 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -46,7 +46,7 @@ static void gpt3cb(GPTDriver *gptp) { * GPT2 configuration. */ static const GPTConfig gpt2cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt2cb /* Timer callback.*/ }; @@ -54,7 +54,7 @@ static const GPTConfig gpt2cfg = { * GPT3 configuration. */ static const GPTConfig gpt3cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt3cb /* Timer callback.*/ }; diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 1ad8f74ce..4e5a16796 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/PVD/chconf.h +++ b/testhal/STM32L1xx/PVD/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32L1xx/PVD/halconf.h +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 539b810db..9e7b5b6fe 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index 35044663c..c4fddb65f 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -34,7 +34,7 @@ static void pwmc1cb(PWMDriver *pwmp) { } static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ + 10000, /* 10kHz PWM clock frequency. */ 10000, /* Initial PWM period 1S. */ pwmpcb, { @@ -62,7 +62,7 @@ static void icuperiodcb(ICUDriver *icup) { static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ + 10000, /* 10kHz ICU clock frequency. */ icuwidthcb, icuperiodcb, NULL, diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 84a220f12..d176ad1a7 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index b466b9819..e9fed979a 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -32,7 +32,7 @@ static const SPIConfig hs_spicfg = { }; /* - * Low speed SPI configuration (256KHz, CPHA=0, CPOL=0, MSb first). + * Low speed SPI configuration (256kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { NULL, diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 5f667087c..60af9dec0 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 -- cgit v1.2.3 From e817b7032d9610508e39921c65cda6ba108db357 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 23 Apr 2012 17:43:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4128 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/EXT/main.c | 51 +++++++++++++++++++++----------------------- 1 file changed, 24 insertions(+), 27 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 84d57e682..88721db86 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -44,33 +44,30 @@ static void extcb1(EXTDriver *extp, expchannel_t channel) { static const EXTConfig extcfg = { { - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL} - }, - EXT_MODE_EXTI(EXT_MODE_GPIOA, /* Button.*/ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0) + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } }; /* -- cgit v1.2.3 From 166d6bf8b5e5a9e39efd0458feee04be4d1674d6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Jun 2012 06:22:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4277 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 2 +- testhal/STM32L1xx/EXT/mcuconf.h | 2 +- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/PVD/mcuconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32L1xx/SPI/mcuconf.h | 2 +- testhal/STM32L1xx/UART/mcuconf.h | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 8b2565209..4769b314d 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 8b2565209..4769b314d 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 8b2565209..4769b314d 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 2b9e92bf8..bdab543ae 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index 660580a8b..ef25eab0a 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 40bb8dfcd..f86f9caa1 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index d22b6df0d..e0c087b19 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 8d0d117bc..1df13289f 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From 43011f1886d70446f3f48f79cb99be2a07b6d33f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 21 Jun 2012 16:25:11 +0000 Subject: STM32 support enhancements, some other fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4313 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 2 ++ testhal/STM32L1xx/EXT/mcuconf.h | 2 ++ testhal/STM32L1xx/GPT/mcuconf.h | 2 ++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32L1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32L1xx/PVD/mcuconf.h | 2 ++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32L1xx/SPI/mcuconf.h | 2 ++ testhal/STM32L1xx/UART/mcuconf.h | 2 ++ 9 files changed, 17 insertions(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 4769b314d..1aa91e950 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 4769b314d..1aa91e950 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 4769b314d..1aa91e950 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index bdab543ae..5b75140c3 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index 41cff1b2c..9483b1f02 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32L1xx. ** ***************************************************************************** ** TARGET ** diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index ef25eab0a..473a0f2be 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index f86f9caa1..7fa9b73c7 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index e0c087b19..8ec0616e8 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 1df13289f..1291113a1 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. -- cgit v1.2.3 From bfa1ba111db2b1f1366b6b33dbd0cf8ff86b5733 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 14 Aug 2012 18:08:04 +0000 Subject: I2C. Priorities rebalanced. I2C pushed over other peripherals as a workaround on buggy i2c cell in STM32. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4570 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 4 ++-- testhal/STM32L1xx/EXT/mcuconf.h | 4 ++-- testhal/STM32L1xx/GPT/mcuconf.h | 4 ++-- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 4 ++-- testhal/STM32L1xx/PVD/mcuconf.h | 4 ++-- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 4 ++-- testhal/STM32L1xx/SPI/mcuconf.h | 4 ++-- testhal/STM32L1xx/UART/mcuconf.h | 4 ++-- 8 files changed, 16 insertions(+), 16 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 1aa91e950..97555af27 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 1aa91e950..97555af27 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 1aa91e950..97555af27 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 5b75140c3..6c240fbd4 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index 473a0f2be..080979f0b 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 7fa9b73c7..bef51029f 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 8ec0616e8..06030aadf 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 1291113a1..64983188d 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. -- cgit v1.2.3 From f83c58d4a4219888df1d3c95e3849ce1f4072d54 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Aug 2012 06:17:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4608 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 62 ++-- testhal/STM32L1xx/EXT/mcuconf.h | 64 ++-- testhal/STM32L1xx/GPT/mcuconf.h | 58 ++-- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 60 ++-- testhal/STM32L1xx/PVD/Makefile | 207 ------------- testhal/STM32L1xx/PVD/chconf.h | 535 ---------------------------------- testhal/STM32L1xx/PVD/halconf.h | 342 ---------------------- testhal/STM32L1xx/PVD/main.c | 92 ------ testhal/STM32L1xx/PVD/mcuconf.h | 191 ------------ testhal/STM32L1xx/PVD/readme.txt | 30 -- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 64 ++-- testhal/STM32L1xx/SPI/mcuconf.h | 58 ++-- testhal/STM32L1xx/UART/mcuconf.h | 60 ++-- 13 files changed, 143 insertions(+), 1680 deletions(-) delete mode 100644 testhal/STM32L1xx/PVD/Makefile delete mode 100644 testhal/STM32L1xx/PVD/chconf.h delete mode 100644 testhal/STM32L1xx/PVD/halconf.h delete mode 100644 testhal/STM32L1xx/PVD/main.c delete mode 100644 testhal/STM32L1xx/PVD/mcuconf.h delete mode 100644 testhal/STM32L1xx/PVD/readme.txt (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 97555af27..8f2abd84d 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -66,12 +68,6 @@ #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 97555af27..dd173d0a0 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 97555af27..1de4501d4 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 6c240fbd4..1cc7b414a 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,51 +88,44 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 6 #define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. @@ -144,35 +133,26 @@ #define STM32_SERIAL_USE_USART1 TRUE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/PVD/Makefile b/testhal/STM32L1xx/PVD/Makefile deleted file mode 100644 index 0d3a8e2b2..000000000 --- a/testhal/STM32L1xx/PVD/Makefile +++ /dev/null @@ -1,207 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32L152xB.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h deleted file mode 100644 index 290044421..000000000 --- a/testhal/STM32L1xx/PVD/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h deleted file mode 100644 index 5a1e5c050..000000000 --- a/testhal/STM32L1xx/PVD/halconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/PVD/main.c b/testhal/STM32L1xx/PVD/main.c deleted file mode 100644 index 888d63c0d..000000000 --- a/testhal/STM32L1xx/PVD/main.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - - -#include "ch.h" -#include "hal.h" - -static void extcb(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; - - if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ - palClearPad(GPIOB, GPIOB_LED4); /* switch off LED*/ - } - else{ - palSetPad(GPIOB, GPIOB_LED4); /* switch on LED*/ - } -} - -/* If you want to monitor only lover (higher) threshold events than set - * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the EXT driver 1. - */ - extStart(&EXTD1, &extcfg); - - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h deleted file mode 100644 index 080979f0b..000000000 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32L1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED FALSE -#define STM32_LSE_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_MSIRANGE STM32_MSIRANGE_2M -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLMUL_VALUE 6 -#define STM32_PLLDIV_VALUE 3 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV1 -#define STM32_PPRE2 STM32_PPRE2_DIV1 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_MCOPRE STM32_MCOPRE_DIV1 -#define STM32_RTCSEL STM32_RTCSEL_LSE -#define STM32_RTCPRE STM32_RTCPRE_DIV2 -#define STM32_VOS STM32_VOS_1P8 -#define STM32_PVD_ENABLE TRUE -#define STM32_PLS STM32_PLS_LEV6 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PVD/readme.txt b/testhal/STM32L1xx/PVD/readme.txt deleted file mode 100644 index 16953a3c9..000000000 --- a/testhal/STM32L1xx/PVD/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - EXT driver demo for STM32L1xx. ** -***************************************************************************** - -** TARGET ** - -The demo will on an STMicroelectronics STM32L-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32L1xx EXT driver. - -** Board Setup ** - -None required. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index bef51029f..6673c35ec 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 06030aadf..3e4f14fdb 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 64983188d..a6b10041e 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,80 +88,64 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* -- cgit v1.2.3 From 10c2f6387035ca3b1865b00492d64627674be12d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Aug 2012 06:20:38 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4609 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/IRQ_STORM/main.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index a062a1bd3..31ec40fb5 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -170,29 +170,29 @@ static const GPTConfig gpt3cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } - chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD1, '0'); + chSequentialStreamPut(&SD1, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD1, *--p); + chSequentialStreamPut(&SD1, *--p); } } -- cgit v1.2.3 From 77d7a3741d05e24286f41d3bfdfdee78f4dbd8a6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 30 Dec 2012 09:43:16 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4995 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/halconf.h | 7 +++++++ testhal/STM32L1xx/EXT/halconf.h | 7 +++++++ testhal/STM32L1xx/GPT/halconf.h | 7 +++++++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32L1xx/SPI/halconf.h | 7 +++++++ testhal/STM32L1xx/UART/halconf.h | 7 +++++++ 7 files changed, 49 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 545241783..b3287928a 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 5a1e5c050..3c0e4218f 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index ad048e08f..87b6a7b3a 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 4e5a16796..0d5d491ea 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 9e7b5b6fe..4cbbe5fb2 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index d176ad1a7..526cc590d 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 60af9dec0..ee05697c3 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ -- cgit v1.2.3 From 96fb9a85dfe9d3779baed9de1d4a7d5f857810dc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 30 Dec 2012 17:56:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5000 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 140834f9c..46e39798c 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -138,7 +138,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the thermal sensor. + * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); adcSTM32EnableTSVREFE(); -- cgit v1.2.3 From 097062ca3be263bac3906c4b23d56ca765504ba8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Feb 2013 10:35:45 +0000 Subject: Removed obsolete options from the haconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5101 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/halconf.h | 33 --------------------------------- testhal/STM32L1xx/EXT/halconf.h | 33 --------------------------------- testhal/STM32L1xx/GPT/halconf.h | 33 --------------------------------- testhal/STM32L1xx/IRQ_STORM/halconf.h | 33 --------------------------------- testhal/STM32L1xx/PWM-ICU/halconf.h | 33 --------------------------------- testhal/STM32L1xx/SPI/halconf.h | 33 --------------------------------- testhal/STM32L1xx/UART/halconf.h | 33 --------------------------------- 7 files changed, 231 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index b3287928a..4e9af164e 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 3c0e4218f..4e51277c8 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 87b6a7b3a..207741a39 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 0d5d491ea..85592fd01 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 4cbbe5fb2..98cc85012 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 526cc590d..51c983c7f 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index ee05697c3..822fe37c4 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From 184a71345c6a36a9a8664eda8fbcc3ea728267a8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Feb 2013 10:58:09 +0000 Subject: Updated license years. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5102 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 2 +- testhal/STM32L1xx/ADC/halconf.h | 2 +- testhal/STM32L1xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/mcuconf.h | 2 +- testhal/STM32L1xx/EXT/chconf.h | 2 +- testhal/STM32L1xx/EXT/halconf.h | 2 +- testhal/STM32L1xx/EXT/main.c | 2 +- testhal/STM32L1xx/EXT/mcuconf.h | 2 +- testhal/STM32L1xx/GPT/chconf.h | 2 +- testhal/STM32L1xx/GPT/halconf.h | 2 +- testhal/STM32L1xx/GPT/main.c | 2 +- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/main.c | 2 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/main.c | 2 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32L1xx/SPI/chconf.h | 2 +- testhal/STM32L1xx/SPI/halconf.h | 2 +- testhal/STM32L1xx/SPI/main.c | 2 +- testhal/STM32L1xx/SPI/mcuconf.h | 2 +- testhal/STM32L1xx/UART/chconf.h | 2 +- testhal/STM32L1xx/UART/halconf.h | 2 +- testhal/STM32L1xx/UART/main.c | 2 +- testhal/STM32L1xx/UART/mcuconf.h | 2 +- 28 files changed, 28 insertions(+), 28 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 4e9af164e..d2db7fafa 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 46e39798c..f6d547ed7 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 8f2abd84d..49a9a7332 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 4e51277c8..201401688 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 88721db86..e94a35a9c 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index dd173d0a0..80c0e1efb 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 207741a39..9b733e444 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index e263c4813..29e31a510 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 1de4501d4..38568dc7c 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 85592fd01..6ada1f1eb 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index 31ec40fb5..8b28dcdb0 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 1cc7b414a..f3ed6b434 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 98cc85012..34b68bafb 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index c4fddb65f..e8a961015 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 6673c35ec..d9df3b765 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 51c983c7f..a224e8f25 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index e9fed979a..88b024e8e 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 3e4f14fdb..103da0c94 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 822fe37c4..b4c255570 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 65f834672..6815f3c2e 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index a6b10041e..466ce0619 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From 853216256ad4cdacf5f94edb7d6b738c6be165a1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 30 Mar 2013 10:32:37 +0000 Subject: Relicensing parts of the tree under the Apache 2.0 license. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5521 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/UART/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/UART/mcuconf.h | 24 ++++++++++-------------- 28 files changed, 280 insertions(+), 392 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index f6d547ed7..9ca4b541f 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 49a9a7332..adc3e444f 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 201401688..e0e0c38ff 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index e94a35a9c..c0820d139 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 80c0e1efb..2e04bba3a 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 9b733e444..554b4e9ca 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 29e31a510..dafd3b48a 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 38568dc7c..5672bb523 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 6ada1f1eb..117a5979b 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index 8b28dcdb0..88d575b18 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index f3ed6b434..2b152e718 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 34b68bafb..2f74c82c8 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index e8a961015..3ef877831 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index d9df3b765..c37a102ba 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index a224e8f25..3e1cafbbf 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 88b024e8e..8bbd0254f 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 103da0c94..18da3b254 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index b4c255570..520e71b0a 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 6815f3c2e..01a8c8cd9 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 466ce0619..356d36774 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* -- cgit v1.2.3 From 66805e58c6e035d7343ac8a7b286e2dfcbd03062 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Apr 2013 08:28:33 +0000 Subject: Added STM32L Eclipse project files. Removed GPT demo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5598 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/.cproject | 51 ++++ testhal/STM32L1xx/ADC/.project | 38 +++ testhal/STM32L1xx/EXT/.cproject | 51 ++++ testhal/STM32L1xx/EXT/.project | 38 +++ testhal/STM32L1xx/GPT/Makefile | 207 ------------- testhal/STM32L1xx/GPT/chconf.h | 531 ---------------------------------- testhal/STM32L1xx/GPT/halconf.h | 312 -------------------- testhal/STM32L1xx/GPT/main.c | 94 ------ testhal/STM32L1xx/GPT/mcuconf.h | 167 ----------- testhal/STM32L1xx/GPT/readme.txt | 30 -- testhal/STM32L1xx/IRQ_STORM/.cproject | 51 ++++ testhal/STM32L1xx/IRQ_STORM/.project | 38 +++ testhal/STM32L1xx/PWM-ICU/.cproject | 51 ++++ testhal/STM32L1xx/PWM-ICU/.project | 38 +++ testhal/STM32L1xx/SPI/.cproject | 51 ++++ testhal/STM32L1xx/SPI/.project | 38 +++ testhal/STM32L1xx/UART/.cproject | 51 ++++ testhal/STM32L1xx/UART/.project | 38 +++ 18 files changed, 534 insertions(+), 1341 deletions(-) create mode 100644 testhal/STM32L1xx/ADC/.cproject create mode 100644 testhal/STM32L1xx/ADC/.project create mode 100644 testhal/STM32L1xx/EXT/.cproject create mode 100644 testhal/STM32L1xx/EXT/.project delete mode 100644 testhal/STM32L1xx/GPT/Makefile delete mode 100644 testhal/STM32L1xx/GPT/chconf.h delete mode 100644 testhal/STM32L1xx/GPT/halconf.h delete mode 100644 testhal/STM32L1xx/GPT/main.c delete mode 100644 testhal/STM32L1xx/GPT/mcuconf.h delete mode 100644 testhal/STM32L1xx/GPT/readme.txt create mode 100644 testhal/STM32L1xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32L1xx/IRQ_STORM/.project create mode 100644 testhal/STM32L1xx/PWM-ICU/.cproject create mode 100644 testhal/STM32L1xx/PWM-ICU/.project create mode 100644 testhal/STM32L1xx/SPI/.cproject create mode 100644 testhal/STM32L1xx/SPI/.project create mode 100644 testhal/STM32L1xx/UART/.cproject create mode 100644 testhal/STM32L1xx/UART/.project (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/.cproject b/testhal/STM32L1xx/ADC/.cproject new file mode 100644 index 000000000..dd444dc30 --- /dev/null +++ b/testhal/STM32L1xx/ADC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/ADC/.project b/testhal/STM32L1xx/ADC/.project new file mode 100644 index 000000000..170610f4f --- /dev/null +++ b/testhal/STM32L1xx/ADC/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/EXT/.cproject b/testhal/STM32L1xx/EXT/.cproject new file mode 100644 index 000000000..2148e6575 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/EXT/.project b/testhal/STM32L1xx/EXT/.project new file mode 100644 index 000000000..c24be83e5 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile deleted file mode 100644 index 0d3a8e2b2..000000000 --- a/testhal/STM32L1xx/GPT/Makefile +++ /dev/null @@ -1,207 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32L152xB.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h deleted file mode 100644 index 2e6fcc6ee..000000000 --- a/testhal/STM32L1xx/GPT/chconf.h +++ /dev/null @@ -1,531 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h deleted file mode 100644 index 554b4e9ca..000000000 --- a/testhal/STM32L1xx/GPT/halconf.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c deleted file mode 100644 index dafd3b48a..000000000 --- a/testhal/STM32L1xx/GPT/main.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "ch.h" -#include "hal.h" - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - - (void)gptp; - palSetPad(GPIOB, GPIOB_LED4); - chSysLockFromIsr(); - gptStartOneShotI(&GPTD3, 1000); /* 0.1 second pulse.*/ - chSysUnlockFromIsr(); -} - -/* - * GPT3 callback. - */ -static void gpt3cb(GPTDriver *gptp) { - - (void)gptp; - palClearPad(GPIOB, GPIOB_LED4); -} - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 10000, /* 10kHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - -/* - * GPT3 configuration. - */ -static const GPTConfig gpt3cfg = { - 10000, /* 10kHz timer clock.*/ - gpt3cb /* Timer callback.*/ -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the GPT drivers 2 and 3. - */ - gptStart(&GPTD2, &gpt2cfg); - gptPolledDelay(&GPTD2, 10); /* Small delay.*/ - gptStart(&GPTD3, &gpt3cfg); - gptPolledDelay(&GPTD3, 10); /* Small delay.*/ - - /* - * Normal main() thread activity, it changes the GPT1 period every - * five seconds. - */ - while (TRUE) { - palSetPad(GPIOB, GPIOB_LED3); - gptStartContinuous(&GPTD2, 5000); - chThdSleepMilliseconds(5000); - gptStopTimer(&GPTD2); - palClearPad(GPIOB, GPIOB_LED3); - gptStartContinuous(&GPTD2, 2500); - chThdSleepMilliseconds(5000); - gptStopTimer(&GPTD2); - } -} diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h deleted file mode 100644 index 5672bb523..000000000 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32L1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32L1xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED FALSE -#define STM32_LSE_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_MSIRANGE STM32_MSIRANGE_2M -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLMUL_VALUE 6 -#define STM32_PLLDIV_VALUE 3 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV1 -#define STM32_PPRE2 STM32_PPRE2_DIV1 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_MCOPRE STM32_MCOPRE_DIV1 -#define STM32_RTCSEL STM32_RTCSEL_LSE -#define STM32_RTCPRE STM32_RTCPRE_DIV2 -#define STM32_VOS STM32_VOS_1P8 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt deleted file mode 100644 index bb42bbc29..000000000 --- a/testhal/STM32L1xx/GPT/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - GPT driver demo for STM32L1xx. ** -***************************************************************************** - -** TARGET ** - -The demo will on an STMicroelectronics STM32L-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32L1xx GPT driver. - -** Board Setup ** - -None required. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32L1xx/IRQ_STORM/.cproject b/testhal/STM32L1xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..5b23e9f4d --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/IRQ_STORM/.project b/testhal/STM32L1xx/IRQ_STORM/.project new file mode 100644 index 000000000..5cc197397 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.cproject b/testhal/STM32L1xx/PWM-ICU/.cproject new file mode 100644 index 000000000..b96ec18ee --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.project b/testhal/STM32L1xx/PWM-ICU/.project new file mode 100644 index 000000000..393dbac2d --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/SPI/.cproject b/testhal/STM32L1xx/SPI/.cproject new file mode 100644 index 000000000..b2bc5eb2d --- /dev/null +++ b/testhal/STM32L1xx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/SPI/.project b/testhal/STM32L1xx/SPI/.project new file mode 100644 index 000000000..aef073cf3 --- /dev/null +++ b/testhal/STM32L1xx/SPI/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/UART/.cproject b/testhal/STM32L1xx/UART/.cproject new file mode 100644 index 000000000..dc7b9ec94 --- /dev/null +++ b/testhal/STM32L1xx/UART/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/UART/.project b/testhal/STM32L1xx/UART/.project new file mode 100644 index 000000000..ac58d7107 --- /dev/null +++ b/testhal/STM32L1xx/UART/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 6dc59bdf42a4342127dfbef2c1284bf544295a78 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 4 May 2013 09:20:30 +0000 Subject: ICU support for STM32 TIM9 unit. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5673 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 4 ++++ testhal/STM32L1xx/EXT/mcuconf.h | 4 ++++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 4 ++++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 4 ++++ testhal/STM32L1xx/SPI/mcuconf.h | 4 ++++ testhal/STM32L1xx/UART/mcuconf.h | 4 ++++ 6 files changed, 24 insertions(+) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index adc3e444f..f0bf4a0cc 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 2e04bba3a..753e83df3 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 2b152e718..e73375db2 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index c37a102ba..961a41c01 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 18da3b254..a992d3419 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 356d36774..ee338ce96 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. -- cgit v1.2.3 From fde582b119c3c1f7c780b9b1e9fc9a0954588ca3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 12 May 2013 06:54:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5723 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal/STM32L1xx') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 8bbd0254f..da394e97b 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -53,7 +53,7 @@ static msg_t spi_thread_1(void *p) { chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ + palSetPad(GPIOB, GPIOB_LED4); /* LED ON. */ spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, @@ -74,7 +74,7 @@ static msg_t spi_thread_2(void *p) { chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ + palClearPad(GPIOB, GPIOB_LED4); /* LED OFF. */ spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, -- cgit v1.2.3