From f90db59d00378a4999389b75cb66a38db2eb9aa1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 11:34:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3326 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 142 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 testhal/STM32L1xx/SPI/main.c (limited to 'testhal/STM32L1xx/SPI/main.c') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c new file mode 100644 index 000000000..b5466bcae --- /dev/null +++ b/testhal/STM32L1xx/SPI/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (16MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0 +}; + +/* + * Low speed SPI configuration (256KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOA, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* NSS. */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + PAL_STM32_OSPEED_HIGHEST); /* SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | + PAL_STM32_OSPEED_HIGHEST); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} -- cgit v1.2.3 From 68a4911f7341c86752e50d1d2498698fa2c466db Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 15:12:48 +0000 Subject: SPI driver working on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3327 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'testhal/STM32L1xx/SPI/main.c') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index b5466bcae..14e97bd20 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -36,7 +36,7 @@ static const SPIConfig hs_spicfg = { */ static const SPIConfig ls_spicfg = { NULL, - GPIOA, + GPIOB, 12, SPI_CR1_BR_2 | SPI_CR1_BR_1 }; @@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) { (void)p; chRegSetThreadName("SPI thread 1"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) { (void)p; chRegSetThreadName("SPI thread 2"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -112,8 +112,7 @@ int main(void) { PAL_STM32_OSPEED_HIGHEST); /* NSS. */ palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | - PAL_STM32_OSPEED_HIGHEST); /* MISO. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */ palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ palSetPad(GPIOB, 12); -- cgit v1.2.3 From 278fc39f993660a8d7ebf4df4a89f6beb10c7f7b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 17:53:57 +0000 Subject: UART driver tested with STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3330 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal/STM32L1xx/SPI/main.c') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 14e97bd20..7a96f0e22 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -110,10 +110,10 @@ int main(void) { */ palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); /* NSS. */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */ - palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ palSetPad(GPIOB, 12); -- cgit v1.2.3