From 8c791c84231a8966a1faf219d220642b19f082fc Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 23 Sep 2018 05:59:56 +0000 Subject: Added mcuconf.h generator for L476. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12286 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- .../multi/PAL/cfg/stm32l476_discovery/mcuconf.h | 34 +++++++++------------- .../QSPI-MFS/cfg/stm32l476_discovery/mcuconf.h | 34 +++++++++------------- .../multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h | 1 + .../USB_CDC/cfg/stm32l476_discovery/mcuconf.h | 34 +++++++++------------- 4 files changed, 40 insertions(+), 63 deletions(-) (limited to 'testhal/STM32/multi') diff --git a/testhal/STM32/multi/PAL/cfg/stm32l476_discovery/mcuconf.h b/testhal/STM32/multi/PAL/cfg/stm32l476_discovery/mcuconf.h index 8ad311d58..249a73045 100644 --- a/testhal/STM32/multi/PAL/cfg/stm32l476_discovery/mcuconf.h +++ b/testhal/STM32/multi/PAL/cfg/stm32l476_discovery/mcuconf.h @@ -14,11 +14,8 @@ limitations under the License. */ -#ifndef MCUCONF_H -#define MCUCONF_H - /* - * STM32L1xx drivers configuration. + * STM32L4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -31,7 +28,11 @@ * 0...3 Lowest...Highest. */ +#ifndef MCUCONF_H +#define MCUCONF_H + #define STM32L4xx_MCUCONF +#define STM32L476_MCUCONF /* * HAL driver system settings. @@ -45,10 +46,6 @@ #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_SAI1_CLOCK_ENABLED TRUE -#define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_48M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL @@ -72,6 +69,10 @@ #define STM32_PLLSAI2N_VALUE 72 #define STM32_PLLSAI2P_VALUE 7 #define STM32_PLLSAI2R_VALUE 6 + +/* + * Peripherals clock sources. + */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK #define STM32_USART3SEL STM32_USART3SEL_SYSCLK @@ -158,9 +159,6 @@ #define STM32_GPT_USE_TIM6 FALSE #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM15 FALSE -#define STM32_GPT_USE_TIM16 FALSE -#define STM32_GPT_USE_TIM17 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -169,9 +167,6 @@ #define STM32_GPT_TIM6_IRQ_PRIORITY 7 #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM15_IRQ_PRIORITY 7 -#define STM32_GPT_TIM16_IRQ_PRIORITY 7 -#define STM32_GPT_TIM17_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -251,10 +246,14 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_LPUART1_PRIORITY 12 /* @@ -291,7 +290,6 @@ #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_UART4 FALSE #define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USE_LPUART1 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) @@ -302,8 +300,6 @@ #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_UART_LPUART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_LPUART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 @@ -314,7 +310,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_UART4_DMA_PRIORITY 0 #define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_LPUART1_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* @@ -323,9 +318,6 @@ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 /* * WDG driver system settings. diff --git a/testhal/STM32/multi/QSPI-MFS/cfg/stm32l476_discovery/mcuconf.h b/testhal/STM32/multi/QSPI-MFS/cfg/stm32l476_discovery/mcuconf.h index af8d116af..29c87a7f5 100644 --- a/testhal/STM32/multi/QSPI-MFS/cfg/stm32l476_discovery/mcuconf.h +++ b/testhal/STM32/multi/QSPI-MFS/cfg/stm32l476_discovery/mcuconf.h @@ -14,11 +14,8 @@ limitations under the License. */ -#ifndef MCUCONF_H -#define MCUCONF_H - /* - * STM32L1xx drivers configuration. + * STM32L4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -31,7 +28,11 @@ * 0...3 Lowest...Highest. */ +#ifndef MCUCONF_H +#define MCUCONF_H + #define STM32L4xx_MCUCONF +#define STM32L476_MCUCONF /* * HAL driver system settings. @@ -45,10 +46,6 @@ #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_SAI1_CLOCK_ENABLED TRUE -#define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_48M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL @@ -72,6 +69,10 @@ #define STM32_PLLSAI2N_VALUE 72 #define STM32_PLLSAI2P_VALUE 7 #define STM32_PLLSAI2R_VALUE 6 + +/* + * Peripherals clock sources. + */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK #define STM32_USART3SEL STM32_USART3SEL_SYSCLK @@ -158,9 +159,6 @@ #define STM32_GPT_USE_TIM6 FALSE #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM15 FALSE -#define STM32_GPT_USE_TIM16 FALSE -#define STM32_GPT_USE_TIM17 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -169,9 +167,6 @@ #define STM32_GPT_TIM6_IRQ_PRIORITY 7 #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM15_IRQ_PRIORITY 7 -#define STM32_GPT_TIM16_IRQ_PRIORITY 7 -#define STM32_GPT_TIM17_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -251,10 +246,14 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_LPUART1_PRIORITY 12 /* @@ -291,7 +290,6 @@ #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_UART4 FALSE #define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USE_LPUART1 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) @@ -302,8 +300,6 @@ #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_UART_LPUART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_LPUART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 @@ -314,7 +310,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_UART4_DMA_PRIORITY 0 #define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_LPUART1_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* @@ -323,9 +318,6 @@ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 /* * WDG driver system settings. diff --git a/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h b/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h index 5491143f3..132cd4994 100644 --- a/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h @@ -123,6 +123,7 @@ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_CHANNEL 10 #define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV2 diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32l476_discovery/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32l476_discovery/mcuconf.h index 793e44186..7d886fe8f 100644 --- a/testhal/STM32/multi/USB_CDC/cfg/stm32l476_discovery/mcuconf.h +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32l476_discovery/mcuconf.h @@ -14,11 +14,8 @@ limitations under the License. */ -#ifndef MCUCONF_H -#define MCUCONF_H - /* - * STM32L1xx drivers configuration. + * STM32L4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -31,7 +28,11 @@ * 0...3 Lowest...Highest. */ +#ifndef MCUCONF_H +#define MCUCONF_H + #define STM32L4xx_MCUCONF +#define STM32L476_MCUCONF /* * HAL driver system settings. @@ -45,10 +46,6 @@ #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_SAI1_CLOCK_ENABLED TRUE -#define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_48M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL @@ -72,6 +69,10 @@ #define STM32_PLLSAI2N_VALUE 72 #define STM32_PLLSAI2P_VALUE 7 #define STM32_PLLSAI2R_VALUE 6 + +/* + * Peripherals clock sources. + */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK #define STM32_USART3SEL STM32_USART3SEL_SYSCLK @@ -158,9 +159,6 @@ #define STM32_GPT_USE_TIM6 FALSE #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM15 FALSE -#define STM32_GPT_USE_TIM16 FALSE -#define STM32_GPT_USE_TIM17 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -169,9 +167,6 @@ #define STM32_GPT_TIM6_IRQ_PRIORITY 7 #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM15_IRQ_PRIORITY 7 -#define STM32_GPT_TIM16_IRQ_PRIORITY 7 -#define STM32_GPT_TIM17_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -251,10 +246,14 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_LPUART1_PRIORITY 12 /* @@ -291,7 +290,6 @@ #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_UART4 FALSE #define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USE_LPUART1 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) @@ -302,8 +300,6 @@ #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_UART_LPUART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_LPUART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 @@ -314,7 +310,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_UART4_DMA_PRIORITY 0 #define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_LPUART1_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* @@ -323,9 +318,6 @@ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 /* * WDG driver system settings. -- cgit v1.2.3