From 908d4ede9d5bbea2f2fba9440681c6de84eb75c1 Mon Sep 17 00:00:00 2001 From: edolomb Date: Mon, 26 Feb 2018 22:27:12 +0000 Subject: Updated Demo git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11560 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- testhal/ATSAMA5D2/MATRIX/Makefile | 3 +- .../MATRIX/debug/SAMA5D2-MATRIX (DDRAM).launch | 58 ++++++++++++++++++++++ testhal/ATSAMA5D2/MATRIX/main.c | 12 ++--- testhal/ATSAMA5D2/MATRIX/mcuconf.h | 53 +++++++++++++------- testhal/ATSAMA5D2/MATRIX/readme.txt | 3 +- 5 files changed, 103 insertions(+), 26 deletions(-) create mode 100644 testhal/ATSAMA5D2/MATRIX/debug/SAMA5D2-MATRIX (DDRAM).launch (limited to 'testhal/ATSAMA5D2/MATRIX') diff --git a/testhal/ATSAMA5D2/MATRIX/Makefile b/testhal/ATSAMA5D2/MATRIX/Makefile index 3f185becd..797a1585c 100755 --- a/testhal/ATSAMA5D2/MATRIX/Makefile +++ b/testhal/ATSAMA5D2/MATRIX/Makefile @@ -127,7 +127,8 @@ include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk #include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here -LDSCRIPT= $(STARTUPLD)/SAMA5D2.ld +#LDSCRIPT= $(STARTUPLD)/SAMA5D2.ld +LDSCRIPT= $(STARTUPLD)/SAMA5D2ddr.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/ATSAMA5D2/MATRIX/debug/SAMA5D2-MATRIX (DDRAM).launch b/testhal/ATSAMA5D2/MATRIX/debug/SAMA5D2-MATRIX (DDRAM).launch new file mode 100644 index 000000000..2bb54e349 --- /dev/null +++ b/testhal/ATSAMA5D2/MATRIX/debug/SAMA5D2-MATRIX (DDRAM).launch @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/ATSAMA5D2/MATRIX/main.c b/testhal/ATSAMA5D2/MATRIX/main.c index 4005a8705..ea2e59c67 100755 --- a/testhal/ATSAMA5D2/MATRIX/main.c +++ b/testhal/ATSAMA5D2/MATRIX/main.c @@ -8,8 +8,8 @@ void go2ns(void) { /* Configure SRAM0 as not secure Read and not secure write */ mtxConfigSlaveSec(MATRIX0,H64MX_SLAVE_SRAM, LOWER_AREA_SECURABLE, NOT_SECURE_READ, NOT_SECURE_WRITE); - /* Configure SRAM1 upper area as not secure Read and secure write */ - mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_L2C_SRAM, UPPER_AREA_SECURABLE, + /* Configure SRAM0 upper area as not secure Read and secure write */ + mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_SRAM, UPPER_AREA_SECURABLE, NOT_SECURE_READ, SECURE_WRITE); asm( "mrc p15, 0, r0, c1, c1, 0\n\t" /* Set NS bit into SCR register */ @@ -25,13 +25,13 @@ int main(void) { mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_L2C_SRAM, MATRIX_AREA_SIZE_64K, REGION_0); - uint32_t *writeNotSecureSRAM1 = (uint32_t *)(0x220000 + 61 * 1024); /* Lower area region SRAM1 */ - uint32_t *writeSecureSRAM1 = (uint32_t *)(0x220000 + 65 * 1024); /* Upper area region SRAM1 */ + uint32_t *writeNotSecureSRAM1 = (uint32_t *)(0x200000 + 61 * 1024); /* Lower area region SRAM0 */ + uint32_t *writeSecureSRAM1 = (uint32_t *)(0x200000 + 65 * 1024); /* Upper area region SRAM0 */ /* Go into Not Secure Mode*/ go2ns(); - /* Writing in SRAM1 Lower Area */ + /* Writing in SRAM0 Lower Area */ *writeNotSecureSRAM1 = 0xAA55AA55; /* writing succeeded*/ - /* Writing in SRAM1 Upper Area */ + /* Writing in SRAM0 Upper Area */ *writeSecureSRAM1 = 0xAA55AA55; /* writing not succeeded*/ while (true) { diff --git a/testhal/ATSAMA5D2/MATRIX/mcuconf.h b/testhal/ATSAMA5D2/MATRIX/mcuconf.h index fcdb66611..ac1b16235 100644 --- a/testhal/ATSAMA5D2/MATRIX/mcuconf.h +++ b/testhal/ATSAMA5D2/MATRIX/mcuconf.h @@ -23,7 +23,7 @@ * HAL driver system settings. */ #define SAMA_HAL_IS_SECURE TRUE -#define SAMA_NO_INIT FALSE +#define SAMA_NO_INIT TRUE #define SAMA_MOSCRC_ENABLED FALSE #define SAMA_MOSCXT_ENABLED TRUE #define SAMA_MOSC_SEL SAMA_MOSC_MOSCXT @@ -36,23 +36,14 @@ #define SAMA_H64MX_H32MX_RATIO 2 /* - * SPI driver system settings. + * SDMMC driver system settings. */ -#define SAMA_SPI_USE_SPI0 FALSE -#define SAMA_SPI_USE_SPI1 FALSE -#define SAMA_SPI_USE_FLEXCOM0 FALSE -#define SAMA_SPI_USE_FLEXCOM1 FALSE -#define SAMA_SPI_USE_FLEXCOM2 FALSE -#define SAMA_SPI_USE_FLEXCOM3 FALSE -#define SAMA_SPI_USE_FLEXCOM4 FALSE -#define SAMA_SPI_SPI0_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_SPI1_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY 4 -#define SAMA_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") +#define HAL_USE_SDMMC FALSE + +/* + * SECUMOD driver system settings. + */ +#define HAL_USE_SECUMOD FALSE /* * SERIAL driver system settings. @@ -62,7 +53,6 @@ #define SAMA_SERIAL_USE_UART2 FALSE #define SAMA_SERIAL_USE_UART3 FALSE #define SAMA_SERIAL_USE_UART4 FALSE -#define SAMA_SERIAL_USE_UART5 FALSE #define SAMA_SERIAL_USE_FLEXCOM0 FALSE #define SAMA_SERIAL_USE_FLEXCOM1 FALSE #define SAMA_SERIAL_USE_FLEXCOM2 FALSE @@ -79,6 +69,33 @@ #define SAMA_SERIAL_FLEXCOM3_IRQ_PRIORITY 4 #define SAMA_SERIAL_FLEXCOM4_IRQ_PRIORITY 4 +/* + * SPI driver system settings. + */ +#define SAMA_SPI_USE_SPI0 FALSE +#define SAMA_SPI_USE_SPI1 FALSE +#define SAMA_SPI_USE_FLEXCOM0 FALSE +#define SAMA_SPI_USE_FLEXCOM1 FALSE +#define SAMA_SPI_USE_FLEXCOM2 FALSE +#define SAMA_SPI_USE_FLEXCOM3 FALSE +#define SAMA_SPI_USE_FLEXCOM4 FALSE +#define SAMA_SPI_SPI0_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_SPI1_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") +#define SPI_SELECT_MODE SPI_SELECT_MODE_NONE + +/* + * ST driver settings. + */ +#define SAMA_ST_USE_PIT FALSE +#define SAMA_ST_USE_TC0 FALSE +#define SAMA_ST_USE_TC1 TRUE + /* * TC driver system settings. */ diff --git a/testhal/ATSAMA5D2/MATRIX/readme.txt b/testhal/ATSAMA5D2/MATRIX/readme.txt index cc6e568f6..54fbf102d 100755 --- a/testhal/ATSAMA5D2/MATRIX/readme.txt +++ b/testhal/ATSAMA5D2/MATRIX/readme.txt @@ -7,7 +7,8 @@ The demo targets a generic ARM Cortex-A5 device without HAL support. ** The Demo ** - +Demo configures security zone on SRAM0. Zones are tested with two writing +tentatives. ** Build Procedure ** ** Notes ** -- cgit v1.2.3