From ee3a27ccf98d6fee03a64d4e70f57746fdb5a2f7 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Mon, 1 Sep 2014 09:32:56 +0000
Subject: Fixed RTC on STM32F0xx.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7228 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c        | 4 ++++
 os/hal/ports/STM32/STM32F0xx/hal_lld.h        | 6 ++++++
 os/hal/ports/STM32/STM32F0xx/platform.mk      | 2 ++
 os/hal/ports/STM32/STM32F0xx/stm32_registry.h | 2 +-
 4 files changed, 13 insertions(+), 1 deletion(-)

(limited to 'os')

diff --git a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
index 5d38c635c..efe843f64 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
+++ b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
@@ -333,6 +333,7 @@ void rtc_lld_set_alarm(RTCDriver *rtcp,
       rtcp->rtc->CR &= ~RTC_CR_ALRAE;
     }
   }
+#if STM32_RTC_NUM_ALARMS > 1
   else {
     if (alarmspec != NULL) {
       rtcp->rtc->CR &= ~RTC_CR_ALRBE;
@@ -347,6 +348,7 @@ void rtc_lld_set_alarm(RTCDriver *rtcp,
       rtcp->rtc->CR &= ~RTC_CR_ALRBE;
     }
   }
+#endif /* STM32_RTC_NUM_ALARMS > 1 */
 }
 
 /**
@@ -363,8 +365,10 @@ void rtc_lld_get_alarm(RTCDriver *rtcp,
                        RTCAlarm *alarmspec) {
   if (alarm == 1)
     alarmspec->alrmr = rtcp->rtc->ALRMAR;
+#if STM32_RTC_NUM_ALARMS > 1
   else
     alarmspec->alrmr = rtcp->rtc->ALRMBR;
+#endif /* STM32_RTC_NUM_ALARMS > 1 */
 }
 #endif /* STM32_RTC_NUM_ALARMS > 0 */
 
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
index 71def5017..2bb9b3fcc 100644
--- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
@@ -763,6 +763,12 @@
 #define STM32_FLASHBITS             0x00000011
 #endif
 
+/*
+ * For compatibility with driver assuming a specific PPRE clock.
+ */
+#define STM32_PCLK1 STM32_PCLK
+#define STM32_PCLK2 STM32_PCLK
+
 /*===========================================================================*/
 /* Driver data structures and types.                                         */
 /*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32F0xx/platform.mk b/os/hal/ports/STM32/STM32F0xx/platform.mk
index 3c4d9baf5..bb42d637e 100644
--- a/os/hal/ports/STM32/STM32F0xx/platform.mk
+++ b/os/hal/ports/STM32/STM32F0xx/platform.mk
@@ -7,6 +7,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/ext_lld.c \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c \
+              ${CHIBIOS}/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
@@ -22,6 +23,7 @@ PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
               ${CHIBIOS}/os/hal/ports/STM32/LLD \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/GPIOv2 \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv2 \
+              ${CHIBIOS}/os/hal/ports/STM32/LLD/RTCv2 \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv2 \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1 \
               ${CHIBIOS}/os/hal/ports/STM32/LLD/USARTv2 \
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index a00ff3960..8efe059cf 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -84,7 +84,7 @@
 /* RTC attributes.*/
 #define STM32_HAS_RTC                       TRUE
 #define STM32_RTC_HAS_SUBSECONDS            TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE
+#define STM32_RTC_HAS_PERIODIC_WAKEUPS      FALSE
 #define STM32_RTC_NUM_ALARMS                1
 #define STM32_RTC_HAS_INTERRUPTS            FALSE
 
-- 
cgit v1.2.3