From ec1bf1b741390d7b6128382971b504a3ee9b7111 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Sun, 13 Nov 2011 10:55:33 +0000
Subject: STM32F4xx SPI driver working.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3490 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32/spi_lld.c       | 12 +++++++++++-
 os/hal/platforms/STM32F1xx/stm32_dma.h |  1 +
 os/hal/platforms/STM32F4xx/stm32_dma.h |  2 +-
 os/hal/platforms/STM32L1xx/stm32_dma.h |  1 +
 4 files changed, 14 insertions(+), 2 deletions(-)

(limited to 'os')

diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c
index 1511547d5..2610031b6 100644
--- a/os/hal/platforms/STM32/spi_lld.c
+++ b/os/hal/platforms/STM32/spi_lld.c
@@ -106,9 +106,11 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) {
   (void)flags;
 #endif
 
-  /* Stop everything.*/
+  /* Stop everything. The status of the TX DMA is cleared here because its
+     handler is only invoked in case of error.*/
   dmaStreamDisable(spip->dmatx);
   dmaStreamDisable(spip->dmarx);
+  dmaStreamClearInterrupt(spip->dmatx);
 
   /* Portable SPI ISR code defined in the high level driver, note, it is
      a macro.*/
@@ -161,10 +163,12 @@ void spi_lld_init(void) {
                     STM32_DMA_CR_PL(STM32_SPI_SPI1_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
                     STM32_DMA_CR_TCIE |
+                    STM32_DMA_CR_DMEIE |
                     STM32_DMA_CR_TEIE;
   SPID1.txdmamode = STM32_DMA_CR_CHSEL(SPI1_TX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI1_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_M2P |
+                    STM32_DMA_CR_DMEIE |
                     STM32_DMA_CR_TEIE;
 #endif
 
@@ -177,10 +181,12 @@ void spi_lld_init(void) {
                     STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
                     STM32_DMA_CR_TCIE |
+                    STM32_DMA_CR_DMEIE |
                     STM32_DMA_CR_TEIE;
   SPID2.txdmamode = STM32_DMA_CR_CHSEL(SPI2_TX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_M2P |
+                    STM32_DMA_CR_DMEIE |
                     STM32_DMA_CR_TEIE;
 #endif
 
@@ -193,10 +199,12 @@ void spi_lld_init(void) {
                     STM32_DMA_CR_PL(STM32_SPI_SPI3_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
                     STM32_DMA_CR_TCIE |
+                    STM32_DMA_CR_DMEIE |
                     STM32_DMA_CR_TEIE;
   SPID3.txdmamode = STM32_DMA_CR_CHSEL(SPI3_TX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI3_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_M2P |
+                    STM32_DMA_CR_DMEIE |
                     STM32_DMA_CR_TEIE;
 #endif
 }
@@ -360,6 +368,7 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
   dmaStreamSetMemory0(spip->dmarx, &dummyrx);
   dmaStreamSetTransactionSize(spip->dmarx, n);
   dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_EN);
+
   dmaStreamSetMemory0(spip->dmatx, &dummytx);
   dmaStreamSetTransactionSize(spip->dmatx, n);
   dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_EN);
@@ -411,6 +420,7 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
   dmaStreamSetMemory0(spip->dmarx, &dummyrx);
   dmaStreamSetTransactionSize(spip->dmarx, n);
   dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_EN);
+
   dmaStreamSetMemory0(spip->dmatx, txbuf);
   dmaStreamSetTransactionSize(spip->dmatx, n);
   dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC |
diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.h b/os/hal/platforms/STM32F1xx/stm32_dma.h
index 4469bef67..fdfd0bc7b 100644
--- a/os/hal/platforms/STM32F1xx/stm32_dma.h
+++ b/os/hal/platforms/STM32F1xx/stm32_dma.h
@@ -153,6 +153,7 @@
  * @name    CR register constants only found in enhanced DMA
  * @{
  */
+#define STM32_DMA_CR_DMEIE          0   /**< @brief Ignored by normal DMA.  */
 #define STM32_DMA_CR_CHSEL_MASK     0   /**< @brief Ignored by normal DMA.  */
 #define STM32_DMA_CR_CHSEL(n)       0   /**< @brief Ignored by normal DMA.  */
 /** @} */
diff --git a/os/hal/platforms/STM32F4xx/stm32_dma.h b/os/hal/platforms/STM32F4xx/stm32_dma.h
index d07a9dbe9..4b3302f39 100644
--- a/os/hal/platforms/STM32F4xx/stm32_dma.h
+++ b/os/hal/platforms/STM32F4xx/stm32_dma.h
@@ -171,7 +171,7 @@
 /** @} */
 
 /**
- * @name    FCR register constants only found in STM32F2xx
+ * @name    FCR register constants only found in STM32F2xx/STM32F4xx
  * @{
  */
 #define STM32_DMA_FCR_FEIE          DMA_SxFCR_FEIE
diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.h b/os/hal/platforms/STM32L1xx/stm32_dma.h
index e22d99f2b..0d80a39e7 100644
--- a/os/hal/platforms/STM32L1xx/stm32_dma.h
+++ b/os/hal/platforms/STM32L1xx/stm32_dma.h
@@ -144,6 +144,7 @@
  * @name    CR register constants only found in enhanced DMA
  * @{
  */
+#define STM32_DMA_CR_DMEIE          0   /**< @brief Ignored by normal DMA.  */
 #define STM32_DMA_CR_CHSEL_MASK     0   /**< @brief Ignored by normal DMA.  */
 #define STM32_DMA_CR_CHSEL(n)       0   /**< @brief Ignored by normal DMA.  */
 /** @} */
-- 
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