From dd1e643f707d176d73549a9f7d060029b8838109 Mon Sep 17 00:00:00 2001 From: isiora Date: Tue, 27 Feb 2018 00:22:09 +0000 Subject: Added option to enable L2. git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11579 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'os') diff --git a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c index 0e1bfce8d..e99233094 100644 --- a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c +++ b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c @@ -362,6 +362,19 @@ void __core_init(void) { if ((pm & SCTLR_C_Msk) == 0) { __set_SCTLR(pm | SCTLR_C_Msk); } + +#if defined(ARM_ENABLE_L2CC) +#if ARM_ENABLE_L2CC + /* High SRAM to L2CC.*/ + SFR->SFR_L2CC_HRAMC = 0x1; + + /* Invalidate and enable L2 cache.*/ + L2C_InvAllByWay(); + L2C_Enable(); + __DSB(); + __ISB(); +#endif +#endif } /** @} */ -- cgit v1.2.3