From d6b07697901d5b87354f38ef694a64ec9520e734 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 17 Oct 2018 12:33:09 +0000 Subject: OCTOSPI driver initial setup. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12367 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/LLD/OCTOSPIv1/driver.mk | 9 + os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c | 347 ++++++++++++++++++++++++ os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h | 258 ++++++++++++++++++ os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c | 4 +- os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.h | 8 +- 5 files changed, 622 insertions(+), 4 deletions(-) create mode 100644 os/hal/ports/STM32/LLD/OCTOSPIv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c create mode 100644 os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h (limited to 'os') diff --git a/os/hal/ports/STM32/LLD/OCTOSPIv1/driver.mk b/os/hal/ports/STM32/LLD/OCTOSPIv1/driver.mk new file mode 100644 index 000000000..987220b5a --- /dev/null +++ b/os/hal/ports/STM32/LLD/OCTOSPIv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_WSPI TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c +endif +else +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c +endif + +PLATFORMINC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OCTOSPIv1 diff --git a/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c b/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c new file mode 100644 index 000000000..209ac1109 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.c @@ -0,0 +1,347 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file OCTOSPIv1/hal_wspi_lld.c + * @brief STM32 WSPI subsystem low level driver source. + * + * @addtogroup WSPI + * @{ + */ + +#include "hal.h" + +#if (HAL_USE_WSPI == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief OCTOSPI1 driver identifier.*/ +#if STM32_WSPI_USE_OCTOSPI1 || defined(__DOXYGEN__) +WSPIDriver WSPID1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Shared service routine. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * @param[in] flags pre-shifted content of the ISR register + */ +static void wspi_lld_serve_dma_interrupt(WSPIDriver *wspip, uint32_t flags) { + + (void)wspip; + (void)flags; + + /* DMA errors handling.*/ +#if defined(STM32_WSPI_DMA_ERROR_HOOK) + if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) { + STM32_WSPI_DMA_ERROR_HOOK(wspip); + } +#endif +} + +/** + * @brief Shared service routine. + * + * @param[in] wspip pointer to the @p WSPIDriver object + */ +static void wspi_lld_serve_interrupt(WSPIDriver *wspip) { + + /* Portable WSPI ISR code defined in the high level driver, note, it is + a macro.*/ + _wspi_isr_code(wspip); + + /* Stop everything, we need to give DMA enough time to complete the ongoing + operation. Race condition hidden here.*/ + while (dmaStreamGetTransactionSize(wspip->dma) > 0U) + ; + dmaStreamDisable(wspip->dma); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if STM32_WSPI_USE_OCTOSPI1 || defined(__DOXYGEN__) +#if !defined(STM32_OCTOSPI1_SUPPRESS_ISR) +#if !defined(STM32_OCTOSPI1_HANDLER) +#error "STM32_OCTOSPI1_HANDLER not defined" +#endif +/** + * @brief STM32_OCTOSPI1_HANDLER interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(STM32_OCTOSPI1_HANDLER) { + + OSAL_IRQ_PROLOGUE(); + + OCTOSPI->FCR = OCTOSPI_FCR_CTEF | OCTOSPI_FCR_CTCF | + OCTOSPI_FCR_CSMF | OCTOSPI_FCR_CTOF; + + wspi_lld_serve_interrupt(&WSPID1); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* !defined(STM32_OCTOSPI1_SUPPRESS_ISR) */ +#endif /* STM32_WSPI_USE_OCTOSPI1 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level WSPI driver initialization. + * + * @notapi + */ +void wspi_lld_init(void) { + +#if STM32_WSPI_USE_OCTOSPI1 + wspiObjectInit(&WSPID1); + WSPID1.ospi = OCTOSPI; + WSPID1.dma = STM32_DMA_STREAM(STM32_WSPI_OCTOSPI1_DMA_STREAM); + WSPID1.dmamode = STM32_DMA_CR_CHSEL(OCTOSPI1_DMA_CHANNEL) | + STM32_DMA_CR_PL(STM32_WSPI_OCTOSPI1_DMA_PRIORITY) | + STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE | + STM32_DMA_CR_MINC | + STM32_DMA_CR_DMEIE | + STM32_DMA_CR_TEIE; + nvicEnableVector(STM32_OCTOSPI1_NUMBER, STM32_WSPI_OCTOSPI1_IRQ_PRIORITY); +#endif +} + +/** + * @brief Configures and activates the WSPI peripheral. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * + * @notapi + */ +void wspi_lld_start(WSPIDriver *wspip) { + + /* If in stopped state then full initialization.*/ + if (wspip->state == WSPI_STOP) { +#if STM32_WSPI_USE_OCTOSPI1 + if (&WSPID1 == wspip) { + bool b = dmaStreamAllocate(wspip->dma, + STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY, + (stm32_dmaisr_t)wspi_lld_serve_dma_interrupt, + (void *)wspip); + osalDbgAssert(!b, "stream already allocated"); + rccEnableOCTOSPI1(true); + } +#endif + + /* Common initializations.*/ + dmaStreamSetPeripheral(wspip->dma, &wspip->ospi->DR); + } + + /* WSPI setup and enable.*/ + wspip->ospi->DCR = wspip->config->dcr; + wspip->ospi->CR = ((STM32_WSPI_OCTOSPI1_PRESCALER_VALUE - 1U) << 24U) | + OCTOSPI_CR_TCIE | OCTOSPI_CR_DMAEN | OCTOSPI_CR_EN; + wspip->ospi->FCR = OCTOSPI_FCR_CTEF | OCTOSPI_FCR_CTCF | + OCTOSPI_FCR_CSMF | OCTOSPI_FCR_CTOF; +} + +/** + * @brief Deactivates the WSPI peripheral. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * + * @notapi + */ +void wspi_lld_stop(WSPIDriver *wspip) { + + /* If in ready state then disables the OCTOSPI clock.*/ + if (wspip->state == WSPI_READY) { + + /* WSPI disable.*/ + wspip->ospi->CR = 0U; + + /* Releasing the DMA.*/ + dmaStreamRelease(wspip->dma); + + /* Stopping involved clocks.*/ +#if STM32_WSPI_USE_OCTOSPI1 + if (&WSPID1 == wspip) { + rccDisableOCTOSPI1(); + } +#endif + } +} + +/** + * @brief Sends a command without data phase. + * @post At the end of the operation the configured callback is invoked. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * @param[in] cmdp pointer to the command descriptor + * + * @notapi + */ +void wspi_lld_command(WSPIDriver *wspip, const wspi_command_t *cmdp) { + +#if STM32_USE_STM32_D1_WORKAROUND == TRUE + /* If it is a command without address and alternate phases then the command + is sent as an alternate byte, the command phase is suppressed.*/ + if ((cmdp->cfg & (WSPI_CFG_ADDR_MODE_MASK | WSPI_CFG_ALT_MODE_MASK)) == 0U) { + /* The command mode field is copied in the alternate mode field. All + other fields are not used in this scenario.*/ + wspip->ospi->DLR = 0U; + wspip->ospi->ABR = cmdp->cmd; + wspip->ospi->CCR = (cmdp->cfg & WSPI_CFG_CMD_MODE_MASK) << 6U; + return; + } +#endif + wspip->ospi->DLR = 0U; + wspip->ospi->ABR = cmdp->alt; + wspip->ospi->CCR = cmdp->cmd | cmdp->cfg; + if ((cmdp->cfg & WSPI_CFG_ADDR_MODE_MASK) != WSPI_CFG_ADDR_MODE_NONE) { + wspip->ospi->AR = cmdp->addr; + } +} + +/** + * @brief Sends a command with data over the WSPI bus. + * @post At the end of the operation the configured callback is invoked. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * @param[in] cmdp pointer to the command descriptor + * @param[in] n number of bytes to send + * @param[in] txbuf the pointer to the transmit buffer + * + * @notapi + */ +void wspi_lld_send(WSPIDriver *wspip, const wspi_command_t *cmdp, + size_t n, const uint8_t *txbuf) { + + dmaStreamSetMemory0(wspip->dma, txbuf); + dmaStreamSetTransactionSize(wspip->dma, n); + dmaStreamSetMode(wspip->dma, wspip->dmamode | STM32_DMA_CR_DIR_M2P); + + wspip->ospi->DLR = n - 1; + wspip->ospi->ABR = cmdp->alt; + wspip->ospi->CCR = cmdp->cmd | cmdp->cfg; + if ((cmdp->cfg & WSPI_CFG_ADDR_MODE_MASK) != WSPI_CFG_ADDR_MODE_NONE) { + wspip->ospi->AR = cmdp->addr; + } + + dmaStreamEnable(wspip->dma); +} + +/** + * @brief Sends a command then receives data over the WSPI bus. + * @post At the end of the operation the configured callback is invoked. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * @param[in] cmdp pointer to the command descriptor + * @param[in] n number of bytes to send + * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi + */ +void wspi_lld_receive(WSPIDriver *wspip, const wspi_command_t *cmdp, + size_t n, uint8_t *rxbuf) { + + dmaStreamSetMemory0(wspip->dma, rxbuf); + dmaStreamSetTransactionSize(wspip->dma, n); + dmaStreamSetMode(wspip->dma, wspip->dmamode | STM32_DMA_CR_DIR_P2M); + + wspip->ospi->DLR = n - 1; + wspip->ospi->ABR = cmdp->alt; + wspip->ospi->CCR = cmdp->cmd | cmdp->cfg | + OCTOSPI_CCR_DUMMY_CYCLES(cmdp->dummy) | + OCTOSPI_CCR_FMODE_0; + if ((cmdp->cfg & WSPI_CFG_ADDR_MODE_MASK) != WSPI_CFG_ADDR_MODE_NONE) { + wspip->ospi->AR = cmdp->addr; + } + + dmaStreamEnable(wspip->dma); +} + +#if (WSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__) +/** + * @brief Maps in memory space a WSPI flash device. + * @pre The memory flash device must be initialized appropriately + * before mapping it in memory space. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * @param[in] cmdp pointer to the command descriptor + * @param[out] addrp pointer to the memory start address of the mapped + * flash or @p NULL + * + * @notapi + */ +void wspi_lld_map_flash(WSPIDriver *wspip, + const wspi_command_t *cmdp, + uint8_t **addrp) { + + /* Disabling the DMA request while in memory mapped mode.*/ + wspip->ospi->CR &= ~OCTOSPI_CR_DMAEN; + + /* Starting memory mapped mode using the passed parameters.*/ + wspip->ospi->DLR = 0; + wspip->ospi->ABR = 0; + wspip->ospi->AR = 0; + wspip->ospi->CCR = cmdp->cmd | cmdp->cfg | + OCTOSPI_CCR_FMODE_1 | OCTOSPI_CCR_FMODE_0; + + /* Mapped flash absolute base address.*/ + if (addrp != NULL) { + *addrp = (uint8_t *)0x90000000; + } +} + +/** + * @brief Unmaps from memory space a WSPI flash device. + * @post The memory flash device must be re-initialized for normal + * commands exchange. + * + * @param[in] wspip pointer to the @p WSPIDriver object + * + * @notapi + */ +void wspi_lld_unmap_flash(WSPIDriver *wspip) { + + /* Aborting memory mapped mode.*/ + wspip->ospi->CR |= OCTOSPI_CR_ABORT; + while ((wspip->ospi->CR & OCTOSPI_CR_ABORT) != 0U) { + } + + /* Re-enabling DMA request, we are going back to indirect mode.*/ + wspip->ospi->CR |= OCTOSPI_CR_DMAEN; +} +#endif /* WSPI_SUPPORTS_MEMMAP == TRUE */ + +#endif /* HAL_USE_WSPI */ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h b/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h new file mode 100644 index 000000000..7642dd71c --- /dev/null +++ b/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h @@ -0,0 +1,258 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file OCTOSPIv1/hal_wspi_lld.h + * @brief STM32 WSPI subsystem low level driver header. + * + * @addtogroup WSPI + * @{ + */ + +#ifndef HAL_WSPI_LLD_H +#define HAL_WSPI_LLD_H + +#if (HAL_USE_WSPI == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name WSPI implementation capabilities + * @{ + */ +#define WSPI_SUPPORTS_MEMMAP TRUE +#define WSPI_DEFAULT_CFG_MASKS TRUE +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief WSPID1 driver enable switch. + * @details If set to @p TRUE the support for OCTOSPI1 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_WSPI_USE_OCTOSPI1) || defined(__DOXYGEN__) +#define STM32_WSPI_USE_OCTOSPI1 FALSE +#endif + +/** + * @brief OCTOSPI1 prescaler setting. + * @note This is the prescaler divider value 1..256. The maximum frequency + * varies depending on the STM32 model and operating conditions, + * find the details in the data sheet. + */ +#if !defined(STM32_WSPI_OCTOSPI1_PRESCALER_VALUE) || defined(__DOXYGEN__) +#define STM32_WSPI_OCTOSPI1_PRESCALER_VALUE 1 +#endif + +/** + * @brief OCTOSPI1 interrupt priority level setting. + */ +#if !defined(STM32_WSPI_OCTOSPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_WSPI_OCTOSPI1_IRQ_PRIORITY 10 +#endif + +/** + * @brief OCTOSPI1 DMA priority (0..3|lowest..highest). + */ +#if !defined(STM32_WSPI_OCTOSPI1_DMA_PRIORITY) || defined(__DOXYGEN__) +#define STM32_WSPI_OCTOSPI1_DMA_PRIORITY 1 +#endif + +/** + * @brief OCTOSPI1 DMA interrupt priority level setting. + */ +#if !defined(STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY 10 +#endif + +/** + * @brief OCTOSPI DMA error hook. + */ +#if !defined(STM32_WSPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__) +#define STM32_WSPI_DMA_ERROR_HOOK(qspip) osalSysHalt("DMA failure") +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !defined(STM32_HAS_OCTOSPI1) +#define STM32_HAS_OCTOSPI1 FALSE +#endif + +#if STM32_WSPI_USE_OCTOSPI1 && !STM32_HAS_OCTOSPI1 +#error "OCTOSPI1 not present in the selected device" +#endif + +#if !STM32_WSPI_USE_OCTOSPI1 +#error "WSPI driver activated but no OCTOSPI peripheral assigned" +#endif + +/* Check on OCTOSPI prescaler setting.*/ +#if (STM32_WSPI_OCTOSPI1_PRESCALER_VALUE < 1) || \ + (STM32_WSPI_OCTOSPI1_PRESCALER_VALUE > 256) +#error "STM32_WSPI_OCTOSPI1_PRESCALER_VALUE not within 1..256" +#endif + +/* Check on IRQ priorities.*/ +#if STM32_WSPI_USE_OCTOSPI1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to OCTOSPI1" +#endif + +#if STM32_WSPI_USE_OCTOSPI1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to OCTOSPI1 DMA" +#endif + +/* Check on the presence of the DMA chennels settings in mcuconf.h.*/ +#if STM32_WSPI_USE_OCTOSPI1 && !defined(STM32_WSPI_OCTOSPI1_DMA_CHANNEL) +#error "OCTOSPI1 DMA channel not defined" +#endif + +/* Check on the validity of the assigned DMA channels.*/ +#if STM32_WSPI_USE_OCTOSPI1 && \ + !STM32_DMA_IS_VALID_CHANNEL(STM32_OCTOSPI1_DMA_MSK) +#error "invalid DMA stream associated to OCTOSPI1" +#endif + +/* Check on DMA channels priority.*/ +#if STM32_WSPI_USE_OCTOSPI1 && \ + !STM32_DMA_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI1_DMA_PRIORITY) +#error "Invalid DMA priority assigned to OCTOSPI1" +#endif + +#if !defined(STM32_DMA_REQUIRED) +#define STM32_DMA_REQUIRED +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Driver configuration structure. + */ +struct hal_wspi_config { + /** + * @brief Operation complete callback or @p NULL. + */ + wspicallback_t end_cb; + /* End of the mandatory fields.*/ + /** + * @brief DCR1 register initialization data. + */ + uint32_t dcr1; + /** + * @brief DCR2 register initialization data. + */ + uint32_t dcr2; + /** + * @brief DCR3 register initialization data. + */ + uint32_t dcr3; +}; + +/** + * @brief Structure representing an WSPI driver. + */ +struct hal_wspi_driver { + /** + * @brief Driver state. + */ + wspistate_t state; + /** + * @brief Current configuration data. + */ + const WSPIConfig *config; +#if (WSPI_USE_WAIT == TRUE) || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif /* WSPI_USE_WAIT */ +#if (WSPI_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the peripheral. + */ + mutex_t mutex; +#endif /* WSPI_USE_MUTUAL_EXCLUSION */ +#if defined(WSPI_DRIVER_EXT_FIELDS) + WSPI_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the OCTOSPIx registers block. + */ + OCTOSPI_TypeDef *ospi; + /** + * @brief OCTOSPI DMA stream. + */ + const stm32_dma_stream_t *dma; + /** + * @brief OCTOSPI DMA mode bit mask. + */ + uint32_t dmamode; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if (STM32_WSPI_USE_OCTOSPI1 == TRUE) && !defined(__DOXYGEN__) +extern WSPIDriver WSPID1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void wspi_lld_init(void); + void wspi_lld_start(WSPIDriver *wspip); + void wspi_lld_stop(WSPIDriver *wspip); + void wspi_lld_command(WSPIDriver *wspip, const wspi_command_t *cmdp); + void wspi_lld_send(WSPIDriver *wspip, const wspi_command_t *cmdp, + size_t n, const uint8_t *txbuf); + void wspi_lld_receive(WSPIDriver *wspip, const wspi_command_t *cmdp, + size_t n, uint8_t *rxbuf); +#if WSPI_SUPPORTS_MEMMAP == TRUE + void wspi_lld_map_flash(WSPIDriver *wspip, + const wspi_command_t *cmdp, + uint8_t **addrp); + void wspi_lld_unmap_flash(WSPIDriver *wspip); +#endif +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_WSPI */ + +#endif /* HAL_WSPI_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c index 3d6561ff6..5ef7b7f62 100644 --- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c +++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c @@ -15,8 +15,8 @@ */ /** - * @file hal_wspi_lld.c - * @brief PLATFORM WSPI subsystem low level driver source. + * @file QUADSPIv1//hal_wspi_lld.c + * @brief STM32 WSPI subsystem low level driver source. * * @addtogroup WSPI * @{ diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.h b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.h index ce58a6945..4f7f913ef 100644 --- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.h +++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.h @@ -15,8 +15,8 @@ */ /** - * @file hal_wspi_lld.h - * @brief PLATFORM WSPI subsystem low level driver header. + * @file QUADSPIv1/hal_wspi_lld.h + * @brief STM32 WSPI subsystem low level driver header. * * @addtogroup WSPI * @{ @@ -193,6 +193,10 @@ /* Derived constants and error checks. */ /*===========================================================================*/ +#if !defined(STM32_HAS_QUADSPI1) +#define STM32_HAS_QUADSPI1 FALSE +#endif + #if STM32_WSPI_USE_QUADSPI1 && !STM32_HAS_QUADSPI1 #error "QUADSPI1 not present in the selected device" #endif -- cgit v1.2.3