From c3c4b3af583f8da32b34932950f9eb056b41b3da Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Mon, 11 Sep 2017 19:36:26 +0000 Subject: Fixed GPIO port index calculation. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10573 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c | 4 ++-- os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c | 4 ++-- os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'os') diff --git a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c index 1acd4e5f1..b112a9e07 100644 --- a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c @@ -224,7 +224,7 @@ void _pal_lld_enablepadevent(ioportid_t port, /* Port index is obtained assuming that GPIO ports are placed at regular 0x400 intervals in memory space. So far this is true for all devices.*/ - portidx = ((uint32_t)port >> 10U) & 0xFU; + portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; /* Port selection in SYSCFG.*/ AFIO->EXTICR[cridx] = (AFIO->EXTICR[cridx] & crmask) | (portidx << croff); @@ -272,7 +272,7 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) { /* Port index is obtained assuming that GPIO ports are placed at regular 0x400 intervals in memory space. So far this is true for all devices.*/ - portidx = ((uint32_t)port >> 10U) & 0xFU; + portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; crport = (AFIO->EXTICR[cridx] >> croff) & 0xFU; diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c index dc0fd71c9..2d9bca949 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c @@ -253,7 +253,7 @@ void _pal_lld_enablepadevent(ioportid_t port, /* Port index is obtained assuming that GPIO ports are placed at regular 0x400 intervals in memory space. So far this is true for all devices.*/ - portidx = ((uint32_t)port >> 10U) & 0xFU; + portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; /* Port selection in SYSCFG.*/ SYSCFG->EXTICR[cridx] = (SYSCFG->EXTICR[cridx] & crmask) | (portidx << croff); @@ -301,7 +301,7 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) { /* Port index is obtained assuming that GPIO ports are placed at regular 0x400 intervals in memory space. So far this is true for all devices.*/ - portidx = ((uint32_t)port >> 10U) & 0xFU; + portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; crport = (SYSCFG->EXTICR[cridx] >> croff) & 0xFU; diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c index 018f85d7e..a7d91cd29 100644 --- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c @@ -249,7 +249,7 @@ void _pal_lld_enablepadevent(ioportid_t port, /* Port index is obtained assuming that GPIO ports are placed at regular 0x400 intervals in memory space. So far this is true for all devices.*/ - portidx = ((uint32_t)port >> 10U) & 0xFU; + portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; /* Port selection in SYSCFG.*/ SYSCFG->EXTICR[cridx] = (SYSCFG->EXTICR[cridx] & crmask) | (portidx << croff); @@ -297,7 +297,7 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) { /* Port index is obtained assuming that GPIO ports are placed at regular 0x400 intervals in memory space. So far this is true for all devices.*/ - portidx = ((uint32_t)port >> 10U) & 0xFU; + portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; crport = (SYSCFG->EXTICR[cridx] >> croff) & 0xFU; -- cgit v1.2.3