From c12c9fc11ceb64ee99bf10a7661654ea278ff250 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 May 2011 19:37:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2938 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/sdc_lld.c | 77 +++++----------------------------------- 1 file changed, 9 insertions(+), 68 deletions(-) (limited to 'os') diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c index 907651020..7c7265b94 100644 --- a/os/hal/platforms/STM32/sdc_lld.c +++ b/os/hal/platforms/STM32/sdc_lld.c @@ -71,7 +71,7 @@ CH_IRQ_HANDLER(SDIO_IRQHandler) { chSysUnlockFromIsr(); /* Disables the source but the status flags are not reset because the - read/write function need to check them.*/ + read/write functions need to check them.*/ SDIO->MASK = 0; CH_IRQ_EPILOGUE(); @@ -336,6 +336,13 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, uint8_t *buf, uint32_t n) { uint32_t resp[1]; + /* Prepares the DMA channel for reading.*/ + dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4], + (n * SDC_BLOCK_SIZE) / sizeof (uint32_t), buf, + (STM32_SDC_SDIO_DMA_PRIORITY << 12) | + DMA_CCR1_PSIZE_1 | DMA_CCR1_MSIZE_1 | + DMA_CCR1_MINC); + /* Setting up data transfer. Options: Card to Controller, Block mode, DMA mode, 512 bytes blocks.*/ SDIO->ICR = 0xFFFFFFFF; @@ -348,21 +355,13 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, SDIO_DCTRL_DTEN; /* DMA channel activation.*/ - /* Prepares the DMA channel for reading.*/ - dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4], - (n * SDC_BLOCK_SIZE) / sizeof (uint32_t), buf, - (STM32_SDC_SDIO_DMA_PRIORITY << 12) | - DMA_CCR1_PSIZE_1 | DMA_CCR1_MSIZE_1 | - DMA_CCR1_EN); + dmaEnableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4); - /* Read multiple blocks command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK, startblk, resp) || (resp[0] & SDC_R1_ERROR_MASK)) goto error; - /* Note the mask is checked before going to sleep because the interrupt - may have occurred before reaching the critical zone.*/ chSysLock(); if (SDIO->MASK != 0) { chDbgAssert(sdcp->thread == NULL, "sdc_lld_read(), #1", "not NULL"); @@ -375,7 +374,6 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, } } else { - SDIO->MASK = 0; if ((SDIO->STA & SDIO_STA_DATAEND) == 0) { chSysUnlock(); goto error; @@ -411,64 +409,7 @@ error: */ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, const uint8_t *buf, uint32_t n) { - uint32_t resp[1]; - - /* Write multiple blocks command.*/ - if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_WRITE_MULTIPLE_BLOCK, - startblk, resp) || - (resp[0] & SDC_R1_ERROR_MASK)) - return TRUE; - - /* Setting up data transfer. - Options: Controller to Card, Block mode, DMA mode, 512 bytes blocks.*/ - SDIO->ICR = 0xFFFFFFFF; - SDIO->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE | - SDIO_MASK_DATAENDIE | SDIO_MASK_TXUNDERRIE | - SDIO_MASK_STBITERRIE; - SDIO->DLEN = n * SDC_BLOCK_SIZE; - SDIO->DCTRL = SDIO_DCTRL_DBLOCKSIZE_3 | SDIO_DCTRL_DBLOCKSIZE_0 | - SDIO_DCTRL_DMAEN | - SDIO_DCTRL_DTEN; - - /* DMA channel activation.*/ - /* Prepares the DMA channel for reading.*/ - dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4], - (n * SDC_BLOCK_SIZE) / sizeof (uint32_t), buf, - (STM32_SDC_SDIO_DMA_PRIORITY << 12) | - DMA_CCR1_PSIZE_1 | DMA_CCR1_MSIZE_1 | - DMA_CCR1_DIR | DMA_CCR1_EN); - - /* Note the mask is checked before going to sleep because the interrupt - may have occurred before reaching the critical zone.*/ - chSysLock(); - if (SDIO->MASK != 0) { - chDbgAssert(sdcp->thread == NULL, "sdc_lld_write(), #1", "not NULL"); - sdcp->thread = chThdSelf(); - chSchGoSleepS(THD_STATE_SUSPENDED); - chDbgAssert(sdcp->thread == NULL, "sdc_lld_write(), #2", "not NULL"); - if (chThdSelf()->p_u.rdymsg != RDY_OK) { - chSysUnlock(); - goto error; - } - } - else { - SDIO->MASK = 0; - if ((SDIO->STA & SDIO_STA_DATAEND) == 0) { - chSysUnlock(); - goto error; - } - } - dmaDisableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4); - SDIO->ICR = 0xFFFFFFFF; - SDIO->DCTRL = 0; - chSysUnlock(); - return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp); -error: - dmaDisableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4); - SDIO->ICR = 0xFFFFFFFF; - SDIO->MASK = 0; - SDIO->DCTRL = 0; return TRUE; } -- cgit v1.2.3