From 9ad1c43e87dea94438382486e1c6fd8285e12148 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 30 Jun 2019 07:38:10 +0000 Subject: Fixed bug #1036. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12856 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h | 23 +++++++++++++++++++++++ os/hal/ports/STM32/STM32L4xx/stm32_rcc.h | 23 +++++++++++++++++++++++ 2 files changed, 46 insertions(+) (limited to 'os') diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h index d88c378f4..cc86599c1 100644 --- a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h @@ -595,6 +595,29 @@ * @api */ #define rccResetI2C3() rccResetAPB1R1(RCC_APB1RSTR1_I2C3RST) + +/** + * @brief Enables the I2C4 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableI2C4(lp) rccEnableAPB1R2(RCC_APB1ENR2_I2C4EN, lp) + +/** + * @brief Disables the I2C4 peripheral clock. + * + * @api + */ +#define rccDisableI2C4() rccDisableAPB1R1(RCC_APB1ENR2_I2C4EN) + +/** + * @brief Resets the I2C4 peripheral. + * + * @api + */ +#define rccResetI2C4() rccResetAPB1R1(RCC_APB1RSTR2_I2C4RST) /** @} */ /** diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h index a48e305f8..48ad74050 100644 --- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h @@ -567,6 +567,29 @@ * @api */ #define rccResetI2C3() rccResetAPB1R1(RCC_APB1RSTR1_I2C3RST) + +/** + * @brief Enables the I2C4 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableI2C4(lp) rccEnableAPB1R2(RCC_APB1ENR2_I2C4EN, lp) + +/** + * @brief Disables the I2C4 peripheral clock. + * + * @api + */ +#define rccDisableI2C4() rccDisableAPB1R1(RCC_APB1ENR2_I2C4EN) + +/** + * @brief Resets the I2C4 peripheral. + * + * @api + */ +#define rccResetI2C4() rccResetAPB1R1(RCC_APB1RSTR2_I2C4RST) /** @} */ /** -- cgit v1.2.3