From 874f246e6f54ee7db66911006e9005ad76b5147b Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 5 Jan 2019 10:45:52 +0000 Subject: New timers added to STM32 GPT, ICU and PWM drivers. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12525 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c | 38 +++++++++ os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h | 43 +++++++++- os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c | 117 +++++++++++++++++++++++++ os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h | 132 ++++++++++++++++++++++++++++- os/hal/ports/STM32/STM32F3xx/stm32_isr.c | 7 +- 5 files changed, 326 insertions(+), 11 deletions(-) (limited to 'os') diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c index cbd7cee57..38ac673ab 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c @@ -94,6 +94,14 @@ ICUDriver ICUD8; ICUDriver ICUD9; #endif +/** + * @brief ICUD15 driver identifier. + * @note The driver ICUD15 allocates the timer TIM15 when enabled. + */ +#if STM32_ICU_USE_TIM15 || defined(__DOXYGEN__) +ICUDriver ICUD15; +#endif + /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ @@ -323,6 +331,12 @@ OSAL_IRQ_HANDLER(STM32_TIM9_HANDLER) { #endif /* !defined(STM32_TIM9_SUPPRESS_ISR) */ #endif /* STM32_ICU_USE_TIM9 */ +#if STM32_ICU_USE_TIM15 || defined(__DOXYGEN__) +#if !defined(STM32_TIM15_SUPPRESS_ISR) +#error "TIM15 ISR not defined by platform" +#endif /* !defined(STM32_TIM15_SUPPRESS_ISR) */ +#endif /* STM32_ICU_USE_TIM15 */ + /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ @@ -375,6 +389,12 @@ void icu_lld_init(void) { icuObjectInit(&ICUD9); ICUD9.tim = STM32_TIM9; #endif + +#if STM32_ICU_USE_TIM15 + /* Driver initialization.*/ + icuObjectInit(&ICUD15); + ICUD15.tim = STM32_TIM15; +#endif } /** @@ -499,6 +519,18 @@ void icu_lld_start(ICUDriver *icup) { #endif } #endif + +#if STM32_ICU_USE_TIM15 + if (&ICUD15 == icup) { + rccEnableTIM15(true); + rccResetTIM15(); +#if defined(STM32_TIM15CLK) + icup->clock = STM32_TIM15CLK; +#else + icup->clock = STM32_TIMCLK2; +#endif + } +#endif } else { /* Driver re-configuration scenario, it must be stopped first.*/ @@ -650,6 +682,12 @@ void icu_lld_stop(ICUDriver *icup) { rccDisableTIM9(); } #endif + +#if STM32_ICU_USE_TIM15 + if (&ICUD15 == icup) { + rccDisableTIM15(); + } +#endif } } diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h index 90c984fc4..0732ba816 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h @@ -104,6 +104,15 @@ #define STM32_ICU_USE_TIM9 FALSE #endif +/** + * @brief ICUD15 driver enable switch. + * @details If set to @p TRUE the support for ICUD15 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_ICU_USE_TIM15) || defined(__DOXYGEN__) +#define STM32_ICU_USE_TIM15 FALSE +#endif + /** * @brief ICUD1 interrupt priority level setting. */ @@ -152,6 +161,13 @@ #if !defined(STM32_ICU_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_ICU_TIM9_IRQ_PRIORITY 7 #endif + +/** + * @brief ICUD15 interrupt priority level setting. + */ +#if !defined(STM32_ICU_TIM15_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_ICU_TIM15_IRQ_PRIORITY 7 +#endif /** @} */ /*===========================================================================*/ @@ -186,6 +202,10 @@ #define STM32_HAS_TIM9 FALSE #endif +#if !defined(STM32_HAS_TIM15) +#define STM32_HAS_TIM15 FALSE +#endif + #if STM32_ICU_USE_TIM1 && !STM32_HAS_TIM1 #error "TIM1 not present in the selected device" #endif @@ -214,10 +234,14 @@ #error "TIM9 not present in the selected device" #endif +#if STM32_ICU_USE_TIM15 && !STM32_HAS_TIM15 +#error "TIM15 not present in the selected device" +#endif + #if !STM32_ICU_USE_TIM1 && !STM32_ICU_USE_TIM2 && \ !STM32_ICU_USE_TIM3 && !STM32_ICU_USE_TIM4 && \ !STM32_ICU_USE_TIM5 && !STM32_ICU_USE_TIM8 && \ - !STM32_ICU_USE_TIM9 + !STM32_ICU_USE_TIM9 && !STM32_ICU_USE_TIM15 #error "ICU driver activated but no TIM peripheral assigned" #endif @@ -278,6 +302,14 @@ #endif #endif +#if STM32_ICU_USE_TIM15 +#if defined(STM32_TIM15_IS_USED) +#error "ICUD15 requires TIM15 but the timer is already used" +#else +#define STM32_TIM15_IS_USED +#endif +#endif + /* IRQ priority checks.*/ #if STM32_ICU_USE_TIM1 && !defined(STM32_TIM1_SUPPRESS_ISR) && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM1_IRQ_PRIORITY) @@ -314,6 +346,11 @@ #error "Invalid IRQ priority assigned to TIM9" #endif +#if STM32_ICU_USE_TIM15 && !defined(STM32_TIM15_SUPPRESS_ISR) && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM15_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM15" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -492,6 +529,10 @@ extern ICUDriver ICUD8; extern ICUDriver ICUD9; #endif +#if STM32_ICU_USE_TIM15 && !defined(__DOXYGEN__) +extern ICUDriver ICUD15; +#endif + #ifdef __cplusplus extern "C" { #endif diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c index 6bf31ebc0..ec36b3dd0 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c @@ -90,6 +90,30 @@ PWMDriver PWMD8; PWMDriver PWMD9; #endif +/** + * @brief PWMD15 driver identifier. + * @note The driver PWMD15 allocates the timer TIM15 when enabled. + */ +#if STM32_PWM_USE_TIM15 || defined(__DOXYGEN__) +PWMDriver PWMD15; +#endif + +/** + * @brief PWMD16 driver identifier. + * @note The driver PWMD16 allocates the timer TIM16 when enabled. + */ +#if STM32_PWM_USE_TIM16 || defined(__DOXYGEN__) +PWMDriver PWMD16; +#endif + +/** + * @brief PWMD17 driver identifier. + * @note The driver PWMD17 allocates the timer TIM17 when enabled. + */ +#if STM32_PWM_USE_TIM17 || defined(__DOXYGEN__) +PWMDriver PWMD17; +#endif + /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ @@ -295,6 +319,24 @@ OSAL_IRQ_HANDLER(STM32_TIM9_HANDLER) { #endif /* !defined(STM32_TIM9_SUPPRESS_ISR) */ #endif /* STM32_PWM_USE_TIM9 */ +#if STM32_PWM_USE_TIM15 || defined(__DOXYGEN__) +#if !defined(STM32_TIM15_SUPPRESS_ISR) +#error "TIM15 ISR not defined by platform" +#endif /* !defined(STM32_TIM15_SUPPRESS_ISR) */ +#endif /* STM32_PWM_USE_TIM15 */ + +#if STM32_PWM_USE_TIM16 || defined(__DOXYGEN__) +#if !defined(STM32_TIM16_SUPPRESS_ISR) +#error "TIM16 ISR not defined by platform" +#endif /* !defined(STM32_TIM16_SUPPRESS_ISR) */ +#endif /* STM32_PWM_USE_TIM16 */ + +#if STM32_PWM_USE_TIM17 || defined(__DOXYGEN__) +#if !defined(STM32_TIM17_SUPPRESS_ISR) +#error "TIM17 ISR not defined by platform" +#endif /* !defined(STM32_TIM17_SUPPRESS_ISR) */ +#endif /* STM32_PWM_USE_TIM17 */ + /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ @@ -354,6 +396,27 @@ void pwm_lld_init(void) { PWMD9.channels = STM32_TIM9_CHANNELS; PWMD9.tim = STM32_TIM9; #endif + +#if STM32_PWM_USE_TIM15 + /* Driver initialization.*/ + pwmObjectInit(&PWMD15); + PWMD15.channels = STM32_TIM15_CHANNELS; + PWMD15.tim = STM32_TIM15; +#endif + +#if STM32_PWM_USE_TIM16 + /* Driver initialization.*/ + pwmObjectInit(&PWMD16); + PWMD16.channels = STM32_TIM16_CHANNELS; + PWMD16.tim = STM32_TIM16; +#endif + +#if STM32_PWM_USE_TIM17 + /* Driver initialization.*/ + pwmObjectInit(&PWMD17); + PWMD17.channels = STM32_TIM17_CHANNELS; + PWMD17.tim = STM32_TIM17; +#endif } /** @@ -478,6 +541,42 @@ void pwm_lld_start(PWMDriver *pwmp) { } #endif +#if STM32_PWM_USE_TIM15 + if (&PWMD15 == pwmp) { + rccEnableTIM15(true); + rccResetTIM15(); +#if defined(STM32_TIM15CLK) + pwmp->clock = STM32_TIM15CLK; +#else + pwmp->clock = STM32_TIMCLK2; +#endif + } +#endif + +#if STM32_PWM_USE_TIM16 + if (&PWMD16 == pwmp) { + rccEnableTIM16(true); + rccResetTIM16(); +#if defined(STM32_TIM16CLK) + pwmp->clock = STM32_TIM16CLK; +#else + pwmp->clock = STM32_TIMCLK2; +#endif + } +#endif + +#if STM32_PWM_USE_TIM17 + if (&PWMD17 == pwmp) { + rccEnableTIM17(true); + rccResetTIM17(); +#if defined(STM32_TIM17CLK) + pwmp->clock = STM32_TIM17CLK; +#else + pwmp->clock = STM32_TIMCLK2; +#endif + } +#endif + /* All channels configured in PWM1 mode with preload enabled and will stay that way until the driver is stopped.*/ pwmp->tim->CCMR1 = STM32_TIM_CCMR1_OC1M(6) | STM32_TIM_CCMR1_OC1PE | @@ -698,6 +797,24 @@ void pwm_lld_stop(PWMDriver *pwmp) { rccDisableTIM9(); } #endif + +#if STM32_PWM_USE_TIM15 + if (&PWMD15 == pwmp) { + rccDisableTIM15(); + } +#endif + +#if STM32_PWM_USE_TIM16 + if (&PWMD16 == pwmp) { + rccDisableTIM16(); + } +#endif + +#if STM32_PWM_USE_TIM17 + if (&PWMD17 == pwmp) { + rccDisableTIM17(); + } +#endif } } diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h index f54aa97c5..63f884ab2 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h @@ -154,6 +154,33 @@ #define STM32_PWM_USE_TIM9 FALSE #endif +/** + * @brief PWMD15 driver enable switch. + * @details If set to @p TRUE the support for PWMD15 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_PWM_USE_TIM15) || defined(__DOXYGEN__) +#define STM32_PWM_USE_TIM15 FALSE +#endif + +/** + * @brief PWMD16 driver enable switch. + * @details If set to @p TRUE the support for PWMD16 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_PWM_USE_TIM16) || defined(__DOXYGEN__) +#define STM32_PWM_USE_TIM16 FALSE +#endif + +/** + * @brief PWMD17 driver enable switch. + * @details If set to @p TRUE the support for PWMD17 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_PWM_USE_TIM17) || defined(__DOXYGEN__) +#define STM32_PWM_USE_TIM17 FALSE +#endif + /** * @brief PWMD1 interrupt priority level setting. */ @@ -202,6 +229,27 @@ #if !defined(STM32_PWM_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_PWM_TIM9_IRQ_PRIORITY 7 #endif + +/** + * @brief PWMD15 interrupt priority level setting. + */ +#if !defined(STM32_PWM_TIM15_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_PWM_TIM15_IRQ_PRIORITY 7 +#endif + +/** + * @brief PWMD16 interrupt priority level setting. + */ +#if !defined(STM32_PWM_TIM16_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_PWM_TIM16_IRQ_PRIORITY 7 +#endif + +/** + * @brief PWMD17 interrupt priority level setting. + */ +#if !defined(STM32_PWM_TIM17_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_PWM_TIM17_IRQ_PRIORITY 7 +#endif /** @} */ /*===========================================================================*/ @@ -236,6 +284,18 @@ #define STM32_HAS_TIM9 FALSE #endif +#if !defined(STM32_HAS_TIM15) +#define STM32_HAS_TIM15 FALSE +#endif + +#if !defined(STM32_HAS_TIM16) +#define STM32_HAS_TIM16 FALSE +#endif + +#if !defined(STM32_HAS_TIM17) +#define STM32_HAS_TIM17 FALSE +#endif + #if STM32_PWM_USE_TIM1 && !STM32_HAS_TIM1 #error "TIM1 not present in the selected device" #endif @@ -264,10 +324,23 @@ #error "TIM9 not present in the selected device" #endif -#if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 && \ - !STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4 && \ - !STM32_PWM_USE_TIM5 && !STM32_PWM_USE_TIM8 && \ - !STM32_PWM_USE_TIM9 +#if STM32_PWM_USE_TIM15 && !STM32_HAS_TIM15 +#error "TIM15 not present in the selected device" +#endif + +#if STM32_PWM_USE_TIM16 && !STM32_HAS_TIM16 +#error "TIM16 not present in the selected device" +#endif + +#if STM32_PWM_USE_TIM17 && !STM32_HAS_TIM17 +#error "TIM17 not present in the selected device" +#endif + +#if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 && \ + !STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4 && \ + !STM32_PWM_USE_TIM5 && !STM32_PWM_USE_TIM8 && \ + !STM32_PWM_USE_TIM9 && !STM32_PWM_USE_TIM15 && \ + !STM32_PWM_USE_TIM16 && !STM32_PWM_USE_TIM17 #error "PWM driver activated but no TIM peripheral assigned" #endif @@ -332,6 +405,30 @@ #endif #endif +#if STM32_PWM_USE_TIM15 +#if defined(STM32_TIM15_IS_USED) +#error "PWMD15 requires TIM15 but the timer is already used" +#else +#define STM32_TIM15_IS_USED +#endif +#endif + +#if STM32_PWM_USE_TIM16 +#if defined(STM32_TIM16_IS_USED) +#error "PWMD16 requires TIM16 but the timer is already used" +#else +#define STM32_TIM16_IS_USED +#endif +#endif + +#if STM32_PWM_USE_TIM17 +#if defined(STM32_TIM17_IS_USED) +#error "PWMD17 requires TIM17 but the timer is already used" +#else +#define STM32_TIM17_IS_USED +#endif +#endif + /* IRQ priority checks.*/ #if STM32_PWM_USE_TIM1 && !defined(STM32_TIM1_SUPPRESS_ISR) && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM1_IRQ_PRIORITY) @@ -368,6 +465,21 @@ #error "Invalid IRQ priority assigned to TIM9" #endif +#if STM32_PWM_USE_TIM15 && !defined(STM32_TIM15_SUPPRESS_ISR) && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM15_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM15" +#endif + +#if STM32_PWM_USE_TIM16 && !defined(STM32_TIM16_SUPPRESS_ISR) && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM16_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM16" +#endif + +#if STM32_PWM_USE_TIM17 && !defined(STM32_TIM17_SUPPRESS_ISR) && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM17_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM17" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -549,6 +661,18 @@ extern PWMDriver PWMD8; extern PWMDriver PWMD9; #endif +#if STM32_PWM_USE_TIM15 && !defined(__DOXYGEN__) +extern PWMDriver PWMD15; +#endif + +#if STM32_PWM_USE_TIM16 && !defined(__DOXYGEN__) +extern PWMDriver PWMD16; +#endif + +#if STM32_PWM_USE_TIM17 && !defined(__DOXYGEN__) +extern PWMDriver PWMD17; +#endif + #ifdef __cplusplus extern "C" { #endif diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_isr.c b/os/hal/ports/STM32/STM32F3xx/stm32_isr.c index 384f0815c..e91ce2508 100644 --- a/os/hal/ports/STM32/STM32F3xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32F3xx/stm32_isr.c @@ -261,9 +261,6 @@ OSAL_IRQ_HANDLER(VectorA4) { #if STM32_ICU_USE_TIM1 icu_lld_serve_interrupt(&ICUD1); #endif -#if STM32_ICU_USE_TIM16 - icu_lld_serve_interrupt(&ICUD16); -#endif #endif #if HAL_USE_PWM #if STM32_PWM_USE_TIM1 @@ -292,9 +289,7 @@ OSAL_IRQ_HANDLER(VectorA8) { #endif #endif #if HAL_USE_ICU -#if STM32_ICU_USE_TIM17 - icu_lld_serve_interrupt(&ICUD17); -#endif + /* Not used by ICU.*/ #endif #if HAL_USE_PWM #if STM32_PWM_USE_TIM17 -- cgit v1.2.3