From 4fb6d9644ed9672096ddf813262f7d869dbfbb93 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 13 Nov 2015 09:52:26 +0000 Subject: Addded pin lock capability to STM32 GPIOv3 driver and board files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8476 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/boards/ST_NUCLEO_L476RG/board.c | 24 +- os/hal/boards/ST_NUCLEO_L476RG/board.h | 981 ++++++---- os/hal/boards/ST_NUCLEO_L476RG/cfg/board.chcfg | 2384 +++++++++++++----------- os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | 42 +- os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c | 6 +- os/hal/ports/STM32/LLD/GPIOv3/pal_lld.h | 15 +- 6 files changed, 1970 insertions(+), 1482 deletions(-) (limited to 'os') diff --git a/os/hal/boards/ST_NUCLEO_L476RG/board.c b/os/hal/boards/ST_NUCLEO_L476RG/board.c index cdd8eafcb..bfd3e8ada 100644 --- a/os/hal/boards/ST_NUCLEO_L476RG/board.c +++ b/os/hal/boards/ST_NUCLEO_L476RG/board.c @@ -25,35 +25,43 @@ const PALConfig pal_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, + VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_ASCR, + VAL_GPIOA_LOCKR}, #endif #if STM32_HAS_GPIOB {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, + VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_ASCR, + VAL_GPIOB_LOCKR}, #endif #if STM32_HAS_GPIOC {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, + VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_ASCR, + VAL_GPIOC_LOCKR}, #endif #if STM32_HAS_GPIOD {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, + VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_ASCR, + VAL_GPIOD_LOCKR}, #endif #if STM32_HAS_GPIOE {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, + VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_ASCR, + VAL_GPIOE_LOCKR}, #endif #if STM32_HAS_GPIOF {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, + VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_ASCR, + VAL_GPIOF_LOCKR}, #endif #if STM32_HAS_GPIOG {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, + VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_ASCR, + VAL_GPIOG_LOCKR}, #endif #if STM32_HAS_GPIOH {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, + VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_ASCR, + VAL_GPIOH_LOCKR}, #endif }; #endif diff --git a/os/hal/boards/ST_NUCLEO_L476RG/board.h b/os/hal/boards/ST_NUCLEO_L476RG/board.h index 934707904..e72c7914f 100644 --- a/os/hal/boards/ST_NUCLEO_L476RG/board.h +++ b/os/hal/boards/ST_NUCLEO_L476RG/board.h @@ -198,15 +198,8 @@ #define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SWO PAL_LINE(GPIOB, 3U) - #define LINE_BUTTON PAL_LINE(GPIOC, 13U) - - - - - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) @@ -231,43 +224,47 @@ #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) +#define PIN_ASCR_DISABLED(n) (0U << (n)) +#define PIN_ASCR_ENABLED(n) (1U << (n)) +#define PIN_LOCKR_DISABLED(n) (0U << (n)) +#define PIN_LOCKR_ENABLED(n) (1U << (n)) /* * GPIOA setup: * - * PA0 - PIN0 (input pullup). - * PA1 - PIN1 (input pullup). + * PA0 - PIN0 (analog). + * PA1 - PIN1 (analog). * PA2 - USART_TX (alternate 7). * PA3 - USART_RX (alternate 7). - * PA4 - PIN4 (input pullup). + * PA4 - PIN4 (analog). * PA5 - LED_GREEN (output pushpull maximum). - * PA6 - PIN6 (input pullup). - * PA7 - PIN7 (input pullup). - * PA8 - PIN8 (input pullup). - * PA9 - PIN9 (input pullup). - * PA10 - PIN10 (input pullup). - * PA11 - PIN11 (input pullup). - * PA12 - PIN12 (input pullup). + * PA6 - PIN6 (analog). + * PA7 - PIN7 (analog). + * PA8 - PIN8 (analog). + * PA9 - PIN9 (analog). + * PA10 - PIN10 (analog). + * PA11 - PIN11 (analog). + * PA12 - PIN12 (analog). * PA13 - SWDIO (alternate 0). * PA14 - SWCLK (alternate 0). - * PA15 - PIN15 (input pullup). + * PA15 - PIN15 (analog). */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_INPUT(GPIOA_PIN1) | \ +#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_PIN0) | \ + PIN_MODE_ANALOG(GPIOA_PIN1) | \ PIN_MODE_ALTERNATE(GPIOA_USART_TX) | \ PIN_MODE_ALTERNATE(GPIOA_USART_RX) | \ - PIN_MODE_INPUT(GPIOA_PIN4) | \ + PIN_MODE_ANALOG(GPIOA_PIN4) | \ PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_PIN9) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_INPUT(GPIOA_PIN11) | \ - PIN_MODE_INPUT(GPIOA_PIN12) | \ + PIN_MODE_ANALOG(GPIOA_PIN6) | \ + PIN_MODE_ANALOG(GPIOA_PIN7) | \ + PIN_MODE_ANALOG(GPIOA_PIN8) | \ + PIN_MODE_ANALOG(GPIOA_PIN9) | \ + PIN_MODE_ANALOG(GPIOA_PIN10) | \ + PIN_MODE_ANALOG(GPIOA_PIN11) | \ + PIN_MODE_ANALOG(GPIOA_PIN12) | \ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) + PIN_MODE_ANALOG(GPIOA_PIN15)) #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOA_USART_TX) | \ @@ -300,22 +297,22 @@ PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ PIN_OSPEED_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ +#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ PIN_PUPDR_FLOATING(GPIOA_USART_TX) | \ PIN_PUPDR_FLOATING(GPIOA_USART_RX) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN4) | \ PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) + PIN_PUPDR_FLOATING(GPIOA_PIN15)) #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ PIN_ODR_HIGH(GPIOA_PIN1) | \ PIN_ODR_HIGH(GPIOA_USART_TX) | \ @@ -348,43 +345,75 @@ PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ PIN_AFIO_AF(GPIOA_PIN15, 0)) +#define VAL_GPIOA_ASCR (PIN_ASCR_DISABLED(GPIOA_PIN0) | \ + PIN_ASCR_DISABLED(GPIOA_PIN1) | \ + PIN_ASCR_DISABLED(GPIOA_USART_TX) | \ + PIN_ASCR_DISABLED(GPIOA_USART_RX) | \ + PIN_ASCR_DISABLED(GPIOA_PIN4) | \ + PIN_ASCR_DISABLED(GPIOA_LED_GREEN) | \ + PIN_ASCR_DISABLED(GPIOA_PIN6) | \ + PIN_ASCR_DISABLED(GPIOA_PIN7) | \ + PIN_ASCR_DISABLED(GPIOA_PIN8) | \ + PIN_ASCR_DISABLED(GPIOA_PIN9) | \ + PIN_ASCR_DISABLED(GPIOA_PIN10) | \ + PIN_ASCR_DISABLED(GPIOA_PIN11) | \ + PIN_ASCR_DISABLED(GPIOA_PIN12) | \ + PIN_ASCR_DISABLED(GPIOA_SWDIO) | \ + PIN_ASCR_DISABLED(GPIOA_SWCLK) | \ + PIN_ASCR_DISABLED(GPIOA_PIN15)) +#define VAL_GPIOA_LOCKR (PIN_LOCKR_DISABLED(GPIOA_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOA_USART_TX) | \ + PIN_LOCKR_DISABLED(GPIOA_USART_RX) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOA_LED_GREEN) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOA_SWDIO) | \ + PIN_LOCKR_DISABLED(GPIOA_SWCLK) | \ + PIN_LOCKR_DISABLED(GPIOA_PIN15)) /* * GPIOB setup: * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). + * PB0 - PIN0 (analog). + * PB1 - PIN1 (analog). + * PB2 - PIN2 (analog). * PB3 - SWO (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - PIN6 (input pullup). - * PB7 - PIN7 (input pullup). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). + * PB4 - PIN4 (analog). + * PB5 - PIN5 (analog). + * PB6 - PIN6 (analog). + * PB7 - PIN7 (analog). + * PB8 - PIN8 (analog). + * PB9 - PIN9 (analog). + * PB10 - PIN10 (analog). + * PB11 - PIN11 (analog). + * PB12 - PIN12 (analog). + * PB13 - PIN13 (analog). + * PB14 - PIN14 (analog). + * PB15 - PIN15 (analog). */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_INPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ +#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_PIN0) | \ + PIN_MODE_ANALOG(GPIOB_PIN1) | \ + PIN_MODE_ANALOG(GPIOB_PIN2) | \ PIN_MODE_ALTERNATE(GPIOB_SWO) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_INPUT(GPIOB_PIN6) | \ - PIN_MODE_INPUT(GPIOB_PIN7) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) + PIN_MODE_ANALOG(GPIOB_PIN4) | \ + PIN_MODE_ANALOG(GPIOB_PIN5) | \ + PIN_MODE_ANALOG(GPIOB_PIN6) | \ + PIN_MODE_ANALOG(GPIOB_PIN7) | \ + PIN_MODE_ANALOG(GPIOB_PIN8) | \ + PIN_MODE_ANALOG(GPIOB_PIN9) | \ + PIN_MODE_ANALOG(GPIOB_PIN10) | \ + PIN_MODE_ANALOG(GPIOB_PIN11) | \ + PIN_MODE_ANALOG(GPIOB_PIN12) | \ + PIN_MODE_ANALOG(GPIOB_PIN13) | \ + PIN_MODE_ANALOG(GPIOB_PIN14) | \ + PIN_MODE_ANALOG(GPIOB_PIN15)) #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ @@ -417,22 +446,22 @@ PIN_OSPEED_HIGH(GPIOB_PIN13) | \ PIN_OSPEED_HIGH(GPIOB_PIN14) | \ PIN_OSPEED_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ +#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN2) | \ PIN_PUPDR_PULLUP(GPIOB_SWO) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) + PIN_PUPDR_FLOATING(GPIOB_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN15)) #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ PIN_ODR_HIGH(GPIOB_PIN1) | \ PIN_ODR_HIGH(GPIOB_PIN2) | \ @@ -465,43 +494,75 @@ PIN_AFIO_AF(GPIOB_PIN13, 0) | \ PIN_AFIO_AF(GPIOB_PIN14, 0) | \ PIN_AFIO_AF(GPIOB_PIN15, 0)) +#define VAL_GPIOB_ASCR (PIN_ASCR_DISABLED(GPIOB_PIN0) | \ + PIN_ASCR_DISABLED(GPIOB_PIN1) | \ + PIN_ASCR_DISABLED(GPIOB_PIN2) | \ + PIN_ASCR_DISABLED(GPIOB_SWO) | \ + PIN_ASCR_DISABLED(GPIOB_PIN4) | \ + PIN_ASCR_DISABLED(GPIOB_PIN5) | \ + PIN_ASCR_DISABLED(GPIOB_PIN6) | \ + PIN_ASCR_DISABLED(GPIOB_PIN7) | \ + PIN_ASCR_DISABLED(GPIOB_PIN8) | \ + PIN_ASCR_DISABLED(GPIOB_PIN9) | \ + PIN_ASCR_DISABLED(GPIOB_PIN10) | \ + PIN_ASCR_DISABLED(GPIOB_PIN11) | \ + PIN_ASCR_DISABLED(GPIOB_PIN12) | \ + PIN_ASCR_DISABLED(GPIOB_PIN13) | \ + PIN_ASCR_DISABLED(GPIOB_PIN14) | \ + PIN_ASCR_DISABLED(GPIOB_PIN15)) +#define VAL_GPIOB_LOCKR (PIN_LOCKR_DISABLED(GPIOB_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOB_SWO) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN13) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOB_PIN15)) /* * GPIOC setup: * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). + * PC0 - PIN0 (analog). + * PC1 - PIN1 (analog). + * PC2 - PIN2 (analog). + * PC3 - PIN3 (analog). + * PC4 - PIN4 (analog). + * PC5 - PIN5 (analog). + * PC6 - PIN6 (analog). + * PC7 - PIN7 (analog). + * PC8 - PIN8 (analog). + * PC9 - PIN9 (analog). + * PC10 - PIN10 (analog). + * PC11 - PIN11 (analog). + * PC12 - PIN12 (analog). * PC13 - BUTTON (input floating). - * PC14 - PIN14 (input pullup). - * PC15 - PIN15 (input pullup). + * PC14 - PIN14 (analog). + * PC15 - PIN15 (analog). */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ +#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(GPIOC_PIN0) | \ + PIN_MODE_ANALOG(GPIOC_PIN1) | \ + PIN_MODE_ANALOG(GPIOC_PIN2) | \ + PIN_MODE_ANALOG(GPIOC_PIN3) | \ + PIN_MODE_ANALOG(GPIOC_PIN4) | \ + PIN_MODE_ANALOG(GPIOC_PIN5) | \ + PIN_MODE_ANALOG(GPIOC_PIN6) | \ + PIN_MODE_ANALOG(GPIOC_PIN7) | \ + PIN_MODE_ANALOG(GPIOC_PIN8) | \ + PIN_MODE_ANALOG(GPIOC_PIN9) | \ + PIN_MODE_ANALOG(GPIOC_PIN10) | \ + PIN_MODE_ANALOG(GPIOC_PIN11) | \ + PIN_MODE_ANALOG(GPIOC_PIN12) | \ PIN_MODE_INPUT(GPIOC_BUTTON) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) + PIN_MODE_ANALOG(GPIOC_PIN14) | \ + PIN_MODE_ANALOG(GPIOC_PIN15)) #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ @@ -534,22 +595,22 @@ PIN_OSPEED_HIGH(GPIOC_BUTTON) | \ PIN_OSPEED_HIGH(GPIOC_PIN14) | \ PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ +#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN12) | \ PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN15)) + PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOC_PIN15)) #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ PIN_ODR_HIGH(GPIOC_PIN1) | \ PIN_ODR_HIGH(GPIOC_PIN2) | \ @@ -582,43 +643,75 @@ PIN_AFIO_AF(GPIOC_BUTTON, 0) | \ PIN_AFIO_AF(GPIOC_PIN14, 0) | \ PIN_AFIO_AF(GPIOC_PIN15, 0)) +#define VAL_GPIOC_ASCR (PIN_ASCR_DISABLED(GPIOC_PIN0) | \ + PIN_ASCR_DISABLED(GPIOC_PIN1) | \ + PIN_ASCR_DISABLED(GPIOC_PIN2) | \ + PIN_ASCR_DISABLED(GPIOC_PIN3) | \ + PIN_ASCR_DISABLED(GPIOC_PIN4) | \ + PIN_ASCR_DISABLED(GPIOC_PIN5) | \ + PIN_ASCR_DISABLED(GPIOC_PIN6) | \ + PIN_ASCR_DISABLED(GPIOC_PIN7) | \ + PIN_ASCR_DISABLED(GPIOC_PIN8) | \ + PIN_ASCR_DISABLED(GPIOC_PIN9) | \ + PIN_ASCR_DISABLED(GPIOC_PIN10) | \ + PIN_ASCR_DISABLED(GPIOC_PIN11) | \ + PIN_ASCR_DISABLED(GPIOC_PIN12) | \ + PIN_ASCR_DISABLED(GPIOC_BUTTON) | \ + PIN_ASCR_DISABLED(GPIOC_PIN14) | \ + PIN_ASCR_DISABLED(GPIOC_PIN15)) +#define VAL_GPIOC_LOCKR (PIN_LOCKR_DISABLED(GPIOC_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN3) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOC_BUTTON) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOC_PIN15)) /* * GPIOD setup: * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). + * PD0 - PIN0 (analog). + * PD1 - PIN1 (analog). + * PD2 - PIN2 (analog). + * PD3 - PIN3 (analog). + * PD4 - PIN4 (analog). + * PD5 - PIN5 (analog). + * PD6 - PIN6 (analog). + * PD7 - PIN7 (analog). + * PD8 - PIN8 (analog). + * PD9 - PIN9 (analog). + * PD10 - PIN10 (analog). + * PD11 - PIN11 (analog). + * PD12 - PIN12 (analog). + * PD13 - PIN13 (analog). + * PD14 - PIN14 (analog). + * PD15 - PIN15 (analog). */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_INPUT(GPIOD_PIN4) | \ - PIN_MODE_INPUT(GPIOD_PIN5) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_INPUT(GPIOD_PIN12) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_INPUT(GPIOD_PIN14) | \ - PIN_MODE_INPUT(GPIOD_PIN15)) +#define VAL_GPIOD_MODER (PIN_MODE_ANALOG(GPIOD_PIN0) | \ + PIN_MODE_ANALOG(GPIOD_PIN1) | \ + PIN_MODE_ANALOG(GPIOD_PIN2) | \ + PIN_MODE_ANALOG(GPIOD_PIN3) | \ + PIN_MODE_ANALOG(GPIOD_PIN4) | \ + PIN_MODE_ANALOG(GPIOD_PIN5) | \ + PIN_MODE_ANALOG(GPIOD_PIN6) | \ + PIN_MODE_ANALOG(GPIOD_PIN7) | \ + PIN_MODE_ANALOG(GPIOD_PIN8) | \ + PIN_MODE_ANALOG(GPIOD_PIN9) | \ + PIN_MODE_ANALOG(GPIOD_PIN10) | \ + PIN_MODE_ANALOG(GPIOD_PIN11) | \ + PIN_MODE_ANALOG(GPIOD_PIN12) | \ + PIN_MODE_ANALOG(GPIOD_PIN13) | \ + PIN_MODE_ANALOG(GPIOD_PIN14) | \ + PIN_MODE_ANALOG(GPIOD_PIN15)) #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ @@ -651,22 +744,22 @@ PIN_OSPEED_HIGH(GPIOD_PIN13) | \ PIN_OSPEED_HIGH(GPIOD_PIN14) | \ PIN_OSPEED_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN15)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN15)) #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ PIN_ODR_HIGH(GPIOD_PIN1) | \ PIN_ODR_HIGH(GPIOD_PIN2) | \ @@ -699,43 +792,75 @@ PIN_AFIO_AF(GPIOD_PIN13, 0) | \ PIN_AFIO_AF(GPIOD_PIN14, 0) | \ PIN_AFIO_AF(GPIOD_PIN15, 0)) +#define VAL_GPIOD_ASCR (PIN_ASCR_DISABLED(GPIOD_PIN0) | \ + PIN_ASCR_DISABLED(GPIOD_PIN1) | \ + PIN_ASCR_DISABLED(GPIOD_PIN2) | \ + PIN_ASCR_DISABLED(GPIOD_PIN3) | \ + PIN_ASCR_DISABLED(GPIOD_PIN4) | \ + PIN_ASCR_DISABLED(GPIOD_PIN5) | \ + PIN_ASCR_DISABLED(GPIOD_PIN6) | \ + PIN_ASCR_DISABLED(GPIOD_PIN7) | \ + PIN_ASCR_DISABLED(GPIOD_PIN8) | \ + PIN_ASCR_DISABLED(GPIOD_PIN9) | \ + PIN_ASCR_DISABLED(GPIOD_PIN10) | \ + PIN_ASCR_DISABLED(GPIOD_PIN11) | \ + PIN_ASCR_DISABLED(GPIOD_PIN12) | \ + PIN_ASCR_DISABLED(GPIOD_PIN13) | \ + PIN_ASCR_DISABLED(GPIOD_PIN14) | \ + PIN_ASCR_DISABLED(GPIOD_PIN15)) +#define VAL_GPIOD_LOCKR (PIN_LOCKR_DISABLED(GPIOD_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN3) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN13) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOD_PIN15)) /* * GPIOE setup: * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 (input pullup). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (input pullup). - * PE9 - PIN9 (input pullup). - * PE10 - PIN10 (input pullup). - * PE11 - PIN11 (input pullup). - * PE12 - PIN12 (input pullup). - * PE13 - PIN13 (input pullup). - * PE14 - PIN14 (input pullup). - * PE15 - PIN15 (input pullup). + * PE0 - PIN0 (analog). + * PE1 - PIN1 (analog). + * PE2 - PIN2 (analog). + * PE3 - PIN3 (analog). + * PE4 - PIN4 (analog). + * PE5 - PIN5 (analog). + * PE6 - PIN6 (analog). + * PE7 - PIN7 (analog). + * PE8 - PIN8 (analog). + * PE9 - PIN9 (analog). + * PE10 - PIN10 (analog). + * PE11 - PIN11 (analog). + * PE12 - PIN12 (analog). + * PE13 - PIN13 (analog). + * PE14 - PIN14 (analog). + * PE15 - PIN15 (analog). */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ - PIN_MODE_INPUT(GPIOE_PIN1) | \ - PIN_MODE_INPUT(GPIOE_PIN2) | \ - PIN_MODE_INPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) | \ - PIN_MODE_INPUT(GPIOE_PIN5) | \ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_INPUT(GPIOE_PIN8) | \ - PIN_MODE_INPUT(GPIOE_PIN9) | \ - PIN_MODE_INPUT(GPIOE_PIN10) | \ - PIN_MODE_INPUT(GPIOE_PIN11) | \ - PIN_MODE_INPUT(GPIOE_PIN12) | \ - PIN_MODE_INPUT(GPIOE_PIN13) | \ - PIN_MODE_INPUT(GPIOE_PIN14) | \ - PIN_MODE_INPUT(GPIOE_PIN15)) +#define VAL_GPIOE_MODER (PIN_MODE_ANALOG(GPIOE_PIN0) | \ + PIN_MODE_ANALOG(GPIOE_PIN1) | \ + PIN_MODE_ANALOG(GPIOE_PIN2) | \ + PIN_MODE_ANALOG(GPIOE_PIN3) | \ + PIN_MODE_ANALOG(GPIOE_PIN4) | \ + PIN_MODE_ANALOG(GPIOE_PIN5) | \ + PIN_MODE_ANALOG(GPIOE_PIN6) | \ + PIN_MODE_ANALOG(GPIOE_PIN7) | \ + PIN_MODE_ANALOG(GPIOE_PIN8) | \ + PIN_MODE_ANALOG(GPIOE_PIN9) | \ + PIN_MODE_ANALOG(GPIOE_PIN10) | \ + PIN_MODE_ANALOG(GPIOE_PIN11) | \ + PIN_MODE_ANALOG(GPIOE_PIN12) | \ + PIN_MODE_ANALOG(GPIOE_PIN13) | \ + PIN_MODE_ANALOG(GPIOE_PIN14) | \ + PIN_MODE_ANALOG(GPIOE_PIN15)) #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ @@ -768,22 +893,22 @@ PIN_OSPEED_HIGH(GPIOE_PIN13) | \ PIN_OSPEED_HIGH(GPIOE_PIN14) | \ PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN15)) #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ PIN_ODR_HIGH(GPIOE_PIN1) | \ PIN_ODR_HIGH(GPIOE_PIN2) | \ @@ -816,43 +941,75 @@ PIN_AFIO_AF(GPIOE_PIN13, 0) | \ PIN_AFIO_AF(GPIOE_PIN14, 0) | \ PIN_AFIO_AF(GPIOE_PIN15, 0)) +#define VAL_GPIOE_ASCR (PIN_ASCR_DISABLED(GPIOE_PIN0) | \ + PIN_ASCR_DISABLED(GPIOE_PIN1) | \ + PIN_ASCR_DISABLED(GPIOE_PIN2) | \ + PIN_ASCR_DISABLED(GPIOE_PIN3) | \ + PIN_ASCR_DISABLED(GPIOE_PIN4) | \ + PIN_ASCR_DISABLED(GPIOE_PIN5) | \ + PIN_ASCR_DISABLED(GPIOE_PIN6) | \ + PIN_ASCR_DISABLED(GPIOE_PIN7) | \ + PIN_ASCR_DISABLED(GPIOE_PIN8) | \ + PIN_ASCR_DISABLED(GPIOE_PIN9) | \ + PIN_ASCR_DISABLED(GPIOE_PIN10) | \ + PIN_ASCR_DISABLED(GPIOE_PIN11) | \ + PIN_ASCR_DISABLED(GPIOE_PIN12) | \ + PIN_ASCR_DISABLED(GPIOE_PIN13) | \ + PIN_ASCR_DISABLED(GPIOE_PIN14) | \ + PIN_ASCR_DISABLED(GPIOE_PIN15)) +#define VAL_GPIOE_LOCKR (PIN_LOCKR_DISABLED(GPIOE_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN3) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN13) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOE_PIN15)) /* * GPIOF setup: * - * PF0 - PIN0 (input pullup). - * PF1 - PIN1 (input pullup). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). + * PF0 - PIN0 (analog). + * PF1 - PIN1 (analog). + * PF2 - PIN2 (analog). + * PF3 - PIN3 (analog). + * PF4 - PIN4 (analog). + * PF5 - PIN5 (analog). + * PF6 - PIN6 (analog). + * PF7 - PIN7 (analog). + * PF8 - PIN8 (analog). + * PF9 - PIN9 (analog). + * PF10 - PIN10 (analog). + * PF11 - PIN11 (analog). + * PF12 - PIN12 (analog). + * PF13 - PIN13 (analog). + * PF14 - PIN14 (analog). + * PF15 - PIN15 (analog). */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ - PIN_MODE_INPUT(GPIOF_PIN1) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_MODER (PIN_MODE_ANALOG(GPIOF_PIN0) | \ + PIN_MODE_ANALOG(GPIOF_PIN1) | \ + PIN_MODE_ANALOG(GPIOF_PIN2) | \ + PIN_MODE_ANALOG(GPIOF_PIN3) | \ + PIN_MODE_ANALOG(GPIOF_PIN4) | \ + PIN_MODE_ANALOG(GPIOF_PIN5) | \ + PIN_MODE_ANALOG(GPIOF_PIN6) | \ + PIN_MODE_ANALOG(GPIOF_PIN7) | \ + PIN_MODE_ANALOG(GPIOF_PIN8) | \ + PIN_MODE_ANALOG(GPIOF_PIN9) | \ + PIN_MODE_ANALOG(GPIOF_PIN10) | \ + PIN_MODE_ANALOG(GPIOF_PIN11) | \ + PIN_MODE_ANALOG(GPIOF_PIN12) | \ + PIN_MODE_ANALOG(GPIOF_PIN13) | \ + PIN_MODE_ANALOG(GPIOF_PIN14) | \ + PIN_MODE_ANALOG(GPIOF_PIN15)) #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ @@ -885,22 +1042,22 @@ PIN_OSPEED_HIGH(GPIOF_PIN13) | \ PIN_OSPEED_HIGH(GPIOF_PIN14) | \ PIN_OSPEED_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN15)) #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ PIN_ODR_HIGH(GPIOF_PIN1) | \ PIN_ODR_HIGH(GPIOF_PIN2) | \ @@ -933,43 +1090,75 @@ PIN_AFIO_AF(GPIOF_PIN13, 0) | \ PIN_AFIO_AF(GPIOF_PIN14, 0) | \ PIN_AFIO_AF(GPIOF_PIN15, 0)) +#define VAL_GPIOF_ASCR (PIN_ASCR_DISABLED(GPIOF_PIN0) | \ + PIN_ASCR_DISABLED(GPIOF_PIN1) | \ + PIN_ASCR_DISABLED(GPIOF_PIN2) | \ + PIN_ASCR_DISABLED(GPIOF_PIN3) | \ + PIN_ASCR_DISABLED(GPIOF_PIN4) | \ + PIN_ASCR_DISABLED(GPIOF_PIN5) | \ + PIN_ASCR_DISABLED(GPIOF_PIN6) | \ + PIN_ASCR_DISABLED(GPIOF_PIN7) | \ + PIN_ASCR_DISABLED(GPIOF_PIN8) | \ + PIN_ASCR_DISABLED(GPIOF_PIN9) | \ + PIN_ASCR_DISABLED(GPIOF_PIN10) | \ + PIN_ASCR_DISABLED(GPIOF_PIN11) | \ + PIN_ASCR_DISABLED(GPIOF_PIN12) | \ + PIN_ASCR_DISABLED(GPIOF_PIN13) | \ + PIN_ASCR_DISABLED(GPIOF_PIN14) | \ + PIN_ASCR_DISABLED(GPIOF_PIN15)) +#define VAL_GPIOF_LOCKR (PIN_LOCKR_DISABLED(GPIOF_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN3) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN13) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOF_PIN15)) /* * GPIOG setup: * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). + * PG0 - PIN0 (analog). + * PG1 - PIN1 (analog). + * PG2 - PIN2 (analog). + * PG3 - PIN3 (analog). + * PG4 - PIN4 (analog). + * PG5 - PIN5 (analog). + * PG6 - PIN6 (analog). + * PG7 - PIN7 (analog). + * PG8 - PIN8 (analog). + * PG9 - PIN9 (analog). + * PG10 - PIN10 (analog). + * PG11 - PIN11 (analog). + * PG12 - PIN12 (analog). + * PG13 - PIN13 (analog). + * PG14 - PIN14 (analog). + * PG15 - PIN15 (analog). */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ - PIN_MODE_INPUT(GPIOG_PIN1) | \ - PIN_MODE_INPUT(GPIOG_PIN2) | \ - PIN_MODE_INPUT(GPIOG_PIN3) | \ - PIN_MODE_INPUT(GPIOG_PIN4) | \ - PIN_MODE_INPUT(GPIOG_PIN5) | \ - PIN_MODE_INPUT(GPIOG_PIN6) | \ - PIN_MODE_INPUT(GPIOG_PIN7) | \ - PIN_MODE_INPUT(GPIOG_PIN8) | \ - PIN_MODE_INPUT(GPIOG_PIN9) | \ - PIN_MODE_INPUT(GPIOG_PIN10) | \ - PIN_MODE_INPUT(GPIOG_PIN11) | \ - PIN_MODE_INPUT(GPIOG_PIN12) | \ - PIN_MODE_INPUT(GPIOG_PIN13) | \ - PIN_MODE_INPUT(GPIOG_PIN14) | \ - PIN_MODE_INPUT(GPIOG_PIN15)) +#define VAL_GPIOG_MODER (PIN_MODE_ANALOG(GPIOG_PIN0) | \ + PIN_MODE_ANALOG(GPIOG_PIN1) | \ + PIN_MODE_ANALOG(GPIOG_PIN2) | \ + PIN_MODE_ANALOG(GPIOG_PIN3) | \ + PIN_MODE_ANALOG(GPIOG_PIN4) | \ + PIN_MODE_ANALOG(GPIOG_PIN5) | \ + PIN_MODE_ANALOG(GPIOG_PIN6) | \ + PIN_MODE_ANALOG(GPIOG_PIN7) | \ + PIN_MODE_ANALOG(GPIOG_PIN8) | \ + PIN_MODE_ANALOG(GPIOG_PIN9) | \ + PIN_MODE_ANALOG(GPIOG_PIN10) | \ + PIN_MODE_ANALOG(GPIOG_PIN11) | \ + PIN_MODE_ANALOG(GPIOG_PIN12) | \ + PIN_MODE_ANALOG(GPIOG_PIN13) | \ + PIN_MODE_ANALOG(GPIOG_PIN14) | \ + PIN_MODE_ANALOG(GPIOG_PIN15)) #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ @@ -1002,22 +1191,22 @@ PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN15)) +#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN15)) #define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ PIN_ODR_HIGH(GPIOG_PIN1) | \ PIN_ODR_HIGH(GPIOG_PIN2) | \ @@ -1050,43 +1239,75 @@ PIN_AFIO_AF(GPIOG_PIN13, 0) | \ PIN_AFIO_AF(GPIOG_PIN14, 0) | \ PIN_AFIO_AF(GPIOG_PIN15, 0)) +#define VAL_GPIOG_ASCR (PIN_ASCR_DISABLED(GPIOG_PIN0) | \ + PIN_ASCR_DISABLED(GPIOG_PIN1) | \ + PIN_ASCR_DISABLED(GPIOG_PIN2) | \ + PIN_ASCR_DISABLED(GPIOG_PIN3) | \ + PIN_ASCR_DISABLED(GPIOG_PIN4) | \ + PIN_ASCR_DISABLED(GPIOG_PIN5) | \ + PIN_ASCR_DISABLED(GPIOG_PIN6) | \ + PIN_ASCR_DISABLED(GPIOG_PIN7) | \ + PIN_ASCR_DISABLED(GPIOG_PIN8) | \ + PIN_ASCR_DISABLED(GPIOG_PIN9) | \ + PIN_ASCR_DISABLED(GPIOG_PIN10) | \ + PIN_ASCR_DISABLED(GPIOG_PIN11) | \ + PIN_ASCR_DISABLED(GPIOG_PIN12) | \ + PIN_ASCR_DISABLED(GPIOG_PIN13) | \ + PIN_ASCR_DISABLED(GPIOG_PIN14) | \ + PIN_ASCR_DISABLED(GPIOG_PIN15)) +#define VAL_GPIOG_LOCKR (PIN_LOCKR_DISABLED(GPIOG_PIN0) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN1) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN3) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN13) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOG_PIN15)) /* * GPIOH setup: * * PH0 - OSC_IN (input floating). * PH1 - OSC_OUT (input floating). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). + * PH2 - PIN2 (analog). + * PH3 - PIN3 (analog). + * PH4 - PIN4 (analog). + * PH5 - PIN5 (analog). + * PH6 - PIN6 (analog). + * PH7 - PIN7 (analog). + * PH8 - PIN8 (analog). + * PH9 - PIN9 (analog). + * PH10 - PIN10 (analog). + * PH11 - PIN11 (analog). + * PH12 - PIN12 (analog). + * PH13 - PIN13 (analog). + * PH14 - PIN14 (analog). + * PH15 - PIN15 (analog). */ #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ - PIN_MODE_INPUT(GPIOH_PIN2) | \ - PIN_MODE_INPUT(GPIOH_PIN3) | \ - PIN_MODE_INPUT(GPIOH_PIN4) | \ - PIN_MODE_INPUT(GPIOH_PIN5) | \ - PIN_MODE_INPUT(GPIOH_PIN6) | \ - PIN_MODE_INPUT(GPIOH_PIN7) | \ - PIN_MODE_INPUT(GPIOH_PIN8) | \ - PIN_MODE_INPUT(GPIOH_PIN9) | \ - PIN_MODE_INPUT(GPIOH_PIN10) | \ - PIN_MODE_INPUT(GPIOH_PIN11) | \ - PIN_MODE_INPUT(GPIOH_PIN12) | \ - PIN_MODE_INPUT(GPIOH_PIN13) | \ - PIN_MODE_INPUT(GPIOH_PIN14) | \ - PIN_MODE_INPUT(GPIOH_PIN15)) + PIN_MODE_ANALOG(GPIOH_PIN2) | \ + PIN_MODE_ANALOG(GPIOH_PIN3) | \ + PIN_MODE_ANALOG(GPIOH_PIN4) | \ + PIN_MODE_ANALOG(GPIOH_PIN5) | \ + PIN_MODE_ANALOG(GPIOH_PIN6) | \ + PIN_MODE_ANALOG(GPIOH_PIN7) | \ + PIN_MODE_ANALOG(GPIOH_PIN8) | \ + PIN_MODE_ANALOG(GPIOH_PIN9) | \ + PIN_MODE_ANALOG(GPIOH_PIN10) | \ + PIN_MODE_ANALOG(GPIOH_PIN11) | \ + PIN_MODE_ANALOG(GPIOH_PIN12) | \ + PIN_MODE_ANALOG(GPIOH_PIN13) | \ + PIN_MODE_ANALOG(GPIOH_PIN14) | \ + PIN_MODE_ANALOG(GPIOH_PIN15)) #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ @@ -1121,20 +1342,20 @@ PIN_OSPEED_VERYLOW(GPIOH_PIN15)) #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN15)) + PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN15)) #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ PIN_ODR_HIGH(GPIOH_PIN2) | \ @@ -1167,6 +1388,38 @@ PIN_AFIO_AF(GPIOH_PIN13, 0) | \ PIN_AFIO_AF(GPIOH_PIN14, 0) | \ PIN_AFIO_AF(GPIOH_PIN15, 0)) +#define VAL_GPIOH_ASCR (PIN_ASCR_DISABLED(GPIOH_OSC_IN) | \ + PIN_ASCR_DISABLED(GPIOH_OSC_OUT) | \ + PIN_ASCR_DISABLED(GPIOH_PIN2) | \ + PIN_ASCR_DISABLED(GPIOH_PIN3) | \ + PIN_ASCR_DISABLED(GPIOH_PIN4) | \ + PIN_ASCR_DISABLED(GPIOH_PIN5) | \ + PIN_ASCR_DISABLED(GPIOH_PIN6) | \ + PIN_ASCR_DISABLED(GPIOH_PIN7) | \ + PIN_ASCR_DISABLED(GPIOH_PIN8) | \ + PIN_ASCR_DISABLED(GPIOH_PIN9) | \ + PIN_ASCR_DISABLED(GPIOH_PIN10) | \ + PIN_ASCR_DISABLED(GPIOH_PIN11) | \ + PIN_ASCR_DISABLED(GPIOH_PIN12) | \ + PIN_ASCR_DISABLED(GPIOH_PIN13) | \ + PIN_ASCR_DISABLED(GPIOH_PIN14) | \ + PIN_ASCR_DISABLED(GPIOH_PIN15)) +#define VAL_GPIOH_LOCKR (PIN_LOCKR_DISABLED(GPIOH_OSC_IN) | \ + PIN_LOCKR_DISABLED(GPIOH_OSC_OUT) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN2) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN3) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN4) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN5) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN6) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN7) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN8) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN9) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN10) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN11) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN12) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN13) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ + PIN_LOCKR_DISABLED(GPIOH_PIN15)) #if !defined(_FROM_ASM_) diff --git a/os/hal/boards/ST_NUCLEO_L476RG/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO_L476RG/cfg/board.chcfg index 0e6feb232..b3a0fff83 100644 --- a/os/hal/boards/ST_NUCLEO_L476RG/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO_L476RG/cfg/board.chcfg @@ -1,1064 +1,1320 @@ - - - - - resources/gencfg/processors/boards/stm32l4xx/templates - .. - 3.0.x - - STMicroelectronics NUCLEO-L476RG - ST_NUCLEO_L476RG - - STM32L476xx - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + resources/gencfg/processors/boards/stm32l4xx/templates + .. + 3.0.x + + STMicroelectronics NUCLEO-L476RG + ST_NUCLEO_L476RG + + STM32L476xx + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 9cc91e545..40f9e4dfc 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -156,7 +156,6 @@ void _pal_lld_init(const PALConfig *config) { * * @notapi */ -#if 1 void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode) { @@ -167,7 +166,7 @@ void _pal_lld_setgroupmode(ioportid_t port, uint32_t pupdr = (mode & PAL_STM32_PUDR_MASK) >> 5; uint32_t altr = (mode & PAL_STM32_ALTERNATE_MASK) >> 7; uint32_t bit = 0; - while (TRUE) { + while (true) { if ((mask & 1) != 0) { uint32_t altrmask, m1, m2, m4; @@ -194,45 +193,6 @@ void _pal_lld_setgroupmode(ioportid_t port, bit++; } } -#else -void _pal_lld_setgroupmode(ioportid_t port, - ioportmask_t mask, - iomode_t mode) { - uint32_t afrm, moderm, pupdrm, otyperm, ospeedrm; - uint32_t m1 = (uint32_t)mask; - uint32_t m2 = 0; - uint32_t m4l = 0; - uint32_t m4h = 0; - uint32_t bit = 0; - do { - if ((mask & 1) != 0) { - m2 |= 3 << bit; - if (bit < 16) - m4l |= 15 << ((bit & 14) * 2); - else - m4h |= 15 << ((bit & 14) * 2); - } - bit += 2; - mask >>= 1; - } while (mask); - - afrm = ((mode & PAL_STM32_ALTERNATE_MASK) >> 7) * 0x1111; - port->AFRL = (port->AFRL & ~m4l) | (afrm & m4l); - port->AFRH = (port->AFRH & ~m4h) | (afrm & m4h); - - ospeedrm = ((mode & PAL_STM32_OSPEED_MASK) >> 3) * 0x5555; - port->OSPEEDR = (port->OSPEEDR & ~m2) | (ospeedrm & m2); - - otyperm = ((mode & PAL_STM32_OTYPE_MASK) >> 2) * 0xffff; - port->OTYPER = (port->OTYPER & ~m1) | (otyperm & m1); - - pupdrm = ((mode & PAL_STM32_PUDR_MASK) >> 5) * 0x5555; - port->PUPDR = (port->PUPDR & ~m2) | (pupdrm & m2); - - moderm = ((mode & PAL_STM32_MODE_MASK) >> 0) * 0x5555; - port->MODER = (port->MODER & ~m2) | (moderm & m2); -} -#endif #endif /* HAL_USE_PAL */ diff --git a/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c index ab220e29f..3abf97503 100644 --- a/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c @@ -53,12 +53,14 @@ static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) { gpiop->OTYPER = config->otyper; + gpiop->ASCR = config->ascr; gpiop->OSPEEDR = config->ospeedr; gpiop->PUPDR = config->pupdr; gpiop->ODR = config->odr; gpiop->AFRL = config->afrl; gpiop->AFRH = config->afrh; gpiop->MODER = config->moder; + gpiop->LOCKR = config->lockr; } /*===========================================================================*/ @@ -147,8 +149,9 @@ void _pal_lld_setgroupmode(ioportid_t port, uint32_t pupdr = (mode & PAL_STM32_PUDR_MASK) >> 5; uint32_t altr = (mode & PAL_STM32_ALTERNATE_MASK) >> 7; uint32_t ascr = (mode & PAL_STM32_ASCR_MASK) >> 11; + uint32_t lockr = (mode & PAL_STM32_LOCKR_MASK) >> 12; uint32_t bit = 0; - while (TRUE) { + while (true) { if ((mask & 1) != 0) { uint32_t altrmask, m1, m2, m4; @@ -165,6 +168,7 @@ void _pal_lld_setgroupmode(ioportid_t port, port->OSPEEDR = (port->OSPEEDR & ~m2) | ospeedr; port->PUPDR = (port->PUPDR & ~m2) | pupdr; port->MODER = (port->MODER & ~m2) | moder; + port->LOCKR = (port->LOCKR & ~m1) | lockr; } mask >>= 1; if (!mask) diff --git a/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.h index 553a2d0f3..0c4fa80d0 100644 --- a/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.h @@ -72,6 +72,10 @@ #define PAL_STM32_ASCR_OFF (0U << 11U) #define PAL_STM32_ASCR_ON (1U << 11U) +#define PAL_STM32_LOCKR_MASK (1U << 12U) +#define PAL_STM32_LOCKR_OFF (0U << 12U) +#define PAL_STM32_LOCKR_ON (1U << 12U) + /** * @brief Alternate function. * @@ -86,15 +90,16 @@ * @{ */ /** - * @brief This mode is implemented as input. + * @brief Implemented as input. */ #define PAL_MODE_RESET PAL_STM32_MODE_INPUT /** - * @brief This mode is implemented as analog with analog switch disabled. + * @brief Implemented as analog with analog switch disabled and lock. */ #define PAL_MODE_UNCONNECTED (PAL_STM32_MODE_ANALOG | \ - PAL_STM32_ASCR_OFF) + PAL_STM32_ASCR_OFF | \ + PAL_STM32_LOCKR_ON) /** * @brief Regular input high-Z pad. @@ -235,7 +240,7 @@ typedef struct { uint16_t clear; } H; } BSRR; - volatile uint32_t LCKR; + volatile uint32_t LOCKR; volatile uint32_t AFRL; volatile uint32_t AFRH; volatile uint32_t BRR; @@ -262,6 +267,8 @@ typedef struct { uint32_t afrh; /** Initial value for ASCR register.*/ uint32_t ascr; + /** Initial value for LOCKR register.*/ + uint32_t lockr; } stm32_gpio_setup_t; /** -- cgit v1.2.3