From 2a2598ff1b1e696b2b6f0076a419329911edac30 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Sat, 4 May 2013 08:10:31 +0000
Subject: Fixed bug #372.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5672 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32/SPIv2/spi_lld.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

(limited to 'os')

diff --git a/os/hal/platforms/STM32/SPIv2/spi_lld.c b/os/hal/platforms/STM32/SPIv2/spi_lld.c
index 4a14be45f..752c2af66 100644
--- a/os/hal/platforms/STM32/SPIv2/spi_lld.c
+++ b/os/hal/platforms/STM32/SPIv2/spi_lld.c
@@ -475,10 +475,26 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
  */
 uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
 
-  spip->spi->DR = frame;
-  while ((spip->spi->SR & SPI_SR_RXNE) == 0)
-    ;
-  return spip->spi->DR;
+  /*
+   * Data register must be accessed with the appropriate data size.
+   * Byte size access (uint8_t *) for transactions that are <= 8-bit.
+   * Halfword size access (uint16_t) for transactions that are <= 8-bit.
+   */
+  if ((spip->config->cr2 & SPI_CR2_DS) <= (SPI_CR2_DS_2 |
+                                           SPI_CR2_DS_1 |
+                                           SPI_CR2_DS_0)) {
+    volatile uint8_t *spidr = (volatile uint8_t *)&spip->spi->DR;
+    *spidr = (uint8_t)frame;
+    while ((spip->spi->SR & SPI_SR_RXNE) == 0)
+      ;
+    return (uint16_t)*spidr;
+  }
+  else {
+    spip->spi->DR = frame;
+    while ((spip->spi->SR & SPI_SR_RXNE) == 0)
+      ;
+    return spip->spi->DR;
+  }
 }
 
 #endif /* HAL_USE_SPI */
-- 
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