From 38ac197ecd9ac41cf77f239b39d36f4c56cf8bb8 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Wed, 27 Jun 2012 18:03:31 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4350
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/ports/GCC/ARMCMx/chcore_v6m.c | 4 ++--
 os/ports/GCC/ARMCMx/chcore_v6m.h | 6 +++---
 os/ports/GCC/ARMCMx/chcore_v7m.c | 4 ++--
 os/ports/GCC/ARMCMx/chcore_v7m.h | 6 +++---
 4 files changed, 10 insertions(+), 10 deletions(-)

(limited to 'os/ports')

diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.c b/os/ports/GCC/ARMCMx/chcore_v6m.c
index 98b834745..63576cb3d 100644
--- a/os/ports/GCC/ARMCMx/chcore_v6m.c
+++ b/os/ports/GCC/ARMCMx/chcore_v6m.c
@@ -109,12 +109,12 @@ void _port_irq_epilogue(regarm_t lr) {
        required or not.*/
     if (chSchIsPreemptionRequired()) {
       /* Preemption is required we need to enforce a context switch.*/
-      ctxp->pc = _port_switch_from_isr;
+      ctxp->pc = (void *)_port_switch_from_isr;
     }
     else {
       /* Preemption not required, we just need to exit the exception
          atomically.*/
-      ctxp->pc = _port_exit_from_isr;
+      ctxp->pc = (void *)_port_exit_from_isr;
     }
 
     /* Note, returning without unlocking is intentional, this is done in
diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.h b/os/ports/GCC/ARMCMx/chcore_v6m.h
index 76bfbf184..c60ac661e 100644
--- a/os/ports/GCC/ARMCMx/chcore_v6m.h
+++ b/os/ports/GCC/ARMCMx/chcore_v6m.h
@@ -208,9 +208,9 @@ struct context {
   tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace +                  \
                                      wsize -                                \
                                      sizeof(struct intctx));                \
-  tp->p_ctx.r13->r4 = pf;                                                   \
-  tp->p_ctx.r13->r5 = arg;                                                  \
-  tp->p_ctx.r13->lr = _port_thread_start;                                   \
+  tp->p_ctx.r13->r4 = (void *)(pf);                                         \
+  tp->p_ctx.r13->r5 = (void *)(arg);                                        \
+  tp->p_ctx.r13->lr = (void *)(_port_thread_start);                         \
 }
 
 /**
diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.c b/os/ports/GCC/ARMCMx/chcore_v7m.c
index a661bb60a..d621074f1 100644
--- a/os/ports/GCC/ARMCMx/chcore_v7m.c
+++ b/os/ports/GCC/ARMCMx/chcore_v7m.c
@@ -157,7 +157,7 @@ void _port_irq_epilogue(void) {
        required or not.*/
     if (chSchIsPreemptionRequired()) {
       /* Preemption is required we need to enforce a context switch.*/
-      ctxp->pc = _port_switch_from_isr;
+      ctxp->pc = (void *)_port_switch_from_isr;
 #if CORTEX_USE_FPU
       /* Triggering a lazy FPU state save.*/
       asm volatile ("vmrs    APSR_nzcv, FPSCR" : : : "memory");
@@ -166,7 +166,7 @@ void _port_irq_epilogue(void) {
     else {
       /* Preemption not required, we just need to exit the exception
          atomically.*/
-      ctxp->pc = _port_exit_from_isr;
+      ctxp->pc = (void *)_port_exit_from_isr;
     }
 
 #if CORTEX_USE_FPU
diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.h b/os/ports/GCC/ARMCMx/chcore_v7m.h
index ea9b8dab5..6a9aa536f 100644
--- a/os/ports/GCC/ARMCMx/chcore_v7m.h
+++ b/os/ports/GCC/ARMCMx/chcore_v7m.h
@@ -308,9 +308,9 @@ struct context {
   tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace +                  \
                                      wsize -                                \
                                      sizeof(struct intctx));                \
-  tp->p_ctx.r13->r4 = pf;                                                   \
-  tp->p_ctx.r13->r5 = arg;                                                  \
-  tp->p_ctx.r13->lr = _port_thread_start;                                   \
+  tp->p_ctx.r13->r4 = (void *)(pf);                                         \
+  tp->p_ctx.r13->r5 = (void *)(arg);                                        \
+  tp->p_ctx.r13->lr = (void *)(_port_thread_start);                         \
 }
 
 /**
-- 
cgit v1.2.3