From eb2abbb643b99244d63c769fb751acd4a062d9e0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 3 Oct 2010 09:48:29 +0000 Subject: Documentation related fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2229 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/MSP430/port.dox | 2 +- os/ports/GCC/PPC/port.dox | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'os/ports/GCC') diff --git a/os/ports/GCC/MSP430/port.dox b/os/ports/GCC/MSP430/port.dox index 66f2562c8..f57cafabe 100644 --- a/os/ports/GCC/MSP430/port.dox +++ b/os/ports/GCC/MSP430/port.dox @@ -25,7 +25,7 @@ * This port supports all the cores implementing the MSP430 architecture. * * @section MSP430_STATES Mapping of the System States in the MSP430 port - * The ChibiOS/RT logical system states are mapped as follow in the MSP430 + * The ChibiOS/RT logical @ref system_states are mapped as follow in the MSP430 * port: * - Init. This state is represented by the startup code and the * initialization code before @p chSysInit() is executed. It has not a diff --git a/os/ports/GCC/PPC/port.dox b/os/ports/GCC/PPC/port.dox index 14116b90e..ee0d720b6 100644 --- a/os/ports/GCC/PPC/port.dox +++ b/os/ports/GCC/PPC/port.dox @@ -25,7 +25,7 @@ * This port supports cores implementing a 32 bits Power Architecture. * * @section PPC_STATES Mapping of the System States in the Power Architecture port - * The ChibiOS/RT logical system states are mapped as follow in the + * The ChibiOS/RT logical @ref system_states are mapped as follow in the * PowerPC port: * - Init. This state is represented by the startup code and the * initialization code before @p chSysInit() is executed. It has not a -- cgit v1.2.3