From 47582d55f4305579c0dd6b9ec3410c0f8b33c395 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Oct 2010 12:52:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2217 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/ARMCMx/port.dox | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'os/ports/GCC/ARMCMx/port.dox') diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox index 5eeb9bf33..17acd06a8 100644 --- a/os/ports/GCC/ARMCMx/port.dox +++ b/os/ports/GCC/ARMCMx/port.dox @@ -25,7 +25,7 @@ * This port supports all the cores implementing the ARMv6-M and ARMv7-M * architectures. * - * @section ARMCMx_STATES_A System logical states in ARMv6-M + * @section ARMCMx_STATES_A System logical states in ARMv6-M mode * The ChibiOS/RT logical system states are mapped as follow in the ARM * Cortex-M0 port: * - Init. This state is represented by the startup code and the @@ -59,7 +59,7 @@ * the maskable interrupt sources. The ARM state is whatever the processor * was running when @p chSysHalt() was invoked. * - * @section ARMCMx_STATES_B System logical states in ARMv7-M + * @section ARMCMx_STATES_B System logical states in ARMv7-M mode * The ChibiOS/RT logical system states are mapped as follow in the ARM * Cortex-M3 port: * - Init. This state is represented by the startup code and the @@ -99,7 +99,7 @@ * the maskable interrupt sources. The ARM state is whatever the processor * was running when @p chSysHalt() was invoked. * . - * @section ARMCMx_NOTES The ARM Cortex-Mx port notes + * @section ARMCMx_NOTES ARM Cortex-Mx/GCC port notes * The ARM Cortex-Mx port is organized as follow: * - The @p main() function is invoked in thread-privileged mode. * - Each thread has a private process stack, the system has a single main -- cgit v1.2.3