From e9d7b9de5705a3b5c0b822077fbd165c86087481 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Oct 2009 11:07:15 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1230 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/ARMCM3/chcore.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'os/ports/GCC/ARMCM3') diff --git a/os/ports/GCC/ARMCM3/chcore.c b/os/ports/GCC/ARMCM3/chcore.c index fbf201a56..8f99d3dec 100644 --- a/os/ports/GCC/ARMCM3/chcore.c +++ b/os/ports/GCC/ARMCM3/chcore.c @@ -92,22 +92,22 @@ void SVCallVector(Thread *otp, Thread *ntp) { asm volatile ("mrs r3, BASEPRI \n\t" \ "mrs r12, PSP \n\t" \ "stmdb r12!, {r3-r6,r8-r11, lr} \n\t" \ - "str r12, [r0, #16] \n\t" \ - "ldr r12, [r1, #16] \n\t" \ + "str r12, [%0, #16] \n\t" \ + "ldr r12, [%1, #16] \n\t" \ "ldmia r12!, {r3-r6,r8-r11, lr} \n\t" \ "msr PSP, r12 \n\t" \ "msr BASEPRI, r3 \n\t" \ - "bx lr "); + "bx lr" : : "r" (otp), "r" (ntp)); #else asm volatile ("mrs r3, BASEPRI \n\t" \ "mrs r12, PSP \n\t" \ "stmdb r12!, {r3-r11, lr} \n\t" \ - "str r12, [r0, #16] \n\t" \ - "ldr r12, [r1, #16] \n\t" \ + "str r12, [%0, #16] \n\t" \ + "ldr r12, [%1, #16] \n\t" \ "ldmia r12!, {r3-r11, lr} \n\t" \ "msr PSP, r12 \n\t" \ "msr BASEPRI, r3 \n\t" \ - "bx lr "); + "bx lr" : : "r" (otp), "r" (ntp)); #endif } -- cgit v1.2.3