From ecfed423dbaeda8cd0e7ad5f51fe8a76ea82f409 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 18 Mar 2018 12:43:14 +0000 Subject: Fixed bug #927. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11811 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/STM32F0xx/hal_lld.c | 3 +-- os/hal/ports/STM32/STM32F1xx/hal_lld.c | 3 +-- os/hal/ports/STM32/STM32F37x/hal_lld.c | 3 +-- os/hal/ports/STM32/STM32F3xx/hal_lld.c | 3 +-- os/hal/ports/STM32/STM32F4xx/hal_lld.c | 3 +-- os/hal/ports/STM32/STM32F7xx/hal_lld.c | 3 +-- 6 files changed, 6 insertions(+), 12 deletions(-) (limited to 'os/hal') diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.c b/os/hal/ports/STM32/STM32F0xx/hal_lld.c index ef3469484..d512e786c 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.c @@ -272,8 +272,7 @@ void stm32_clock_init(void) { /* HSI is selected as new source without touching the other fields in CFGR. Clearing the register has to be postponed after HSI is the new source.*/ - RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ - RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/ + RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; /* Wait until HSI is selected. */ diff --git a/os/hal/ports/STM32/STM32F1xx/hal_lld.c b/os/hal/ports/STM32/STM32F1xx/hal_lld.c index d72e1c65b..5b948be05 100644 --- a/os/hal/ports/STM32/STM32F1xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F1xx/hal_lld.c @@ -253,8 +253,7 @@ void stm32_clock_init(void) { /* HSI is selected as new source without touching the other fields in CFGR. Clearing the register has to be postponed after HSI is the new source.*/ - RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ - RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/ + RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; /* Wait until HSI is selected. */ diff --git a/os/hal/ports/STM32/STM32F37x/hal_lld.c b/os/hal/ports/STM32/STM32F37x/hal_lld.c index e759ec85b..fb398536c 100644 --- a/os/hal/ports/STM32/STM32F37x/hal_lld.c +++ b/os/hal/ports/STM32/STM32F37x/hal_lld.c @@ -154,8 +154,7 @@ void stm32_clock_init(void) { /* HSI is selected as new source without touching the other fields in CFGR. Clearing the register has to be postponed after HSI is the new source.*/ - RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ - RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/ + RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; /* Wait until HSI is selected. */ diff --git a/os/hal/ports/STM32/STM32F3xx/hal_lld.c b/os/hal/ports/STM32/STM32F3xx/hal_lld.c index 71e298147..766675b65 100644 --- a/os/hal/ports/STM32/STM32F3xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F3xx/hal_lld.c @@ -159,8 +159,7 @@ void stm32_clock_init(void) { /* HSI is selected as new source without touching the other fields in CFGR. Clearing the register has to be postponed after HSI is the new source.*/ - RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ - RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/ + RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; /* Wait until HSI is selected. */ diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.c b/os/hal/ports/STM32/STM32F4xx/hal_lld.c index dd4f2b866..d74ddbf0e 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.c @@ -177,8 +177,7 @@ void stm32_clock_init(void) { /* HSI is selected as new source without touching the other fields in CFGR. Clearing the register has to be postponed after HSI is the new source.*/ - RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ - RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/ + RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; /* Wait until HSI is selected. */ diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index 770c84444..706082d57 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -184,8 +184,7 @@ void stm32_clock_init(void) { /* HSI is selected as new source without touching the other fields in CFGR. Clearing the register has to be postponed after HSI is the new source.*/ - RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ - RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/ + RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) ; /* Wait until HSI is selected. */ -- cgit v1.2.3