From dd78c66c35fecadb890236fd870799a748ab5bbd Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Sat, 1 Jun 2013 18:34:05 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5792 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/SPC560BCxx/spc560bc_registry.h | 12 ++++++++ os/hal/platforms/SPC560Pxx/spc560p_registry.h | 2 ++ os/hal/platforms/SPC56ELxx/spc56el_registry.h | 4 +++ os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c | 39 +++++++++---------------- 4 files changed, 31 insertions(+), 26 deletions(-) (limited to 'os/hal') diff --git a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h index 2d449a5b6..79a335075 100644 --- a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h +++ b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h @@ -109,6 +109,8 @@ #define SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_NUMBER 71 #define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_NUMBER 72 #define SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_NUMBER 73 +#define SPC5_FLEXCAN0_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_START_PCTL); +#define SPC5_FLEXCAN0_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_STOP_PCTL); #define SPC5_HAS_FLEXCAN1 TRUE #define SPC5_FLEXCAN1_PCTL 17 @@ -129,6 +131,8 @@ #define SPC5_FLEXCAN1_FLEXCAN_BUF_12_15_NUMBER 91 #define SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_NUMBER 92 #define SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_NUMBER 93 +#define SPC5_FLEXCAN1_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN1_PCTL, SPC5_CAN_FLEXCAN1_START_PCTL); +#define SPC5_FLEXCAN1_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN1_PCTL, SPC5_CAN_FLEXCAN1_STOP_PCTL); #define SPC5_HAS_FLEXCAN2 TRUE #define SPC5_FLEXCAN2_PCTL 18 @@ -149,6 +153,8 @@ #define SPC5_FLEXCAN2_FLEXCAN_BUF_12_15_NUMBER 111 #define SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_NUMBER 112 #define SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_NUMBER 113 +#define SPC5_FLEXCAN2_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN2_PCTL, SPC5_CAN_FLEXCAN2_START_PCTL); +#define SPC5_FLEXCAN2_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN2_PCTL, SPC5_CAN_FLEXCAN2_START_PCTL); #define SPC5_HAS_FLEXCAN3 TRUE #define SPC5_FLEXCAN3_PCTL 19 @@ -169,6 +175,8 @@ #define SPC5_FLEXCAN3_FLEXCAN_BUF_12_15_NUMBER 179 #define SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_NUMBER 180 #define SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_NUMBER 181 +#define SPC5_FLEXCAN3_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN3_PCTL, SPC5_CAN_FLEXCAN3_START_PCTL); +#define SPC5_FLEXCAN3_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN3_PCTL, SPC5_CAN_FLEXCAN3_STOP_PCTL); #define SPC5_HAS_FLEXCAN4 TRUE #define SPC5_FLEXCAN4_PCTL 20 @@ -189,6 +197,8 @@ #define SPC5_FLEXCAN4_FLEXCAN_BUF_12_15_NUMBER 196 #define SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_NUMBER 197 #define SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_NUMBER 198 +#define SPC5_FLEXCAN4_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN4_PCTL, SPC5_CAN_FLEXCAN4_START_PCTL); +#define SPC5_FLEXCAN4_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN4_PCTL, SPC5_CAN_FLEXCAN4_STOP_PCTL); #define SPC5_HAS_FLEXCAN5 TRUE #define SPC5_FLEXCAN5_PCTL 21 @@ -209,6 +219,8 @@ #define SPC5_FLEXCAN5_FLEXCAN_BUF_12_15_NUMBER 208 #define SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_NUMBER 209 #define SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_NUMBER 210 +#define SPC5_FLEXCAN5_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN5_PCTL, SPC5_CAN_FLEXCAN5_START_PCTL); +#define SPC5_FLEXCAN5_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN5_PCTL, SPC5_CAN_FLEXCAN5_STOP_PCTL); /** @} */ #endif /* _SPC560BC_REGISTRY_H_ */ diff --git a/os/hal/platforms/SPC560Pxx/spc560p_registry.h b/os/hal/platforms/SPC560Pxx/spc560p_registry.h index a43b0ef2b..f97db2b2c 100644 --- a/os/hal/platforms/SPC560Pxx/spc560p_registry.h +++ b/os/hal/platforms/SPC560Pxx/spc560p_registry.h @@ -165,6 +165,8 @@ #define SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_NUMBER 70 #define SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_NUMBER 71 #define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_NUMBER 72 +#define SPC5_FLEXCAN0_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_START_PCTL); +#define SPC5_FLEXCAN0_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_STOP_PCTL); /** @} */ #endif /* _SPC560P_REGISTRY_H_ */ diff --git a/os/hal/platforms/SPC56ELxx/spc56el_registry.h b/os/hal/platforms/SPC56ELxx/spc56el_registry.h index 8d5dd45fd..fcbd3d3d8 100644 --- a/os/hal/platforms/SPC56ELxx/spc56el_registry.h +++ b/os/hal/platforms/SPC56ELxx/spc56el_registry.h @@ -214,6 +214,8 @@ #define SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_NUMBER 70 #define SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_NUMBER 71 #define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_NUMBER 72 +#define SPC5_FLEXCAN0_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_START_PCTL); +#define SPC5_FLEXCAN0_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_STOP_PCTL); #define SPC5_HAS_FLEXCAN1 TRUE #define SPC5_FLEXCAN1_PCTL 17 @@ -234,6 +236,8 @@ #define SPC5_FLEXCAN1_FLEXCAN_BUF_08_11_NUMBER 90 #define SPC5_FLEXCAN1_FLEXCAN_BUF_12_15_NUMBER 91 #define SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_NUMBER 92 +#define SPC5_FLEXCAN1_ENABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN1_PCTL, SPC5_CAN_FLEXCAN1_START_PCTL); +#define SPC5_FLEXCAN1_DISABLE_CLOCK() halSPCSetPeripheralClockMode(SPC5_FLEXCAN1_PCTL, SPC5_CAN_FLEXCAN1_STOP_PCTL); /** @} */ #endif /* _SPC56EL_REGISTRY_H_ */ diff --git a/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c b/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c index 2d8ceda5c..09e8ed55d 100644 --- a/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c +++ b/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c @@ -930,8 +930,6 @@ void can_lld_init(void) { SPC5_CAN_FLEXCAN3_IRQ_PRIORITY; INTC.PSR[SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_NUMBER].R = SPC5_CAN_FLEXCAN3_IRQ_PRIORITY; - INTC.PSR[SPC5_FLEXCAN3_FLEXCAN_ESR_WAK_NUMBER].R = - SPC5_CAN_FLEXCAN3_IRQ_PRIORITY; INTC.PSR[SPC5_FLEXCAN3_FLEXCAN_BUF_00_03_NUMBER].R = SPC5_CAN_FLEXCAN3_IRQ_PRIORITY; INTC.PSR[SPC5_FLEXCAN3_FLEXCAN_BUF_04_07_NUMBER].R = @@ -1000,43 +998,37 @@ void can_lld_start(CANDriver *canp) { #if SPC5_CAN_USE_FLEXCAN0 /* Set peripheral clock mode.*/ if(&CAND1 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, - SPC5_CAN_FLEXCAN0_START_PCTL); + SPC5_FLEXCAN0_ENABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN1 /* Set peripheral clock mode.*/ if(&CAND2 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN1_PCTL, - SPC5_CAN_FLEXCAN1_START_PCTL); + SPC5_FLEXCAN1_ENABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN2 /* Set peripheral clock mode.*/ if(&CAND3 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN2_PCTL, - SPC5_CAN_FLEXCAN2_START_PCTL); + SPC5_FLEXCAN2_ENABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN3 /* Set peripheral clock mode.*/ if(&CAND4 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN3_PCTL, - SPC5_CAN_FLEXCAN3_START_PCTL); + SPC5_FLEXCAN3_ENABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN4 /* Set peripheral clock mode.*/ if(&CAND5 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN4_PCTL, - SPC5_CAN_FLEXCAN4_START_PCTL); + SPC5_FLEXCAN4_ENABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN5 /* Set peripheral clock mode.*/ if(&CAND6 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN5_PCTL, - SPC5_CAN_FLEXCAN5_START_PCTL); + SPC5_FLEXCAN5_ENABLE_CLOCK(); #endif /* Entering initialization mode. */ @@ -1268,38 +1260,33 @@ void can_lld_stop(CANDriver *canp) { #if SPC5_CAN_USE_FLEXCAN0 /* Set peripheral clock mode.*/ if(&CAND1 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, - SPC5_CAN_FLEXCAN0_STOP_PCTL); + SPC5_FLEXCAN0_DISABLE_CLOCK(); + #endif #if SPC5_CAN_USE_FLEXCAN1 /* Set peripheral clock mode.*/ if(&CAND2 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN1_PCTL, - SPC5_CAN_FLEXCAN1_STOP_PCTL); + SPC5_FLEXCAN1_DISABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN2 /* Set peripheral clock mode.*/ if(&CAND3 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN2_PCTL, - SPC5_CAN_FLEXCAN2_STOP_PCTL); + SPC5_FLEXCAN2_DISABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN3 /* Set peripheral clock mode.*/ if(&CAND4 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN3_PCTL, - SPC5_CAN_FLEXCAN3_STOP_PCTL); + SPC5_FLEXCAN3_DISABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN4 /* Set peripheral clock mode.*/ if(&CAND5 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN4_PCTL, - SPC5_CAN_FLEXCAN4_STOP_PCTL); + SPC5_FLEXCAN4_DISABLE_CLOCK(); #endif #if SPC5_CAN_USE_FLEXCAN5 /* Set peripheral clock mode.*/ if(&CAND6 == canp) - halSPCSetPeripheralClockMode(SPC5_FLEXCAN5_PCTL, - SPC5_CAN_FLEXCAN5_STOP_PCTL); + SPC5_FLEXCAN5_DISABLE_CLOCK(); #endif } } -- cgit v1.2.3