From d4481fd211ea38aba3b32ace750834e5783f05e9 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 8 May 2018 12:36:23 +0000 Subject: H7 OTG changes, not complete. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12015 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h | 10 ++++++++++ os/hal/ports/STM32/STM32H7xx/hal_lld.h | 10 +++++----- os/hal/ports/STM32/STM32H7xx/platform.mk | 1 + 3 files changed, 16 insertions(+), 5 deletions(-) (limited to 'os/hal') diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h index 7c2019685..8b8e39b7f 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h @@ -241,6 +241,16 @@ #define STM32_USBCLK STM32_OTGFSCLK #elif defined(STM32L4XX) #define STM32_USBCLK STM32_48CLK +#elif defined(STM32H7XX) +/* Defines directly STM32_USBCLK.*/ +#define rccEnableOTG_FS rccEnableUSB1_OTG_HS +#define rccDisableOTG_FS rccDisableUSB1_OTG_HS +#define rccResetOTG_FS rccResetUSB1_OTG_HS +#define rccEnableOTG_HS rccEnableUSB2_OTG_HS +#define rccDisableOTG_HS rccDisableUSB2_OTG_HS +#define rccResetOTG_HS rccResetUSB2_OTG_HS +#define rccEnableOTG_HSULPI rccEnableUSB2_HSULPI +#define rccDisableOTG_HSULPI rccDisableUSB2_HSULPI #else #error "unsupported STM32 platform for OTG functionality" #endif diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/os/hal/ports/STM32/STM32H7xx/hal_lld.h index 6586d4c14..19e392b9d 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.h @@ -860,7 +860,7 @@ * @note The allowed values are 4..512. */ #if !defined(STM32_PLL3_DIVN_VALUE) || defined(__DOXYGEN__) -#define STM32_PLL3_DIVN_VALUE 400 +#define STM32_PLL3_DIVN_VALUE 240 #endif /** @@ -876,7 +876,7 @@ * @note The allowed values are 2..128, odd values not allowed. */ #if !defined(STM32_PLL3_DIVP_VALUE) || defined(__DOXYGEN__) -#define STM32_PLL3_DIVP_VALUE 8 +#define STM32_PLL3_DIVP_VALUE 10 #endif /** @@ -884,7 +884,7 @@ * @note The allowed values are 1..128. */ #if !defined(STM32_PLL3_DIVQ_VALUE) || defined(__DOXYGEN__) -#define STM32_PLL3_DIVQ_VALUE 8 +#define STM32_PLL3_DIVQ_VALUE 10 #endif /** @@ -892,7 +892,7 @@ * @note The allowed values are 1..128. */ #if !defined(STM32_PLL3_DIVR_VALUE) || defined(__DOXYGEN__) -#define STM32_PLL3_DIVR_VALUE 8 +#define STM32_PLL3_DIVR_VALUE 10 #endif /** @@ -1125,7 +1125,7 @@ * @brief USB clock source. */ #if !defined(STM32_USBSEL) || defined(__DOXYGEN__) -#define STM32_USBSEL STM32_USBSEL_PLL1_Q_CK +#define STM32_USBSEL STM32_USBSEL_PLL3_Q_CK #endif /** diff --git a/os/hal/ports/STM32/STM32H7xx/platform.mk b/os/hal/ports/STM32/STM32H7xx/platform.mk index 359ba7fef..e7595a12b 100644 --- a/os/hal/ports/STM32/STM32H7xx/platform.mk +++ b/os/hal/ports/STM32/STM32H7xx/platform.mk @@ -27,6 +27,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/CRYPv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv3/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv3/driver.mk +include $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv3/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk -- cgit v1.2.3