From ca1927e0088226908f382cb6f33edd1b32686e70 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 1 Jul 2018 09:24:31 +0000 Subject: Fixed bug #956. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12126 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c | 4 +-- os/hal/ports/STM32/STM32F0xx/hal_lld.h | 10 ++++++ os/hal/ports/STM32/STM32F0xx/stm32_rcc.h | 46 +++++++++++++++++++++++++++ 3 files changed, 58 insertions(+), 2 deletions(-) (limited to 'os/hal') diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c index 1c4cafd81..214786cab 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c @@ -685,8 +685,8 @@ void uart_lld_init(void) { #endif #endif -#if STM32_UART_USE_USART3 || STM32_UART_USE_UART4 || \ - STM32_UART_USE_UART5 || STM32_UART_USE_USART6 || \ +#if STM32_UART_USE_USART3 || STM32_UART_USE_UART4 || \ + STM32_UART_USE_UART5 || STM32_UART_USE_USART6 || \ STM32_UART_USE_UART7 || STM32_UART_USE_UART8 #if defined(STM32_USART3_8_HANDLER) nvicEnableVector(STM32_USART3_8_NUMBER, STM32_UART_USART3_8_IRQ_PRIORITY); diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h index e018cc38e..66d55bd53 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h @@ -935,6 +935,16 @@ */ #define STM32_USART6CLK STM32_PCLK +/** + * @brief USART7 frequency. + */ +#define STM32_UART7CLK STM32_PCLK + +/** + * @brief USART8 frequency. + */ +#define STM32_UART8CLK STM32_PCLK + /** * @brief Timers clock. */ diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h index 7feb343bf..091f60882 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h @@ -805,6 +805,52 @@ * @api */ #define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST) + +/** + * @brief Enables the UART7 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableUART7(lp) rccEnableAPB2(RCC_APB2ENR_USART7EN, lp) + +/** + * @brief Disables the UART7 peripheral clock. + * + * @api + */ +#define rccDisableUART7() rccDisableAPB2(RCC_APB2ENR_USART7EN) + +/** + * @brief Resets the UART7 peripheral. + * + * @api + */ +#define rccResetUART7() rccResetAPB2(RCC_APB2RSTR_USART7RST) + +/** + * @brief Enables the UART8 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableUART8(lp) rccEnableAPB2(RCC_APB2ENR_USART8EN, lp) + +/** + * @brief Disables the UART8 peripheral clock. + * + * @api + */ +#define rccDisableUART8() rccDisableAPB2(RCC_APB2ENR_USART8EN) + +/** + * @brief Resets the UART8 peripheral. + * + * @api + */ +#define rccResetUART8() rccResetAPB2(RCC_APB2RSTR_USART8RST) /** @} */ /** -- cgit v1.2.3