From 9343707ee283190273d0c4e94f8fdf1b9d264905 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 12 Jun 2013 14:08:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5843 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/SPC560Dxx/spc560d_registry.h | 2 +- os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c | 2 +- os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h | 16 ++++++++++------ os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c | 2 +- os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h | 10 +++++----- 5 files changed, 18 insertions(+), 14 deletions(-) (limited to 'os/hal') diff --git a/os/hal/platforms/SPC560Dxx/spc560d_registry.h b/os/hal/platforms/SPC560Dxx/spc560d_registry.h index 294e6d118..108ee04e1 100644 --- a/os/hal/platforms/SPC560Dxx/spc560d_registry.h +++ b/os/hal/platforms/SPC560Dxx/spc560d_registry.h @@ -107,7 +107,7 @@ #define SPC5_SIUL_PCTL 68 #define SPC5_SIUL_NUM_PORTS 8 #define SPC5_SIUL_NUM_PCRS 123 -#define SPC5_SIUL_NUM_PADSELS 32 +#define SPC5_SIUL_NUM_PADSELS 63 #define SPC5_SIUL_SYSTEM_PINS 32,33,121,122 /** @} */ diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c index 90c1dc5bf..d8ae4b2d5 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c @@ -95,7 +95,7 @@ skip: /* Initialize PCR registers for defined pads.*/ i = 0; - while (config->inits[i].pcr_value != 0) { + while (config->inits[i].pcr_index != -1) { SIU.GPDO[config->inits[i].pcr_index].R = config->inits[i].gpdo_value; SIU.PCR[config->inits[i].pcr_index].R = config->inits[i].pcr_value; i++; diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h index dac37c448..5304ac36d 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h @@ -104,8 +104,12 @@ /** * @brief Alternate "n" output pad. + * @note Both the IBE and OBE bits are specified in this mask, the OBE + * bit is not required for some PCRs but in that case it is + * ignored. */ -#define PAL_MODE_OUTPUT_ALTERNATE(n) (PAL_SPC5_IBE | PAL_SPC5_PA(n)) +#define PAL_MODE_OUTPUT_ALTERNATE(n) (PAL_SPC5_IBE | PAL_SPC5_OBE | \ + PAL_SPC5_PA(n)) /** @} */ /*===========================================================================*/ @@ -145,7 +149,7 @@ typedef uint32_t ioportid_t; * @brief SIUL register initializer type. */ typedef struct { - uint8_t pcr_index; + int32_t pcr_index; uint8_t gpdo_value; iomode_t pcr_value; } spc_siu_init_t; @@ -264,7 +268,7 @@ typedef struct { * @notapi */ #define pal_lld_writeport(port, bits) \ - (((volatile uint16_t *)SIU.PGPDO)[port] = (bits)) + (((volatile uint16_t *)SIU.PGPDO)[port] = (bits)) /** * @brief Reads a group of bits. @@ -353,7 +357,7 @@ typedef struct { * @notapi */ #define pal_lld_setpad(port, pad) \ - (SIU.GPDO[((port) * 16) + (pad)].R = 1) + (SIU.GPDO[((port) * 16) + (pad)].R = 1) /** * @brief Clears a pad logical state to @p PAL_LOW. @@ -364,7 +368,7 @@ typedef struct { * @notapi */ #define pal_lld_clearpad(port, pad) \ - (SIU.GPDO[((port) * 16) + (pad)].R = 0) + (SIU.GPDO[((port) * 16) + (pad)].R = 0) /** * @brief Toggles a pad logical state. @@ -378,7 +382,7 @@ typedef struct { * @notapi */ #define pal_lld_togglepad(port, pad) \ - (SIU.GPDO[((port) * 16) + (pad)].R = ~SIU.GPDO[((port) * 16) + (pad)].R) + (SIU.GPDO[((port) * 16) + (pad)].R = ~SIU.GPDO[((port) * 16) + (pad)].R) /** * @brief Pad mode setup. diff --git a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c index 24c0908ce..1d77a177a 100644 --- a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c +++ b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.c @@ -67,7 +67,7 @@ void _pal_lld_init(const PALConfig *config) { /* Initialize PCR registers for defined pads.*/ i = 0; - while (config->inits[i].pcr_value != 0) { + while (config->inits[i].pcr_index != -1) { SIU.GPDO[config->inits[i].pcr_index].R = config->inits[i].gpdo_value; SIU.PCR[config->inits[i].pcr_index].R = config->inits[i].pcr_value; i++; diff --git a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h index f8648b305..b9c72bf0c 100644 --- a/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h +++ b/os/hal/platforms/SPC5xx/SIU_v1/pal_lld.h @@ -146,7 +146,7 @@ typedef uint16_t iomode_t; * @brief SIU/SIUL register initializer type. */ typedef struct { - uint8_t pcr_index; + int32_t pcr_index; uint8_t gpdo_value; iomode_t pcr_value; } spc_siu_init_t; @@ -262,7 +262,7 @@ typedef struct { * @notapi */ #define pal_lld_writeport(port, bits) \ - (((volatile uint16_t *)SIU.PGPDO)[port] = (bits)) + (((volatile uint16_t *)SIU.PGPDO)[port] = (bits)) /** * @brief Reads a group of bits. @@ -353,7 +353,7 @@ typedef struct { * @notapi */ #define pal_lld_setpad(port, pad) \ - (SIU.GPDO[((port) * 16) + (pad)].R = 1) + (SIU.GPDO[((port) * 16) + (pad)].R = 1) /** * @brief Clears a pad logical state to @p PAL_LOW. @@ -364,7 +364,7 @@ typedef struct { * @notapi */ #define pal_lld_clearpad(port, pad) \ - (SIU.GPDO[((port) * 16) + (pad)].R = 0) + (SIU.GPDO[((port) * 16) + (pad)].R = 0) /** * @brief Toggles a pad logical state. @@ -378,7 +378,7 @@ typedef struct { * @notapi */ #define pal_lld_togglepad(port, pad) \ - (SIU.GPDO[((port) * 16) + (pad)].R = ~SIU.GPDO[((port) * 16) + (pad)].R) + (SIU.GPDO[((port) * 16) + (pad)].R = ~SIU.GPDO[((port) * 16) + (pad)].R) /** * @brief Pad mode setup. -- cgit v1.2.3