From 710dcf1e6821f12af79c4ede76dcfe012cea95dd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Jun 2013 06:27:48 +0000 Subject: Fixed bug #416. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5821 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/USARTv1/serial_lld.c | 14 +++++++------- os/hal/platforms/STM32/USARTv1/serial_lld.h | 8 ++++---- os/hal/platforms/STM32/USARTv2/serial_lld.c | 12 ++++++------ os/hal/platforms/STM32/USARTv2/serial_lld.h | 8 ++++---- 4 files changed, 21 insertions(+), 21 deletions(-) (limited to 'os/hal') diff --git a/os/hal/platforms/STM32/USARTv1/serial_lld.c b/os/hal/platforms/STM32/USARTv1/serial_lld.c index 0d00a501b..a8333bf77 100644 --- a/os/hal/platforms/STM32/USARTv1/serial_lld.c +++ b/os/hal/platforms/STM32/USARTv1/serial_lld.c @@ -98,16 +98,16 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) { #else if (sdp->usart == USART1) #endif - u->BRR = STM32_PCLK2 / config->sc_speed; + u->BRR = STM32_PCLK2 / config->speed; else - u->BRR = STM32_PCLK1 / config->sc_speed; + u->BRR = STM32_PCLK1 / config->speed; /* Note that some bits are enforced.*/ - u->CR2 = config->sc_cr2 | USART_CR2_LBDIE; - u->CR3 = config->sc_cr3 | USART_CR3_EIE; - u->CR1 = config->sc_cr1 | USART_CR1_UE | USART_CR1_PEIE | - USART_CR1_RXNEIE | USART_CR1_TE | - USART_CR1_RE; + u->CR2 = config->cr2 | USART_CR2_LBDIE; + u->CR3 = config->cr3 | USART_CR3_EIE; + u->CR1 = config->cr1 | USART_CR1_UE | USART_CR1_PEIE | + USART_CR1_RXNEIE | USART_CR1_TE | + USART_CR1_RE; u->SR = 0; (void)u->SR; /* SR reset step 1.*/ (void)u->DR; /* SR reset step 2.*/ diff --git a/os/hal/platforms/STM32/USARTv1/serial_lld.h b/os/hal/platforms/STM32/USARTv1/serial_lld.h index d71068577..7242537d7 100644 --- a/os/hal/platforms/STM32/USARTv1/serial_lld.h +++ b/os/hal/platforms/STM32/USARTv1/serial_lld.h @@ -216,20 +216,20 @@ typedef struct { /** * @brief Bit rate. */ - uint32_t sc_speed; + uint32_t speed; /* End of the mandatory fields.*/ /** * @brief Initialization value for the CR1 register. */ - uint16_t sc_cr1; + uint16_t cr1; /** * @brief Initialization value for the CR2 register. */ - uint16_t sc_cr2; + uint16_t cr2; /** * @brief Initialization value for the CR3 register. */ - uint16_t sc_cr3; + uint16_t cr3; } SerialConfig; /** diff --git a/os/hal/platforms/STM32/USARTv2/serial_lld.c b/os/hal/platforms/STM32/USARTv2/serial_lld.c index 489edae4d..5209c499b 100644 --- a/os/hal/platforms/STM32/USARTv2/serial_lld.c +++ b/os/hal/platforms/STM32/USARTv2/serial_lld.c @@ -93,14 +93,14 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) { USART_TypeDef *u = sdp->usart; /* Baud rate setting.*/ - u->BRR = (uint16_t)(sdp->clock / config->sc_speed); + u->BRR = (uint16_t)(sdp->clock / config->speed); /* Note that some bits are enforced.*/ - u->CR2 = config->sc_cr2 | USART_CR2_LBDIE; - u->CR3 = config->sc_cr3 | USART_CR3_EIE; - u->CR1 = config->sc_cr1 | USART_CR1_UE | USART_CR1_PEIE | - USART_CR1_RXNEIE | USART_CR1_TE | - USART_CR1_RE; + u->CR2 = config->cr2 | USART_CR2_LBDIE; + u->CR3 = config->cr3 | USART_CR3_EIE; + u->CR1 = config->cr1 | USART_CR1_UE | USART_CR1_PEIE | + USART_CR1_RXNEIE | USART_CR1_TE | + USART_CR1_RE; u->ICR = 0xFFFFFFFF; } diff --git a/os/hal/platforms/STM32/USARTv2/serial_lld.h b/os/hal/platforms/STM32/USARTv2/serial_lld.h index ac18c009d..743cb0b50 100644 --- a/os/hal/platforms/STM32/USARTv2/serial_lld.h +++ b/os/hal/platforms/STM32/USARTv2/serial_lld.h @@ -216,20 +216,20 @@ typedef struct { /** * @brief Bit rate. */ - uint32_t sc_speed; + uint32_t speed; /* End of the mandatory fields.*/ /** * @brief Initialization value for the CR1 register. */ - uint16_t sc_cr1; + uint32_t cr1; /** * @brief Initialization value for the CR2 register. */ - uint16_t sc_cr2; + uint32_t cr2; /** * @brief Initialization value for the CR3 register. */ - uint16_t sc_cr3; + uint32_t cr3; } SerialConfig; /** -- cgit v1.2.3