From 27a100a5188bfd8da87386f2397bf3c73923dd13 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Fri, 27 Jul 2018 11:30:29 +0000
Subject: Boost mode handling in L4+.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12200 110e8d01-0319-4d1e-a829-52ad28d1bb01
---
 os/hal/ports/STM32/STM32L4xx+/hal_lld.c |  7 +++++--
 os/hal/ports/STM32/STM32L4xx+/hal_lld.h | 17 ++++++++++++++++-
 2 files changed, 21 insertions(+), 3 deletions(-)

(limited to 'os/hal')

diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.c b/os/hal/ports/STM32/STM32L4xx+/hal_lld.c
index a144142bb..fa843f86d 100644
--- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.c
+++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.c
@@ -15,8 +15,8 @@
 */
 
 /**
- * @file    STM32L4xx/hal_lld.c
- * @brief   STM32L4xx HAL subsystem low level driver source.
+ * @file    STM32L4xx+/hal_lld.c
+ * @brief   STM32L4xx+ HAL subsystem low level driver source.
  *
  * @addtogroup HAL
  * @{
@@ -187,6 +187,9 @@ void stm32_clock_init(void) {
   while ((PWR->SR2 & PWR_SR2_VOSF) != 0)    /* Wait until regulator is      */
     ;                                       /* stable.                      */
 
+  /* Boost mode setting.*/
+  PWR->CR5 = STM32_R1MODE;
+
 #if STM32_HSI16_ENABLED
   /* HSI activation.*/
   RCC->CR |= RCC_CR_HSION;
diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
index 8032c161b..45b1c5855 100644
--- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
@@ -879,10 +879,15 @@
  * @{
  */
 /**
- * @brief   Maximum SYSCLK clock frequency at current voltage setting.
+ * @brief   Maximum SYSCLK clock frequency in boost mode.
  */
 #define STM32_SYSCLK_MAX            120000000
 
+/**
+ * @brief   Maximum SYSCLK clock frequency in normal mode.
+ */
+#define STM32_SYSCLK_NOBOOST_MAX    80000000
+
 /**
  * @brief   Maximum HSE clock frequency at current voltage setting.
  */
@@ -1003,6 +1008,7 @@
 
 #elif STM32_VOS == STM32_VOS_RANGE2
 #define STM32_SYSCLK_MAX            26000000
+#define STM32_SYSCLK_NOBOOST_MAX    26000000
 #define STM32_HSECLK_MAX            26000000
 #define STM32_HSECLK_BYP_MAX        26000000
 #define STM32_HSECLK_MIN            8000000
@@ -2220,6 +2226,15 @@
 #define STM32_TIMCLK2               (STM32_PCLK2 * 2)
 #endif
 
+/**
+ * @brief   Voltage boost settings.
+ */
+#if (STM32_SYSCLK <= STM32_SYSCLK_NOBOOST_MAX) || defined(__DOXYGEN__)
+#define STM32_R1MODE                PWR_R1MODE
+#else
+#define STM32_R1MODE                0
+#endif
+
 /**
  * @brief   Flash settings.
  */
-- 
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