From 16176f7bdfe022cb4934e20d8d7d19e2a26c954e Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Thu, 21 Jun 2012 16:39:53 +0000
Subject: STM32 GPT driver adapted to the new ISR names.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4314 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32/gpt_lld.c | 36 ++++++++++++++++++------------------
 os/hal/platforms/STM32/stm32.h   |  3 ---
 2 files changed, 18 insertions(+), 21 deletions(-)

(limited to 'os/hal')

diff --git a/os/hal/platforms/STM32/gpt_lld.c b/os/hal/platforms/STM32/gpt_lld.c
index d36e3e26d..36b1b8fd3 100644
--- a/os/hal/platforms/STM32/gpt_lld.c
+++ b/os/hal/platforms/STM32/gpt_lld.c
@@ -116,7 +116,7 @@ static void gpt_lld_serve_interrupt(GPTDriver *gptp) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -132,7 +132,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(TIM2_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -148,7 +148,7 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(TIM3_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -164,7 +164,7 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(TIM4_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -180,7 +180,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(TIM5_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -196,7 +196,7 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) {
  *
  * @isr
  */
-CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
 
   CH_IRQ_PROLOGUE();
 
@@ -270,7 +270,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD1 == gptp) {
       rccEnableTIM1(FALSE);
       rccResetTIM1();
-      nvicEnableVector(TIM1_UP_IRQn,
+      nvicEnableVector(STM32_TIM1_UP_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM1_IRQ_PRIORITY));
       gptp->clock = STM32_TIMCLK2;
     }
@@ -279,7 +279,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD2 == gptp) {
       rccEnableTIM2(FALSE);
       rccResetTIM2();
-      nvicEnableVector(TIM2_IRQn,
+      nvicEnableVector(STM32_TIM2_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM2_IRQ_PRIORITY));
       gptp->clock = STM32_TIMCLK1;
     }
@@ -288,7 +288,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD3 == gptp) {
       rccEnableTIM3(FALSE);
       rccResetTIM3();
-      nvicEnableVector(TIM3_IRQn,
+      nvicEnableVector(STM32_TIM3_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM3_IRQ_PRIORITY));
       gptp->clock = STM32_TIMCLK1;
     }
@@ -297,7 +297,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD4 == gptp) {
       rccEnableTIM4(FALSE);
       rccResetTIM4();
-      nvicEnableVector(TIM4_IRQn,
+      nvicEnableVector(STM32_TIM4_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM4_IRQ_PRIORITY));
       gptp->clock = STM32_TIMCLK1;
     }
@@ -307,7 +307,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD5 == gptp) {
       rccEnableTIM5(FALSE);
       rccResetTIM5();
-      nvicEnableVector(TIM5_IRQn,
+      nvicEnableVector(STM32_TIM5_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM5_IRQ_PRIORITY));
       gptp->clock = STM32_TIMCLK1;
     }
@@ -317,7 +317,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD8 == gptp) {
       rccEnableTIM8(FALSE);
       rccResetTIM8();
-      nvicEnableVector(TIM8_UP_IRQn,
+      nvicEnableVector(STM32_TIM8_UP_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM8_IRQ_PRIORITY));
       gptp->clock = STM32_TIMCLK2;
     }
@@ -352,37 +352,37 @@ void gpt_lld_stop(GPTDriver *gptp) {
 
 #if STM32_GPT_USE_TIM1
     if (&GPTD1 == gptp) {
-      nvicDisableVector(TIM1_UP_IRQn);
+      nvicDisableVector(STM32_TIM1_UP_NUMBER);
       rccDisableTIM1(FALSE);
     }
 #endif
 #if STM32_GPT_USE_TIM2
     if (&GPTD2 == gptp) {
-      nvicDisableVector(TIM2_IRQn);
+      nvicDisableVector(STM32_TIM2_NUMBER);
       rccDisableTIM2(FALSE);
     }
 #endif
 #if STM32_GPT_USE_TIM3
     if (&GPTD3 == gptp) {
-      nvicDisableVector(TIM3_IRQn);
+      nvicDisableVector(STM32_TIM3_NUMBER);
       rccDisableTIM3(FALSE);
     }
 #endif
 #if STM32_GPT_USE_TIM4
     if (&GPTD4 == gptp) {
-      nvicDisableVector(TIM4_IRQn);
+      nvicDisableVector(STM32_TIM4_NUMBER);
       rccDisableTIM4(FALSE);
     }
 #endif
 #if STM32_GPT_USE_TIM5
     if (&GPTD5 == gptp) {
-      nvicDisableVector(TIM5_IRQn);
+      nvicDisableVector(STM32_TIM5_NUMBER);
       rccDisableTIM5(FALSE);
     }
 #endif
 #if STM32_GPT_USE_TIM8
     if (&GPTD8 == gptp) {
-      nvicDisableVector(TIM8_UP_IRQn);
+      nvicDisableVector(STM32_TIM8_UP_NUMBER);
       rccDisableTIM8(FALSE);
     }
 #endif
diff --git a/os/hal/platforms/STM32/stm32.h b/os/hal/platforms/STM32/stm32.h
index 97858e07d..bcb808300 100644
--- a/os/hal/platforms/STM32/stm32.h
+++ b/os/hal/platforms/STM32/stm32.h
@@ -47,9 +47,6 @@
 #if defined(STM32F0XX)
 #include "stm32f0xx.h"
 
-/* Resolving naming anomalies related to the STM32F0xx sub-family.*/
-#define TIM1_UP_IRQn        TIM1_BRK_UP_TRG_COM_IRQn
-
 #elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \
       defined(STM32F10X_HD_VL) || defined(STM32F10X_LD)    ||               \
       defined(STM32F10X_MD)    || defined(STM32F10X_HD)    ||               \
-- 
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