From 95752b318caf77acf1983090d6cd96152c7a0020 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 15 Jun 2018 09:38:13 +0000 Subject: Fixed compile time regression in USARTv1 driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12102 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'os/hal/ports') diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c index db7ab9250..f4370d28d 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c @@ -217,7 +217,7 @@ static void usart_start(UARTDriver *uartp) { Fraction is still 4 bits wide, but only lower 3 bits used. Mantissa is doubled, but Fraction is left the same.*/ #if defined(USART_CR1_OVER8) - if (config->cr1 & USART_CR1_OVER8) + if (uartp->config->cr1 & USART_CR1_OVER8) fck = ((fck & ~7) * 2) | (fck & 7); #endif u->BRR = fck; -- cgit v1.2.3