From 7d22893a937df028e2d702dadc5da8375d6239e3 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 1 Dec 2017 14:44:23 +0000 Subject: PAL-board changes, phase 1. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11097 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c | 55 +---------- os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h | 142 ++-------------------------- os/hal/ports/STM32/STM32F7xx/hal_lld.c | 6 +- 3 files changed, 15 insertions(+), 188 deletions(-) (limited to 'os/hal/ports') diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c index 2d9bca949..a1f7af755 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c @@ -63,17 +63,6 @@ palevent_t _pal_events[16]; /* Driver local functions. */ /*===========================================================================*/ -static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) { - - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - /*===========================================================================*/ /* Driver interrupt handlers. */ /*===========================================================================*/ @@ -83,14 +72,11 @@ static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) { /*===========================================================================*/ /** - * @brief STM32 I/O ports configuration. - * @details Ports A-D(E, F, G, H) clocks enabled. - * - * @param[in] config the STM32 ports configuration + * @brief PAL driver initialization. * * @notapi */ -void _pal_lld_init(const PALConfig *config) { +void _pal_lld_init(void) { #if PAL_USE_CALLBACKS || PAL_USE_WAIT || defined(__DOXYGEN__) unsigned i; @@ -100,6 +86,7 @@ void _pal_lld_init(const PALConfig *config) { } #endif +#if 0 /* * Enables the GPIO related clocks. */ @@ -117,42 +104,6 @@ void _pal_lld_init(const PALConfig *config) { RCC->AHB1ENR |= AHB1_EN_MASK; RCC->AHB1LPENR |= AHB1_LPEN_MASK; #endif - - /* - * Initial GPIO setup. - */ -#if STM32_HAS_GPIOA - initgpio(GPIOA, &config->PAData); -#endif -#if STM32_HAS_GPIOB - initgpio(GPIOB, &config->PBData); -#endif -#if STM32_HAS_GPIOC - initgpio(GPIOC, &config->PCData); -#endif -#if STM32_HAS_GPIOD - initgpio(GPIOD, &config->PDData); -#endif -#if STM32_HAS_GPIOE - initgpio(GPIOE, &config->PEData); -#endif -#if STM32_HAS_GPIOF - initgpio(GPIOF, &config->PFData); -#endif -#if STM32_HAS_GPIOG - initgpio(GPIOG, &config->PGData); -#endif -#if STM32_HAS_GPIOH - initgpio(GPIOH, &config->PHData); -#endif -#if STM32_HAS_GPIOI - initgpio(GPIOI, &config->PIData); -#endif -#if STM32_HAS_GPIOJ - initgpio(GPIOJ, &config->PJData); -#endif -#if STM32_HAS_GPIOK - initgpio(GPIOK, &config->PKData); #endif } diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h index 546c45045..88e9984ad 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h @@ -25,12 +25,18 @@ #ifndef HAL_PAL_LLD_H #define HAL_PAL_LLD_H +#include "stm32_gpio.h" + #if HAL_USE_PAL || defined(__DOXYGEN__) /*===========================================================================*/ /* Unsupported modes and specific modes */ /*===========================================================================*/ +/* Specifies palInit() without parameter, required until all platforms will + be updated to the new style.*/ +#define PAL_NEW_INIT + #undef PAL_MODE_RESET #undef PAL_MODE_UNCONNECTED #undef PAL_MODE_INPUT @@ -130,39 +136,6 @@ PAL_STM32_OTYPE_OPENDRAIN) /** @} */ -/* Discarded definitions from the ST headers, the PAL driver uses its own - definitions in order to have an unified handling for all devices. - Unfortunately the ST headers have no uniform definitions for the same - objects across the various sub-families.*/ -#undef GPIOA -#undef GPIOB -#undef GPIOC -#undef GPIOD -#undef GPIOE -#undef GPIOF -#undef GPIOG -#undef GPIOH -#undef GPIOI -#undef GPIOJ -#undef GPIOK - -/** - * @name GPIO ports definitions - * @{ - */ -#define GPIOA ((stm32_gpio_t *)GPIOA_BASE) -#define GPIOB ((stm32_gpio_t *)GPIOB_BASE) -#define GPIOC ((stm32_gpio_t *)GPIOC_BASE) -#define GPIOD ((stm32_gpio_t *)GPIOD_BASE) -#define GPIOE ((stm32_gpio_t *)GPIOE_BASE) -#define GPIOF ((stm32_gpio_t *)GPIOF_BASE) -#define GPIOG ((stm32_gpio_t *)GPIOG_BASE) -#define GPIOH ((stm32_gpio_t *)GPIOH_BASE) -#define GPIOI ((stm32_gpio_t *)GPIOI_BASE) -#define GPIOJ ((stm32_gpio_t *)GPIOJ_BASE) -#define GPIOK ((stm32_gpio_t *)GPIOK_BASE) -/** @} */ - /*===========================================================================*/ /* I/O Ports Types and constants. */ /*===========================================================================*/ @@ -215,104 +188,6 @@ #define PAL_NOLINE 0U /** @} */ -/** - * @brief STM32 GPIO registers block. - */ -typedef struct { - - volatile uint32_t MODER; - volatile uint32_t OTYPER; - volatile uint32_t OSPEEDR; - volatile uint32_t PUPDR; - volatile uint32_t IDR; - volatile uint32_t ODR; - volatile union { - uint32_t W; - struct { - uint16_t set; - uint16_t clear; - } H; - } BSRR; - volatile uint32_t LOCKR; - volatile uint32_t AFRL; - volatile uint32_t AFRH; - volatile uint32_t BRR; -} stm32_gpio_t; - -/** - * @brief GPIO port setup info. - */ -typedef struct { - /** Initial value for MODER register.*/ - uint32_t moder; - /** Initial value for OTYPER register.*/ - uint32_t otyper; - /** Initial value for OSPEEDR register.*/ - uint32_t ospeedr; - /** Initial value for PUPDR register.*/ - uint32_t pupdr; - /** Initial value for ODR register.*/ - uint32_t odr; - /** Initial value for AFRL register.*/ - uint32_t afrl; - /** Initial value for AFRH register.*/ - uint32_t afrh; -} stm32_gpio_setup_t; - -/** - * @brief STM32 GPIO static initializer. - * @details An instance of this structure must be passed to @p palInit() at - * system startup time in order to initialize the digital I/O - * subsystem. This represents only the initial setup, specific pads - * or whole ports can be reprogrammed at later time. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - /** @brief Port A setup data.*/ - stm32_gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - /** @brief Port B setup data.*/ - stm32_gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - /** @brief Port C setup data.*/ - stm32_gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - /** @brief Port D setup data.*/ - stm32_gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - /** @brief Port E setup data.*/ - stm32_gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - /** @brief Port F setup data.*/ - stm32_gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - /** @brief Port G setup data.*/ - stm32_gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - /** @brief Port H setup data.*/ - stm32_gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - /** @brief Port I setup data.*/ - stm32_gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - /** @brief Port I setup data.*/ - stm32_gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - /** @brief Port I setup data.*/ - stm32_gpio_setup_t PKData; -#endif -} PALConfig; - /** * @brief Type of digital I/O port sized unsigned integer. */ @@ -439,7 +314,7 @@ typedef uint32_t iopadid_t; * * @notapi */ -#define pal_lld_init(config) _pal_lld_init(config) +#define pal_lld_init() _pal_lld_init() /** * @brief Reads an I/O port. @@ -596,14 +471,13 @@ typedef uint32_t iopadid_t; &_pal_events[PAL_PAD(line)] #if !defined(__DOXYGEN__) -extern const PALConfig pal_default_config; extern palevent_t _pal_events[16]; #endif #ifdef __cplusplus extern "C" { #endif - void _pal_lld_init(const PALConfig *config); + void _pal_lld_init(void); void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode); diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index 8f5645b88..16595bdc0 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -114,8 +114,10 @@ static void hal_lld_backup_domain_init(void) { void hal_lld_init(void) { /* Reset of all peripherals. AHB3 is not reseted because it could have - been initialized in the board initialization file (board.c).*/ - rccResetAHB1(~0); + been initialized in the board initialization file (board.c). + Note, GPIO are not reset because initialized before this point in + board files.*/ + rccResetAHB1(~STM32_GPIO_EN_MASK); rccResetAHB2(~0); rccResetAPB1(~RCC_APB1RSTR_PWRRST); rccResetAPB2(~0); -- cgit v1.2.3