From 675ee683d06e63f41f03179cfb035ab43c059738 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 19 Jan 2019 09:44:41 +0000 Subject: Fixed a problem in F4 clock DCKCFGR initialization. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12551 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/STM32/STM32F4xx/hal_lld.c | 6 ++---- os/hal/ports/STM32/STM32F4xx/hal_lld.h | 20 -------------------- 2 files changed, 2 insertions(+), 24 deletions(-) (limited to 'os/hal/ports') diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.c b/os/hal/ports/STM32/STM32F4xx/hal_lld.c index 1cfa9c49c..8f3aba7db 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.c @@ -288,12 +288,10 @@ void stm32_clock_init(void) { #endif #if !defined(STM32F413xx) RCC->DCKCFGR = dckcfgr | - STM32_TIMPRE | STM32_PLLSAIDIVR | - STM32_PLLSAIDIVQ | STM32_PLLI2SDIVQ; + STM32_TIMPRE | STM32_PLLSAIDIVQ | STM32_PLLI2SDIVQ; #else RCC->DCKCFGR = dckcfgr | - STM32_TIMPRE | - STM32_PLLDIVR | STM32_PLLI2SDIVR; + STM32_TIMPRE | STM32_PLLDIVR | STM32_PLLI2SDIVR; #endif } #endif diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.h b/os/hal/ports/STM32/STM32F4xx/hal_lld.h index cc5f1ee7b..87061fe7d 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.h @@ -204,40 +204,20 @@ * @brief Clock of timers connected to APB1 * (Timers 2, 3, 4, 5, 6, 7, 12, 13, 14). */ -#if !defined(STM32F446xx) || defined(__DOXYGEN__) #if (STM32_PPRE1 == STM32_PPRE1_DIV1) || defined(__DOXYGEN__) #define STM32_TIMCLK1 (STM32_PCLK1 * 1) #else #define STM32_TIMCLK1 (STM32_PCLK1 * 2) #endif -#else /* defined(STM32F446xx) */ -#if STM32_PPRE1 == STM32_PPRE1_DIV1 -#define STM32_TIMCLK1 (STM32_PCLK1 * 1) -#elif STM32_PPRE1 == STM32_PPRE1_DIV2 -#define STM32_TIMCLK1 (STM32_PCLK1 * 2) -#else -#define STM32_TIMCLK1 (STM32_PCLK1 * 4) -#endif -#endif /* defined(STM32F446xx) */ /** * @brief Clock of timers connected to APB2 (Timers 1, 8, 9, 10, 11). */ -#if !defined(STM32F446xx) || defined(__DOXYGEN__) #if (STM32_PPRE2 == STM32_PPRE2_DIV1) || defined(__DOXYGEN__) #define STM32_TIMCLK2 (STM32_PCLK2 * 1) #else #define STM32_TIMCLK2 (STM32_PCLK2 * 2) #endif -#else /* defined(STM32F446xx) */ -#if STM32_PPRE2 == STM32_PPRE2_DIV1 -#define STM32_TIMCLK2 (STM32_PCLK2 * 1) -#elif STM32_PPRE2 == STM32_PPRE2_DIV2 -#define STM32_TIMCLK2 (STM32_PCLK2 * 2) -#else -#define STM32_TIMCLK2 (STM32_PCLK2 * 4) -#endif -#endif /* defined(STM32F446xx) */ #else /* STM32_HAS_RCC_DCKCFGR && (STM32_TIMPRE == STM32_TIMPRE_HCLK) */ #if (STM32_PPRE1 == STM32_PPRE1_DIV1) || \ -- cgit v1.2.3