From a4aff3dd04faf5857819f496753255f888655ec9 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Mon, 9 Dec 2013 11:29:20 +0000
Subject: git-svn-id:
 svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6563
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/ports/STM32F4xx/adc_lld.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

(limited to 'os/hal/ports/STM32F4xx')

diff --git a/os/hal/ports/STM32F4xx/adc_lld.c b/os/hal/ports/STM32F4xx/adc_lld.c
index 724dc2938..85cb485bc 100644
--- a/os/hal/ports/STM32F4xx/adc_lld.c
+++ b/os/hal/ports/STM32F4xx/adc_lld.c
@@ -84,14 +84,14 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
     /* It is possible that the conversion group has already be reset by the
        ADC error handler, in this case this interrupt is spurious.*/
     if (adcp->grpp != NULL) {
-      if ((flags & STM32_DMA_ISR_HTIF) != 0) {
-        /* Half transfer processing.*/
-        _adc_isr_half_code(adcp);
-      }
       if ((flags & STM32_DMA_ISR_TCIF) != 0) {
         /* Transfer complete processing.*/
         _adc_isr_full_code(adcp);
       }
+      else if ((flags & STM32_DMA_ISR_HTIF) != 0) {
+        /* Half transfer processing.*/
+        _adc_isr_half_code(adcp);
+      }
     }
   }
 }
@@ -154,7 +154,7 @@ OSAL_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
   /* TODO: Add here analog watchdog handling.*/
 #endif /* STM32_ADC_USE_ADC3 */
 
-  OSAL_IRQ_EPILOGUE();
+  CH_IRQ_EPILOGUE();
 }
 #endif
 
@@ -323,11 +323,11 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   mode = adcp->dmamode;
   if (grpp->circular) {
     mode |= STM32_DMA_CR_CIRC;
-  }
-  if (adcp->depth > 1) {
-    /* If the buffer depth is greater than one then the half transfer interrupt
-       interrupt is enabled in order to allows streaming processing.*/
-    mode |= STM32_DMA_CR_HTIE;
+    if (adcp->depth > 1) {
+      /* If circular buffer depth > 1, then the half transfer interrupt
+         is enabled in order to allow streaming processing.*/
+      mode |= STM32_DMA_CR_HTIE;
+    }
   }
   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);
   dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *
-- 
cgit v1.2.3