From 9058939dbe67670b079204d3b1ae337cf7d3cf60 Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Tue, 1 Aug 2017 20:48:09 +0000 Subject: Fixed Bug #868 git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10349 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32L0xx/hal_lld.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'os/hal/ports/STM32') diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h index 550308803..1d93ac4c5 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h @@ -98,7 +98,7 @@ */ #define STM32_HSI16CLK 16000000 /**< 16MHz internal clock. */ #define STM32_HSI48CLK 48000000 /**< 48MHz internal clock. */ -#define STM32_LSICLK 38000 /**< Low speed internal clock. */ +#define STM32_LSICLK 37000 /**< Low speed internal clock. */ /** @} */ /** @@ -160,12 +160,12 @@ #define STM32_PPRE1_DIV8 (6 << 8) /**< HCLK divided by 8. */ #define STM32_PPRE1_DIV16 (7 << 8) /**< HCLK divided by 16. */ -#define STM32_PPRE2_MASK (7 << 12) /**< PPRE2 field mask. */ -#define STM32_PPRE2_DIV1 (0 << 12) /**< HCLK divided by 1. */ -#define STM32_PPRE2_DIV2 (4 << 12) /**< HCLK divided by 2. */ -#define STM32_PPRE2_DIV4 (5 << 12) /**< HCLK divided by 4. */ -#define STM32_PPRE2_DIV8 (6 << 12) /**< HCLK divided by 8. */ -#define STM32_PPRE2_DIV16 (7 << 12) /**< HCLK divided by 16. */ +#define STM32_PPRE2_MASK (7 << 11) /**< PPRE2 field mask. */ +#define STM32_PPRE2_DIV1 (0 << 11) /**< HCLK divided by 1. */ +#define STM32_PPRE2_DIV2 (4 << 11) /**< HCLK divided by 2. */ +#define STM32_PPRE2_DIV4 (5 << 11) /**< HCLK divided by 4. */ +#define STM32_PPRE2_DIV8 (6 << 11) /**< HCLK divided by 8. */ +#define STM32_PPRE2_DIV16 (7 << 11) /**< HCLK divided by 16. */ #define STM32_STOPWUCK_MASK (1 << 15) /**< PLLDIV field mask. */ #define STM32_STOPWUCK_MSI (0 << 15) /**< MSI is wakeup clock. */ -- cgit v1.2.3