From 4633e54ba996a03d63c3fa3efe7bfb222297a40e Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Wed, 26 Jul 2017 16:49:32 +0000 Subject: Fixed Bug #866 git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10341 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32L0xx/hal_lld.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'os/hal/ports/STM32') diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h index 7b7c0e10e..550308803 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h @@ -125,11 +125,11 @@ * @name RCC_CR register bits definitions * @{ */ -#define STM32_RTCPRE_MASK (3 << 29) /**< RTCPRE mask. */ -#define STM32_RTCPRE_DIV2 (0 << 29) /**< HSE divided by 2. */ -#define STM32_RTCPRE_DIV4 (1 << 29) /**< HSE divided by 4. */ -#define STM32_RTCPRE_DIV8 (2 << 29) /**< HSE divided by 2. */ -#define STM32_RTCPRE_DIV16 (3 << 29) /**< HSE divided by 16. */ +#define STM32_RTCPRE_MASK (3 << 20) /**< RTCPRE mask. */ +#define STM32_RTCPRE_DIV2 (0 << 20) /**< HSE divided by 2. */ +#define STM32_RTCPRE_DIV4 (1 << 20) /**< HSE divided by 4. */ +#define STM32_RTCPRE_DIV8 (2 << 20) /**< HSE divided by 2. */ +#define STM32_RTCPRE_DIV16 (3 << 20) /**< HSE divided by 16. */ /** @} */ /** @@ -891,7 +891,7 @@ #elif (STM32_SW == STM32_SW_MSI) #define STM32_SYSCLK STM32_MSICLK #elif (STM32_SW == STM32_SW_HSI16) -#define STM32_SYSCLK STM32_HSI16CLK +#define STM32_SYSCLK STM32_HSI16DIVCLK #elif (STM32_SW == STM32_SW_HSE) #define STM32_SYSCLK STM32_HSECLK #elif (STM32_SW == STM32_SW_PLL) -- cgit v1.2.3