From f5d1988830352e3c6aa8dc63bcf542683d48c0e7 Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Sat, 24 Sep 2016 12:50:41 +0000 Subject: Fixed Bug #778. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9785 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32F7xx/hal_lld.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'os/hal/ports/STM32/STM32F7xx/hal_lld.c') diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index 29472a465..5393e508a 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -134,7 +134,7 @@ void hal_lld_init(void) { /* The SRAM2 bank can optionally made a non cache-able area for use by DMA engines.*/ mpuConfigureRegion(MPU_REGION_7, - 0x2004C000U, + SRAM2_BASE, MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE | MPU_RASR_SIZE_16K | -- cgit v1.2.3