From 0ce83f374de7003dd997e6a6fb6ca956ba6b98d4 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 28 Oct 2016 08:55:14 +0000 Subject: Fixed RTC on newer STM32F7 devices. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9888 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32F7xx/hal_lld.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'os/hal/ports/STM32/STM32F7xx/hal_lld.c') diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index 5393e508a..0e076a22d 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -120,9 +120,6 @@ void hal_lld_init(void) { rccResetAPB1(~RCC_APB1RSTR_PWRRST); rccResetAPB2(~0); - /* PWR clock enabled.*/ - rccEnablePWRInterface(FALSE); - /* Initializes the backup domain.*/ hal_lld_backup_domain_init(); @@ -162,8 +159,15 @@ void hal_lld_init(void) { void stm32_clock_init(void) { #if !STM32_NO_INIT - /* PWR clock enable.*/ + /* PWR clock enabled.*/ +#if defined(HAL_USE_RTC) && \ + (defined(STM32F765xx) || defined(STM32F767xx) || \ + defined(STM32F769xx) || defined(STM32F777xx) || \ + defined (STM32F779xx)) + RCC->APB1ENR = RCC_APB1ENR_PWREN | RCC_APB1ENR_RTCEN; +#else RCC->APB1ENR = RCC_APB1ENR_PWREN; +#endif /* PWR initialization.*/ PWR->CR1 = STM32_VOS; -- cgit v1.2.3