From a9b5eab94a4e3b2e2bb9215111954e2845500d7a Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 30 Jun 2019 07:16:02 +0000 Subject: Fixed bug #1035. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12854 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/STM32F4xx/hal_lld.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'os/hal/ports/STM32/STM32F4xx') diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.c b/os/hal/ports/STM32/STM32F4xx/hal_lld.c index 8f3aba7db..96e8056c5 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.c @@ -184,7 +184,7 @@ void stm32_clock_init(void) { /* Registers finally cleared to reset values.*/ RCC->CR &= RCC_CR_HSITRIM | RCC_CR_HSION; /* CR Reset value. */ RCC->CFGR = 0; /* CFGR reset value. */ - + #if STM32_HSE_ENABLED /* HSE activation.*/ #if defined(STM32_HSE_BYPASS) @@ -314,6 +314,9 @@ void stm32_clock_init(void) { FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | STM32_FLASHBITS; #endif + while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) != + (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) { + } /* Switching to the configured clock source if it is different from HSI.*/ #if (STM32_SW != STM32_SW_HSI) -- cgit v1.2.3