From f33a1bf19353699427726edc6004454484ca7b70 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 10 Dec 2015 14:19:45 +0000 Subject: Fixed bug #680. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8573 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32F3xx/adc_lld.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'os/hal/ports/STM32/STM32F3xx') diff --git a/os/hal/ports/STM32/STM32F3xx/adc_lld.c b/os/hal/ports/STM32/STM32F3xx/adc_lld.c index 35f79b20a..b2685d37c 100644 --- a/os/hal/ports/STM32/STM32F3xx/adc_lld.c +++ b/os/hal/ports/STM32/STM32F3xx/adc_lld.c @@ -358,7 +358,7 @@ void adc_lld_init(void) { #endif ADCD3.dmastp = STM32_DMA2_STREAM5; ADCD3.dmamode = ADC_DMA_SIZE | - STM32_DMA_CR_PL(STM32_ADC_ADC12_DMA_PRIORITY) | + STM32_DMA_CR_PL(STM32_ADC_ADC34_DMA_PRIORITY) | STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; @@ -419,7 +419,6 @@ void adc_lld_start(ADCDriver *adcp) { /* Clock source setting.*/ adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA; - /* Differential channels setting.*/ #if STM32_ADC_DUAL_MODE adcp->adcm->DIFSEL = adcp->config->difsel; -- cgit v1.2.3