From 9f76d34cdcbfc5dbdaed44eeb9e5808753e404a5 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Fri, 17 Apr 2015 08:57:15 +0000
Subject: Fixed bug #582.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7898 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/ports/STM32/STM32F1xx/stm32_rcc.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

(limited to 'os/hal/ports/STM32/STM32F1xx')

diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h
index 8aea87e06..c381427a6 100644
--- a/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h
@@ -299,6 +299,31 @@
  * @api
  */
 #define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CAN1RST)
+
+/**
+ * @brief   Enables the CAN2 peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCAN2(lp) rccEnableAPB1(RCC_APB1ENR_CAN2EN, lp)
+
+/**
+ * @brief   Disables the CAN2 peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableCAN2(lp) rccDisableAPB1(RCC_APB1ENR_CAN2EN, lp)
+
+/**
+ * @brief   Resets the CAN2 peripheral.
+ *
+ * @api
+ */
+#define rccResetCAN2() rccResetAPB1(RCC_APB1RSTR_CAN2RST)
 /** @} */
 
 /**
-- 
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