From e949c9b3e4d0aa20db187a8497e2231fbfe3b106 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Mon, 7 Mar 2016 14:57:25 +0000 Subject: Undid SPI changes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9050 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/LLD/SPIv1/spi_lld.c | 91 ++++++---------------------------- os/hal/ports/STM32/LLD/SPIv1/spi_lld.h | 11 +--- os/hal/ports/STM32/LLD/SPIv2/spi_lld.c | 91 ++++++---------------------------- os/hal/ports/STM32/LLD/SPIv2/spi_lld.h | 9 ---- 4 files changed, 33 insertions(+), 169 deletions(-) (limited to 'os/hal/ports/STM32/LLD') diff --git a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c index a371eb980..ec8abd10b 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c @@ -144,15 +144,6 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { dmaStreamDisable(spip->dmatx); dmaStreamDisable(spip->dmarx); -#if STM32_SPI_USE_BIDIMODE - spip->spi->CR1 |= SPI_CR1_BIDIOE; - - /* Errors reset sequence. It is required becaue BIDIOE could cause extra - clock pulses after DMA stopped reading.*/ - (void)spip->spi->DR; - (void)spip->spi->SR; -#endif - /* Portable SPI ISR code defined in the high level driver, note, it is a macro.*/ _spi_isr_code(spip); @@ -311,12 +302,6 @@ void spi_lld_init(void) { */ void spi_lld_start(SPIDriver *spip) { -#if STM32_SPI_USE_BIDIMODE - osalDbgAssert(!(((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0) ^^ - ((spip->spi->CR1 & SPI_CR1_BIDIOE) == 0)), - "BIDIOE not set"); -#endif - /* If in stopped state then enables the SPI and DMA clocks.*/ if (spip->state == SPI_STOP) { #if STM32_SPI_USE_SPI1 @@ -527,13 +512,6 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { -#if STM32_SPI_USE_BIDIMODE - if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) { - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0, - "BIDIOE not set"); - } -#endif - dmaStreamSetMemory0(spip->dmarx, &dummyrx); dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetMode(spip->dmarx, spip->rxdmamode); @@ -564,11 +542,6 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { -#if STM32_SPI_USE_BIDIMODE - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0, - "spiExchange() not possible with BIDIMODE"); -#endif - dmaStreamSetMemory0(spip->dmarx, rxbuf); dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetMode(spip->dmarx, spip->rxdmamode| STM32_DMA_CR_MINC); @@ -596,23 +569,16 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { -#if STM32_SPI_USE_BIDIMODE - if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) { - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0, - "BIDIOE not set"); - } -#endif - - dmaStreamSetMemory0(spip->dmarx, &dummyrx); - dmaStreamSetTransactionSize(spip->dmarx, n); - dmaStreamSetMode(spip->dmarx, spip->rxdmamode); + dmaStreamSetMemory0(spip->dmarx, &dummyrx); + dmaStreamSetTransactionSize(spip->dmarx, n); + dmaStreamSetMode(spip->dmarx, spip->rxdmamode); - dmaStreamSetMemory0(spip->dmatx, txbuf); - dmaStreamSetTransactionSize(spip->dmatx, n); - dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC); + dmaStreamSetMemory0(spip->dmatx, txbuf); + dmaStreamSetTransactionSize(spip->dmatx, n); + dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC); - dmaStreamEnable(spip->dmarx); - dmaStreamEnable(spip->dmatx); + dmaStreamEnable(spip->dmarx); + dmaStreamEnable(spip->dmatx); } /** @@ -630,36 +596,16 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { -#if STM32_SPI_USE_BIDIMODE - if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) { - - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0, - "BIDIOE not set"); - - dmaStreamSetMemory0(spip->dmarx, rxbuf); - dmaStreamSetTransactionSize(spip->dmarx, n); - dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); - - dmaStreamEnable(spip->dmarx); - - spip->spi->CR1 &= ~SPI_CR1_BIDIOE; - } - else { -#else - dmaStreamSetMemory0(spip->dmarx, rxbuf); - dmaStreamSetTransactionSize(spip->dmarx, n); - dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); + dmaStreamSetMemory0(spip->dmarx, rxbuf); + dmaStreamSetTransactionSize(spip->dmarx, n); + dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); - dmaStreamSetMemory0(spip->dmatx, &dummytx); - dmaStreamSetTransactionSize(spip->dmatx, n); - dmaStreamSetMode(spip->dmatx, spip->txdmamode); + dmaStreamSetMemory0(spip->dmatx, &dummytx); + dmaStreamSetTransactionSize(spip->dmatx, n); + dmaStreamSetMode(spip->dmatx, spip->txdmamode); - dmaStreamEnable(spip->dmarx); - dmaStreamEnable(spip->dmatx); -#endif -#if STM32_SPI_USE_BIDIMODE - } -#endif + dmaStreamEnable(spip->dmarx); + dmaStreamEnable(spip->dmatx); } /** @@ -676,11 +622,6 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { -#if STM32_SPI_USE_BIDIMODE - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0, - "spiPolledExchange() not possible with BIDIMODE"); -#endif - spip->spi->DR = frame; while ((spip->spi->SR & SPI_SR_RXNE) == 0) ; diff --git a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h index eba9f21e1..2aab01daf 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h @@ -195,15 +195,6 @@ #define STM32_SPI_SPI6_DMA_PRIORITY 1 #endif -/** - * @brief Enables the SPI BIDIMODE support. - * @details If set to @p TRUE the support for BIDIMODE CR1 bit is included. - * @note The default is @p FALSE. - */ -#if !defined(STM32_SPI_USE_BIDIMODE) || defined(__DOXYGEN__) -#define STM32_SPI_USE_BIDIMODE FALSE -#endif - /** * @brief SPI DMA error hook. */ @@ -240,7 +231,7 @@ #error "SPI6 not present in the selected device" #endif -#if !STM32_SPI_USE_SPI1 && !STM32_SPI_USE_SPI2 && !STM32_SPI_USE_SPI3 && \ +#if !STM32_SPI_USE_SPI1 && !STM32_SPI_USE_SPI2 && !STM32_SPI_USE_SPI3 && \ !STM32_SPI_USE_SPI4 && !STM32_SPI_USE_SPI5 && !STM32_SPI_USE_SPI6 #error "SPI driver activated but no SPI peripheral assigned" #endif diff --git a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c index 608c568be..167e28b4c 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c @@ -144,15 +144,6 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { dmaStreamDisable(spip->dmatx); dmaStreamDisable(spip->dmarx); -#if STM32_SPI_USE_BIDIMODE - spip->spi->CR1 |= SPI_CR1_BIDIOE; - - /* Errors reset sequence. It is required becaue BIDIOE could cause extra - clock pulses after DMA stopped reading.*/ - (void)spip->spi->DR; - (void)spip->spi->SR; -#endif - /* Portable SPI ISR code defined in the high level driver, note, it is a macro.*/ _spi_isr_code(spip); @@ -312,12 +303,6 @@ void spi_lld_init(void) { void spi_lld_start(SPIDriver *spip) { uint32_t ds; -#if STM32_SPI_USE_BIDIMODE - osalDbgAssert(!(((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0) ^^ - ((spip->spi->CR1 & SPI_CR1_BIDIOE) == 0)), - "BIDIOE not set"); -#endif - /* If in stopped state then enables the SPI and DMA clocks.*/ if (spip->state == SPI_STOP) { #if STM32_SPI_USE_SPI1 @@ -530,13 +515,6 @@ void spi_lld_unselect(SPIDriver *spip) { */ void spi_lld_ignore(SPIDriver *spip, size_t n) { -#if STM32_SPI_USE_BIDIMODE - if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) { - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0, - "BIDIOE not set"); - } -#endif - dmaStreamSetMemory0(spip->dmarx, &dummyrx); dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetMode(spip->dmarx, spip->rxdmamode); @@ -567,11 +545,6 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { -#if STM32_SPI_USE_BIDIMODE - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0, - "spiExchange() not possible with BIDIMODE"); -#endif - dmaStreamSetMemory0(spip->dmarx, rxbuf); dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); @@ -599,23 +572,16 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { -#if STM32_SPI_USE_BIDIMODE - if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) { - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0, - "BIDIOE not set"); - } -#endif - - dmaStreamSetMemory0(spip->dmarx, &dummyrx); - dmaStreamSetTransactionSize(spip->dmarx, n); - dmaStreamSetMode(spip->dmarx, spip->rxdmamode); + dmaStreamSetMemory0(spip->dmarx, &dummyrx); + dmaStreamSetTransactionSize(spip->dmarx, n); + dmaStreamSetMode(spip->dmarx, spip->rxdmamode); - dmaStreamSetMemory0(spip->dmatx, txbuf); - dmaStreamSetTransactionSize(spip->dmatx, n); - dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC); + dmaStreamSetMemory0(spip->dmatx, txbuf); + dmaStreamSetTransactionSize(spip->dmatx, n); + dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC); - dmaStreamEnable(spip->dmarx); - dmaStreamEnable(spip->dmatx); + dmaStreamEnable(spip->dmarx); + dmaStreamEnable(spip->dmatx); } /** @@ -633,36 +599,16 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { -#if STM32_SPI_USE_BIDIMODE - if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) { - - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0, - "BIDIOE not set"); - - dmaStreamSetMemory0(spip->dmarx, rxbuf); - dmaStreamSetTransactionSize(spip->dmarx, n); - dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); - - dmaStreamEnable(spip->dmarx); - - spip->spi->CR1 &= ~SPI_CR1_BIDIOE; - } - else { -#else - dmaStreamSetMemory0(spip->dmarx, rxbuf); - dmaStreamSetTransactionSize(spip->dmarx, n); - dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); + dmaStreamSetMemory0(spip->dmarx, rxbuf); + dmaStreamSetTransactionSize(spip->dmarx, n); + dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); - dmaStreamSetMemory0(spip->dmatx, &dummytx); - dmaStreamSetTransactionSize(spip->dmatx, n); - dmaStreamSetMode(spip->dmatx, spip->txdmamode); + dmaStreamSetMemory0(spip->dmatx, &dummytx); + dmaStreamSetTransactionSize(spip->dmatx, n); + dmaStreamSetMode(spip->dmatx, spip->txdmamode); - dmaStreamEnable(spip->dmarx); - dmaStreamEnable(spip->dmatx); -#endif -#if STM32_SPI_USE_BIDIMODE - } -#endif + dmaStreamEnable(spip->dmarx); + dmaStreamEnable(spip->dmatx); } /** @@ -679,11 +625,6 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { -#if STM32_SPI_USE_BIDIMODE - osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0, - "spiPolledExchange() not possible with BIDIMODE"); -#endif - /* * Data register must be accessed with the appropriate data size. * Byte size access (uint8_t *) for transactions that are <= 8-bit. diff --git a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h index 795d753be..e2bcb124e 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h @@ -195,15 +195,6 @@ #define STM32_SPI_SPI6_DMA_PRIORITY 1 #endif -/** - * @brief Enables the SPI BIDIMODE support. - * @details If set to @p TRUE the support for BIDIMODE CR1 bit is included. - * @note The default is @p FALSE. - */ -#if !defined(STM32_SPI_USE_BIDIMODE) || defined(__DOXYGEN__) -#define STM32_SPI_USE_BIDIMODE FALSE -#endif - /** * @brief SPI DMA error hook. */ -- cgit v1.2.3