From b0c1396647890bed5c467dbbbb87e4dac42a6c91 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 20 Jan 2018 14:47:58 +0000
Subject: Added 50mHz capability to SDMMCv1 driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11364 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c |  4 ++--
 os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.h | 12 ++++++++++++
 2 files changed, 14 insertions(+), 2 deletions(-)

(limited to 'os/hal/ports/STM32/LLD')

diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c
index 36e7854e3..2c5df1480 100644
--- a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c
+++ b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c
@@ -537,7 +537,7 @@ void sdc_lld_start_clk(SDCDriver *sdcp) {
 }
 
 /**
- * @brief   Sets the SDIO clock to data mode (25MHz or less).
+ * @brief   Sets the SDIO clock to data mode (25/50 MHz or less).
  *
  * @param[in] sdcp      pointer to the @p SDCDriver object
  * @param[in] clk       the clock mode
@@ -545,7 +545,7 @@ void sdc_lld_start_clk(SDCDriver *sdcp) {
  * @notapi
  */
 void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) {
-#if 0
+#if STM32_SDC_SDMMC_50MHZ && defined(STM32F7XX)
   if (SDC_CLK_50MHz == clk) {
     sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) |
 #if STM32_SDC_SDMMC_PWRSAV
diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.h b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.h
index 07ca48f66..59f0cc1df 100644
--- a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.h
+++ b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.h
@@ -65,6 +65,14 @@
 #define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
 #endif
 
+/**
+ * @brief   Enable clock bypass.
+ * @note    Allow clock speed up to 50 Mhz.
+ */
+#if !defined(STM32_SDC_SDMMC_50MHZ) || defined(__DOXYGEN__)
+#define STM32_SDC_SDMMC_50MHZ               FALSE
+#endif
+
 /**
  * @brief   Write timeout in milliseconds.
  */
@@ -190,6 +198,10 @@
 #error "STM32_SDMMC2CLK must not exceed 48MHz"
 #endif
 
+#if defined(STM32_SDC_SDMMC_50MHZ) && STM32_SDC_SDMMC_50MHZ && !defined(STM32F7XX)
+#error "50 Mhz clock only works for STM32F7XX"
+#endif
+
 /* SDMMC IRQ priority tests.*/
 #if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SDC_SDMMC1_IRQ_PRIORITY)
 #error "Invalid IRQ priority assigned to SDMMC1"
-- 
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