From 1ca01403b48e0cadb8712d4e4a8024ea62300cad Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>
Date: Sat, 13 Oct 2018 19:10:22 +0000
Subject: Added support for TIM21 and TIM22 in STM32 GPT driver. Reinforced
 checks in TIM-related drivers.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12360 110e8d01-0319-4d1e-a829-52ad28d1bb01
---
 os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c | 118 +++++++++++++++++++++++++++++
 1 file changed, 118 insertions(+)

(limited to 'os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c')

diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
index 0de6ac49d..f943a567c 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
@@ -130,6 +130,22 @@ GPTDriver GPTD12;
 GPTDriver GPTD14;
 #endif
 
+/**
+ * @brief   GPTD21 driver identifier.
+ * @note    The driver GPTD21 allocates the timer TIM21 when enabled.
+ */
+#if STM32_GPT_USE_TIM21 || defined(__DOXYGEN__)
+GPTDriver GPTD21;
+#endif
+
+/**
+ * @brief   GPTD22 driver identifier.
+ * @note    The driver GPTD22 allocates the timer TIM22 when enabled.
+ */
+#if STM32_GPT_USE_TIM22 || defined(__DOXYGEN__)
+GPTDriver GPTD22;
+#endif
+
 /*===========================================================================*/
 /* Driver local variables and types.                                         */
 /*===========================================================================*/
@@ -394,6 +410,48 @@ OSAL_IRQ_HANDLER(STM32_TIM14_HANDLER) {
 #endif /* !defined(STM32_TIM14_SUPPRESS_ISR) */
 #endif /* STM32_GPT_USE_TIM14 */
 
+#if STM32_GPT_USE_TIM21 || defined(__DOXYGEN__)
+#if !defined(STM32_TIM21_SUPPRESS_ISR)
+#if !defined(STM32_TIM21_HANDLER)
+#error "STM32_TIM21_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM21 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_TIM21_HANDLER) {
+
+  OSAL_IRQ_PROLOGUE();
+
+  gpt_lld_serve_interrupt(&GPTD21);
+
+  OSAL_IRQ_EPILOGUE();
+}
+#endif /* !defined(STM32_TIM21_SUPPRESS_ISR) */
+#endif /* STM32_GPT_USE_TIM21 */
+
+#if STM32_GPT_USE_TIM22 || defined(__DOXYGEN__)
+#if !defined(STM32_TIM22_SUPPRESS_ISR)
+#if !defined(STM32_TIM22_HANDLER)
+#error "STM32_TIM22_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM22 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_TIM22_HANDLER) {
+
+  OSAL_IRQ_PROLOGUE();
+
+  gpt_lld_serve_interrupt(&GPTD22);
+
+  OSAL_IRQ_EPILOGUE();
+}
+#endif /* !defined(STM32_TIM22_SUPPRESS_ISR) */
+#endif /* STM32_GPT_USE_TIM22 */
+
 /*===========================================================================*/
 /* Driver exported functions.                                                */
 /*===========================================================================*/
@@ -476,6 +534,18 @@ void gpt_lld_init(void) {
   GPTD14.tim = STM32_TIM14;
   gptObjectInit(&GPTD14);
 #endif
+
+#if STM32_GPT_USE_TIM21
+  /* Driver initialization.*/
+  GPTD21.tim = STM32_TIM21;
+  gptObjectInit(&GPTD21);
+#endif
+
+#if STM32_GPT_USE_TIM22
+  /* Driver initialization.*/
+  GPTD22.tim = STM32_TIM22;
+  gptObjectInit(&GPTD22);
+#endif
 }
 
 /**
@@ -669,6 +739,36 @@ void gpt_lld_start(GPTDriver *gptp) {
 #endif
     }
 #endif
+
+#if STM32_GPT_USE_TIM21
+    if (&GPTD21 == gptp) {
+      rccEnableTIM21(true);
+      rccResetTIM21();
+#if !defined(STM32_TIM21_SUPPRESS_ISR)
+      nvicEnableVector(STM32_TIM21_NUMBER, STM32_GPT_TIM21_IRQ_PRIORITY);
+#endif
+#if defined(STM32_TIM21CLK)
+      gptp->clock = STM32_TIM21CLK;
+#else
+      gptp->clock = STM32_TIMCLK1;
+#endif
+    }
+#endif
+
+#if STM32_GPT_USE_TIM22
+    if (&GPTD22 == gptp) {
+      rccEnableTIM22(true);
+      rccResetTIM22();
+#if !defined(STM32_TIM22_SUPPRESS_ISR)
+      nvicEnableVector(STM32_TIM22_NUMBER, STM32_GPT_TIM22_IRQ_PRIORITY);
+#endif
+#if defined(STM32_TIM22CLK)
+      gptp->clock = STM32_TIM22CLK;
+#else
+      gptp->clock = STM32_TIMCLK1;
+#endif
+    }
+#endif
   }
 
   /* Prescaler value calculation.*/
@@ -806,6 +906,24 @@ void gpt_lld_stop(GPTDriver *gptp) {
       rccDisableTIM14();
     }
 #endif
+
+#if STM32_GPT_USE_TIM21
+    if (&GPTD21 == gptp) {
+#if !defined(STM32_TIM21_SUPPRESS_ISR)
+      nvicDisableVector(STM32_TIM21_NUMBER);
+#endif
+      rccDisableTIM21();
+    }
+#endif
+
+#if STM32_GPT_USE_TIM22
+    if (&GPTD22 == gptp) {
+#if !defined(STM32_TIM22_SUPPRESS_ISR)
+      nvicDisableVector(STM32_TIM22_NUMBER);
+#endif
+      rccDisableTIM22();
+    }
+#endif
   }
 }
 
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