From a8115a6060dc7ef4a54d6bc27459b722ee7d1f57 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 11 Dec 2011 18:14:30 +0000 Subject: RTC. Code cleanups. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3594 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/RTCv1/rtc_lld.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'os/hal/platforms') diff --git a/os/hal/platforms/STM32/RTCv1/rtc_lld.c b/os/hal/platforms/STM32/RTCv1/rtc_lld.c index 4bd9620e1..1a6c85d8b 100644 --- a/os/hal/platforms/STM32/RTCv1/rtc_lld.c +++ b/os/hal/platforms/STM32/RTCv1/rtc_lld.c @@ -138,7 +138,6 @@ void rtc_lld_init(void){ while (!(RCC->BDCR & RCC_BDCR_LSERDY)) ; } - preload = STM32_LSECLK - 1; #elif STM32_RTC == STM32_RTC_LSI #define RTC_CLK STM32_LSICLK /* TODO: Move the LSI clock initialization in the HAL low level driver.*/ @@ -151,12 +150,12 @@ void rtc_lld_init(void){ volatile uint32_t tmo = (STM32_SYSCLK / 1000000) * 100; while (tmo--) ; - preload = STM32_LSICLK - 1; #elif STM32_RTC == STM32_RTC_HSE #define RTC_CLK (STM32_HSECLK / 128) - preload = (STM32_HSECLK / 128) - 1; #endif + preload = RTC_CLK - 1; + /* Selects clock source (previously enabled and stabilized).*/ RCC->BDCR = (RCC->BDCR & ~RCC_BDCR_RTCSEL) | STM32_RTC; @@ -226,8 +225,10 @@ void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) { uint32_t time_frac; READ_REGISTERS: + chSysLock(); timespec->tv_sec = ((uint32_t)(RTC->CNTH) << 16) + RTC->CNTL; time_frac = (((uint32_t)RTC->DIVH) << 16) + (uint32_t)RTC->DIVL; + chSysUnlock(); /* If second counter updated between reading of integer and fractional parts * we must reread both values. */ -- cgit v1.2.3