From 9319d5e5c75edffa8b7596df093f4a40ffc891f6 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Fri, 7 Dec 2012 13:00:12 +0000
Subject: STM32Fxx CAN support.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4883 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32F3xx/platform.mk |  1 +
 os/hal/platforms/STM32F3xx/stm32_rcc.h | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

(limited to 'os/hal/platforms')

diff --git a/os/hal/platforms/STM32F3xx/platform.mk b/os/hal/platforms/STM32F3xx/platform.mk
index 0401a8ddf..8384b9717 100644
--- a/os/hal/platforms/STM32F3xx/platform.mk
+++ b/os/hal/platforms/STM32F3xx/platform.mk
@@ -1,6 +1,7 @@
 # List of all the STM32F3xx platform files.
 PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F3xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32F3xx/hal_lld.c \
+              ${CHIBIOS}/os/hal/platforms/STM32/can_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \
diff --git a/os/hal/platforms/STM32F3xx/stm32_rcc.h b/os/hal/platforms/STM32F3xx/stm32_rcc.h
index 2144ee041..8d4ec20d3 100644
--- a/os/hal/platforms/STM32F3xx/stm32_rcc.h
+++ b/os/hal/platforms/STM32F3xx/stm32_rcc.h
@@ -194,6 +194,38 @@
 #define rccResetADC1() rccResetAPB2(RCC_APB2RSTR_ADC1RST)
 /** @} */
 
+/**
+ * @name    CAN peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief   Enables the CAN1 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCAN1(lp) rccEnableAPB1(RCC_APB1ENR_CAN1EN, lp)
+
+/**
+ * @brief   Disables the CAN1 peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp)
+
+/**
+ * @brief   Resets the CAN1 peripheral.
+ *
+ * @api
+ */
+#define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CAN1RST)
+/** @} */
+
 /**
  * @name    DMA peripheral specific RCC operations
  * @{
-- 
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