From 45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 4 Jan 2012 22:00:44 +0000 Subject: Documentation related fixes and updated all the mcuconf.h for the STM32. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3735 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F1xx/hal_lld.c | 2 +- os/hal/platforms/STM32F1xx/hal_lld.h | 16 +++++++++------- os/hal/platforms/STM32F1xx/stm32_rcc.h | 24 ++++++++++++------------ os/hal/platforms/STM32F2xx/hal_lld.c | 2 +- os/hal/platforms/STM32F2xx/hal_lld.h | 14 +++++++------- os/hal/platforms/STM32F2xx/stm32_rcc.h | 14 +++++++------- os/hal/platforms/STM32F4xx/hal_lld.c | 2 +- os/hal/platforms/STM32F4xx/hal_lld.h | 14 +++++++------- os/hal/platforms/STM32F4xx/stm32_rcc.h | 14 +++++++------- os/hal/platforms/STM32L1xx/hal_lld.c | 2 +- os/hal/platforms/STM32L1xx/hal_lld.h | 14 +++++++------- os/hal/platforms/STM32L1xx/stm32_rcc.h | 16 ++++++++-------- 12 files changed, 68 insertions(+), 66 deletions(-) (limited to 'os/hal/platforms') diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c index 8afaf39a2..4572b7ea3 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld.c +++ b/os/hal/platforms/STM32F1xx/hal_lld.c @@ -74,7 +74,7 @@ void hal_lld_init(void) { dmaInit(); #endif - /* Programmable voltage detector enable. */ + /* Programmable voltage detector enable.*/ #if STM32_PVD_ENABLE rccEnablePWRInterface(FALSE); PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK); diff --git a/os/hal/platforms/STM32F1xx/hal_lld.h b/os/hal/platforms/STM32F1xx/hal_lld.h index cf8e09cbe..0d8e0b8b3 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld.h +++ b/os/hal/platforms/STM32F1xx/hal_lld.h @@ -48,24 +48,26 @@ /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ + /** * @name PWR_CR register bits definitions * @{ */ #define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */ #define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */ +#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */ +#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */ +#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */ +#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */ +#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */ +#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */ +#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */ /** @} */ /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ + /** * @brief Enables or disables the programmable voltage detector. */ diff --git a/os/hal/platforms/STM32F1xx/stm32_rcc.h b/os/hal/platforms/STM32F1xx/stm32_rcc.h index 41cf725cb..877da08db 100644 --- a/os/hal/platforms/STM32F1xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F1xx/stm32_rcc.h @@ -171,7 +171,7 @@ /** @} */ /** - * @brief ADC peripherals specific RCC operations + * @name ADC peripherals specific RCC operations * @{ */ /** @@ -203,7 +203,7 @@ /** @} */ /** - * @brief Backup domain interface specific RCC operations + * @name Backup domain interface specific RCC operations * @{ */ /** @@ -244,7 +244,7 @@ /** @} */ /** - * @brief PWR interface specific RCC operations + * @name PWR interface specific RCC operations * @{ */ /** @@ -276,7 +276,7 @@ /** @} */ /** - * @brief CAN peripherals specific RCC operations + * @name CAN peripherals specific RCC operations * @{ */ /** @@ -308,7 +308,7 @@ /** @} */ /** - * @brief DMA peripherals specific RCC operations + * @name DMA peripherals specific RCC operations * @{ */ /** @@ -369,7 +369,7 @@ /** @} */ /** - * @brief ETH peripheral specific RCC operations + * @name ETH peripheral specific RCC operations * @{ */ /** @@ -405,7 +405,7 @@ /** @} */ /** - * @brief I2C peripherals specific RCC operations + * @name I2C peripherals specific RCC operations * @{ */ /** @@ -464,7 +464,7 @@ /** @} */ /** - * @brief SDIO peripheral specific RCC operations + * @name SDIO peripheral specific RCC operations * @{ */ /** @@ -497,7 +497,7 @@ /** @} */ /** - * @brief SPI peripherals specific RCC operations + * @name SPI peripherals specific RCC operations * @{ */ /** @@ -583,7 +583,7 @@ /** @} */ /** - * @brief TIM peripherals specific RCC operations + * @name TIM peripherals specific RCC operations * @{ */ /** @@ -750,7 +750,7 @@ /** @} */ /** - * @brief USART/UART peripherals specific RCC operations + * @name USART/UART peripherals specific RCC operations * @{ */ /** @@ -890,7 +890,7 @@ /** @} */ /** - * @brief USB peripheral specific RCC operations + * @name USB peripheral specific RCC operations * @{ */ /** diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c index a56051a05..9b9359090 100644 --- a/os/hal/platforms/STM32F2xx/hal_lld.c +++ b/os/hal/platforms/STM32F2xx/hal_lld.c @@ -78,7 +78,7 @@ void hal_lld_init(void) { dmaInit(); #endif - /* Programmable voltage detector enable. */ + /* Programmable voltage detector enable.*/ #if STM32_PVD_ENABLE rccEnablePWRInterface(FALSE); PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK); diff --git a/os/hal/platforms/STM32F2xx/hal_lld.h b/os/hal/platforms/STM32F2xx/hal_lld.h index 280cbea43..1113ec44b 100644 --- a/os/hal/platforms/STM32F2xx/hal_lld.h +++ b/os/hal/platforms/STM32F2xx/hal_lld.h @@ -140,13 +140,13 @@ */ #define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */ #define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */ +#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */ +#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */ +#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */ +#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */ +#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */ +#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */ +#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */ /** @} */ /** diff --git a/os/hal/platforms/STM32F2xx/stm32_rcc.h b/os/hal/platforms/STM32F2xx/stm32_rcc.h index 39d674bd0..da30c6518 100644 --- a/os/hal/platforms/STM32F2xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F2xx/stm32_rcc.h @@ -256,7 +256,7 @@ /** @} */ /** - * @brief ADC peripherals specific RCC operations + * @name ADC peripherals specific RCC operations * @{ */ /** @@ -336,7 +336,7 @@ /** @} */ /** - * @brief DMA peripheral specific RCC operations + * @name DMA peripheral specific RCC operations * @{ */ /** @@ -391,7 +391,7 @@ /** @} */ /** - * @brief PWR interface specific RCC operations + * @name PWR interface specific RCC operations * @{ */ /** @@ -423,7 +423,7 @@ /** @} */ /** - * @brief I2C peripherals specific RCC operations + * @name I2C peripherals specific RCC operations * @{ */ /** @@ -503,7 +503,7 @@ /** @} */ /** - * @brief SPI peripherals specific RCC operations + * @name SPI peripherals specific RCC operations * @{ */ /** @@ -583,7 +583,7 @@ /** @} */ /** - * @brief TIM peripherals specific RCC operations + * @name TIM peripherals specific RCC operations * @{ */ /** @@ -744,7 +744,7 @@ /** @} */ /** - * @brief USART/UART peripherals specific RCC operations + * @name USART/UART peripherals specific RCC operations * @{ */ /** diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c index 71b8ad219..02905b6bd 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.c +++ b/os/hal/platforms/STM32F4xx/hal_lld.c @@ -78,7 +78,7 @@ void hal_lld_init(void) { dmaInit(); #endif - /* Programmable voltage detector enable. */ + /* Programmable voltage detector enable.*/ #if STM32_PVD_ENABLE rccEnablePWRInterface(FALSE); PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK); diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index 953a7af45..43549fdd9 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -139,13 +139,13 @@ #define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */ #define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */ +#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */ +#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */ +#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */ +#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */ +#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */ +#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */ +#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */ /** @} */ /** diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index a20274b26..be600e44f 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -256,7 +256,7 @@ /** @} */ /** - * @brief ADC peripherals specific RCC operations + * @name ADC peripherals specific RCC operations * @{ */ /** @@ -336,7 +336,7 @@ /** @} */ /** - * @brief DMA peripheral specific RCC operations + * @name DMA peripheral specific RCC operations * @{ */ /** @@ -391,7 +391,7 @@ /** @} */ /** - * @brief PWR interface specific RCC operations + * @name PWR interface specific RCC operations * @{ */ /** @@ -423,7 +423,7 @@ /** @} */ /** - * @brief I2C peripherals specific RCC operations + * @name I2C peripherals specific RCC operations * @{ */ /** @@ -503,7 +503,7 @@ /** @} */ /** - * @brief SPI peripherals specific RCC operations + * @name SPI peripherals specific RCC operations * @{ */ /** @@ -583,7 +583,7 @@ /** @} */ /** - * @brief TIM peripherals specific RCC operations + * @name TIM peripherals specific RCC operations * @{ */ /** @@ -744,7 +744,7 @@ /** @} */ /** - * @brief USART/UART peripherals specific RCC operations + * @name USART/UART peripherals specific RCC operations * @{ */ /** diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c index 69619dead..f4b1b80e7 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.c +++ b/os/hal/platforms/STM32L1xx/hal_lld.c @@ -75,7 +75,7 @@ void hal_lld_init(void) { dmaInit(); #endif - /* Programmable voltage detector enable. */ + /* Programmable voltage detector enable.*/ #if STM32_PVD_ENABLE rccEnablePWRInterface(FALSE); PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK); diff --git a/os/hal/platforms/STM32L1xx/hal_lld.h b/os/hal/platforms/STM32L1xx/hal_lld.h index c11c9ccd8..79d2ca725 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.h +++ b/os/hal/platforms/STM32L1xx/hal_lld.h @@ -69,13 +69,13 @@ #define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */ #define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */ -#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */ +#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */ +#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */ +#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */ +#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */ +#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */ +#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */ +#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */ /** @} */ /** diff --git a/os/hal/platforms/STM32L1xx/stm32_rcc.h b/os/hal/platforms/STM32L1xx/stm32_rcc.h index 9068adc5a..0969aad91 100644 --- a/os/hal/platforms/STM32L1xx/stm32_rcc.h +++ b/os/hal/platforms/STM32L1xx/stm32_rcc.h @@ -177,7 +177,7 @@ /** @} */ /** - * @brief ADC peripherals specific RCC operations + * @name ADC peripherals specific RCC operations * @{ */ /** @@ -207,7 +207,7 @@ /** @} */ /** - * @brief DMA peripheral specific RCC operations + * @name DMA peripheral specific RCC operations * @{ */ /** @@ -237,7 +237,7 @@ /** @} */ /** - * @brief PWR interface specific RCC operations + * @name PWR interface specific RCC operations * @{ */ /** @@ -269,7 +269,7 @@ /** @} */ /** - * @brief I2C peripherals specific RCC operations + * @name I2C peripherals specific RCC operations * @{ */ /** @@ -324,7 +324,7 @@ /** @} */ /** - * @brief SPI peripherals specific RCC operations + * @name SPI peripherals specific RCC operations * @{ */ /** @@ -379,7 +379,7 @@ /** @} */ /** - * @brief TIM peripherals specific RCC operations + * @name TIM peripherals specific RCC operations * @{ */ /** @@ -459,7 +459,7 @@ /** @} */ /** - * @brief USART/UART peripherals specific RCC operations + * @name USART/UART peripherals specific RCC operations * @{ */ /** @@ -539,7 +539,7 @@ /** @} */ /** - * @brief USB peripheral specific RCC operations + * @name USB peripheral specific RCC operations * @{ */ /** -- cgit v1.2.3