From 2891f7d645c4be187ac96ee4011207531d25c34a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 4 Oct 2010 17:16:18 +0000 Subject: Documentation improvements, fixed a small error in the STM32 serial driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2234 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/AT91SAM7/at91sam7_mii.c | 35 +++++---- os/hal/platforms/AT91SAM7/at91sam7_mii.h | 13 ++-- os/hal/platforms/AT91SAM7/hal_lld.c | 18 +++-- os/hal/platforms/AT91SAM7/hal_lld.h | 9 ++- os/hal/platforms/AT91SAM7/mac_lld.c | 125 ++++++++++++++++++------------- os/hal/platforms/AT91SAM7/mac_lld.h | 23 +++--- os/hal/platforms/AT91SAM7/pal_lld.c | 32 ++++---- os/hal/platforms/AT91SAM7/pal_lld.h | 111 ++++++++++++++------------- os/hal/platforms/AT91SAM7/serial_lld.c | 16 ++++ os/hal/platforms/AT91SAM7/spi_lld.c | 49 +++++++----- os/hal/platforms/AT91SAM7/spi_lld.h | 11 +-- os/hal/platforms/AVR/hal_lld.c | 9 ++- os/hal/platforms/AVR/hal_lld.h | 5 +- os/hal/platforms/AVR/serial_lld.c | 26 +++++++ os/hal/platforms/LPC11xx/hal_lld.c | 5 ++ os/hal/platforms/LPC11xx/pal_lld.c | 25 ++++--- os/hal/platforms/LPC11xx/pal_lld.h | 28 ++++++- os/hal/platforms/LPC11xx/serial_lld.c | 8 ++ os/hal/platforms/LPC11xx/serial_lld.h | 4 +- os/hal/platforms/LPC13xx/hal_lld.c | 7 +- os/hal/platforms/LPC13xx/pal_lld.c | 23 +++--- os/hal/platforms/LPC13xx/pal_lld.h | 28 ++++++- os/hal/platforms/LPC13xx/serial_lld.c | 8 ++ os/hal/platforms/LPC13xx/serial_lld.h | 2 +- os/hal/platforms/LPC214x/hal_lld.c | 18 +++-- os/hal/platforms/LPC214x/hal_lld.h | 7 +- os/hal/platforms/LPC214x/pal_lld.c | 30 ++++---- os/hal/platforms/LPC214x/pal_lld.h | 124 +++++++++++++++--------------- os/hal/platforms/LPC214x/serial_lld.c | 10 +++ os/hal/platforms/LPC214x/serial_lld.h | 2 +- os/hal/platforms/LPC214x/spi_lld.c | 52 ++++++++----- os/hal/platforms/LPC214x/spi_lld.h | 13 ++-- os/hal/platforms/LPC214x/vic.c | 4 + os/hal/platforms/MSP430/hal_lld.c | 11 ++- os/hal/platforms/MSP430/hal_lld.h | 13 ++-- os/hal/platforms/MSP430/pal_lld.c | 33 ++++---- os/hal/platforms/MSP430/pal_lld.h | 85 +++++++++++---------- os/hal/platforms/MSP430/serial_lld.c | 26 +++++++ os/hal/platforms/MSP430/serial_lld.h | 2 +- os/hal/platforms/SPC56x/hal_lld.c | 5 ++ os/hal/platforms/SPC56x/serial_lld.c | 10 +++ os/hal/platforms/STM32/adc_lld.c | 12 +++ os/hal/platforms/STM32/can_lld.c | 40 ++++++++-- os/hal/platforms/STM32/hal_lld.c | 13 +++- os/hal/platforms/STM32/pal_lld.c | 4 + os/hal/platforms/STM32/pal_lld.h | 20 ++++- os/hal/platforms/STM32/pwm_lld.c | 41 +++++++--- os/hal/platforms/STM32/serial_lld.c | 31 ++++++++ os/hal/platforms/STM32/spi_lld.c | 30 ++++++++ os/hal/platforms/STM32/stm32_dma.c | 6 ++ os/hal/platforms/STM32/stm32_dma.h | 16 ++++ os/hal/platforms/STM32/uart_lld.c | 32 ++++++++ os/hal/platforms/STM8/hal_lld.c | 2 + os/hal/platforms/STM8/pal_lld.c | 2 + os/hal/platforms/STM8/pal_lld.h | 10 +++ os/hal/platforms/STM8/serial_lld.c | 36 +++++++++ 56 files changed, 938 insertions(+), 422 deletions(-) (limited to 'os/hal/platforms') diff --git a/os/hal/platforms/AT91SAM7/at91sam7_mii.c b/os/hal/platforms/AT91SAM7/at91sam7_mii.c index 8a79082c5..2f1665847 100644 --- a/os/hal/platforms/AT91SAM7/at91sam7_mii.c +++ b/os/hal/platforms/AT91SAM7/at91sam7_mii.c @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/at91sam7_mii.c - * @brief AT91SAM7 low level MII driver code. + * @file AT91SAM7/at91sam7_mii.c + * @brief AT91SAM7 low level MII driver code. + * * @addtogroup AT91SAM7_MII * @{ */ @@ -51,16 +52,20 @@ /*===========================================================================*/ /** - * @brief Low level MII driver initialization. + * @brief Low level MII driver initialization. + * + * @notapi */ void miiInit(void) { } /** - * @brief Resets a PHY device. + * @brief Resets a PHY device. + * + * @param[in] macp pointer to the @p MACDriver object * - * @param[in] macp pointer to the @p MACDriver object + * @notapi */ void miiReset(MACDriver *macp) { @@ -94,11 +99,13 @@ void miiReset(MACDriver *macp) { } /** - * @brief Reads a PHY register through the MII interface. + * @brief Reads a PHY register through the MII interface. * - * @param[in] macp pointer to the @p MACDriver object - * @param addr the register address - * @return The register value. + * @param[in] macp pointer to the @p MACDriver object + * @param[in] addr the register address + * @return The register value. + * + * @notapi */ phyreg_t miiGet(MACDriver *macp, phyaddr_t addr) { @@ -114,11 +121,13 @@ phyreg_t miiGet(MACDriver *macp, phyaddr_t addr) { } /** - * @brief Writes a PHY register through the MII interface. + * @brief Writes a PHY register through the MII interface. + * + * @param[in] macp pointer to the @p MACDriver object + * @param[in] addr the register address + * @param[in] value the new register value * - * @param[in] macp pointer to the @p MACDriver object - * @param addr the register address - * @param value the new register value + * @notapi */ void miiPut(MACDriver *macp, phyaddr_t addr, phyreg_t value) { diff --git a/os/hal/platforms/AT91SAM7/at91sam7_mii.h b/os/hal/platforms/AT91SAM7/at91sam7_mii.h index 8d98d41b0..a02ca90c9 100644 --- a/os/hal/platforms/AT91SAM7/at91sam7_mii.h +++ b/os/hal/platforms/AT91SAM7/at91sam7_mii.h @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/at91sam7_mii.h - * @brief AT91SAM7 low level MII driver header. + * @file AT91SAM7/at91sam7_mii.h + * @brief AT91SAM7 low level MII driver header. + * * @addtogroup AT91SAM7_MII * @{ */ @@ -41,7 +42,7 @@ /*===========================================================================*/ /** - * @brief PHY manufacturer and model. + * @brief PHY manufacturer and model. */ #if !defined(PHY_HARDWARE) || defined(__DOXYGEN__) #define PHY_HARDWARE PHY_MICREL_KS8721 @@ -52,7 +53,7 @@ /*===========================================================================*/ /** - * @brief Pins latched by the PHY at reset. + * @brief Pins latched by the PHY at reset. */ #if PHY_HARDWARE == PHY_MICREL_KS8721 #define PHY_ADDRESS 1 @@ -78,12 +79,12 @@ /*===========================================================================*/ /** - * @brief Type of a PHY register value. + * @brief Type of a PHY register value. */ typedef uint16_t phyreg_t; /** - * @brief Type of a PHY register address. + * @brief Type of a PHY register address. */ typedef uint8_t phyaddr_t; diff --git a/os/hal/platforms/AT91SAM7/hal_lld.c b/os/hal/platforms/AT91SAM7/hal_lld.c index 370b7cad5..4f2845411 100644 --- a/os/hal/platforms/AT91SAM7/hal_lld.c +++ b/os/hal/platforms/AT91SAM7/hal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/hal_lld.c - * @brief AT91SAM7 HAL subsystem low level driver source. + * @file AT91SAM7/hal_lld.c + * @brief AT91SAM7 HAL subsystem low level driver source. + * * @addtogroup AT91SAM7_HAL * @{ */ @@ -36,7 +37,7 @@ /*===========================================================================*/ /** - * @brief PAL setup. + * @brief PAL setup. * @details Digital I/O ports static configuration as defined in @p board.h. */ const PALConfig pal_default_config = @@ -72,7 +73,9 @@ static CH_IRQ_HANDLER(spurious_handler) { /*===========================================================================*/ /** - * @brief Low level HAL driver initialization. + * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { unsigned i; @@ -93,8 +96,11 @@ void hal_lld_init(void) { } /** - * @brief AT91SAM7 clocks and PLL initialization. - * @note All the involved constants come from the file @p board.h. + * @brief AT91SAM7 clocks and PLL initialization. + * @note All the involved constants come from the file @p board.h. + * @note This function must be invoked only after the system reset. + * + * @special */ void at91sam7_clock_init(void) { diff --git a/os/hal/platforms/AT91SAM7/hal_lld.h b/os/hal/platforms/AT91SAM7/hal_lld.h index e1a8fa2f8..d75fc8317 100644 --- a/os/hal/platforms/AT91SAM7/hal_lld.h +++ b/os/hal/platforms/AT91SAM7/hal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/hal_lld.h - * @brief AT91SAM7 HAL subsystem low level driver header. + * @file AT91SAM7/hal_lld.h + * @brief AT91SAM7 HAL subsystem low level driver header. + * * @addtogroup AT91SAM7_HAL * @{ */ @@ -44,14 +45,14 @@ /*===========================================================================*/ /** - * @brief Default action for the spurious handler, nothing. + * @brief Default action for the spurious handler, nothing. */ #if !defined(AT91SAM7_SPURIOUS_HANDLER_HOOK) || defined(__DOXYGEN__) #define AT91SAM7_SPURIOUS_HANDLER_HOOK() #endif /** - * @brief Default divider for the USB clock - half the PLL clock. + * @brief Default divider for the USB clock - half the PLL clock. */ #if !defined(AT91SAM7_USBDIV) || defined(__DOXYGEN__) #define AT91SAM7_USBDIV AT91C_CKGR_USBDIV_1 diff --git a/os/hal/platforms/AT91SAM7/mac_lld.c b/os/hal/platforms/AT91SAM7/mac_lld.c index 248202b05..0a03d192a 100644 --- a/os/hal/platforms/AT91SAM7/mac_lld.c +++ b/os/hal/platforms/AT91SAM7/mac_lld.c @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/mac_lld.c - * @brief AT91SAM7 low level MAC driver code. + * @file AT91SAM7/mac_lld.c + * @brief AT91SAM7 low level MAC driver code. + * * @addtogroup AT91SAM7_MAC * @{ */ @@ -53,7 +54,7 @@ /*===========================================================================*/ /** - * @brief Ethernet driver 1. + * @brief Ethernet driver 1. */ MACDriver ETH1; @@ -83,7 +84,7 @@ static uint8_t tb[EMAC_TRANSMIT_DESCRIPTORS * EMAC_TRANSMIT_BUFFERS_SIZE] /*===========================================================================*/ /** - * @brief IRQ handler. + * @brief IRQ handler. */ /** @cond never*/ __attribute__((noinline)) @@ -120,8 +121,9 @@ static void serve_interrupt(void) { } /** - * @brief Cleans an incomplete frame. - * @param from the start position of the incomplete frame + * @brief Cleans an incomplete frame. + * + * @param[in] from the start position of the incomplete frame */ static void cleanup(EMACDescriptor *from) { @@ -137,7 +139,9 @@ static void cleanup(EMACDescriptor *from) { /*===========================================================================*/ /** - * @brief EMAC IRQ veneer handler. + * @brief EMAC IRQ handler. + * + * @isr */ CH_IRQ_HANDLER(irq_handler) { @@ -153,7 +157,9 @@ CH_IRQ_HANDLER(irq_handler) { /*===========================================================================*/ /** - * @brief Low level MAC initialization. + * @brief Low level MAC initialization. + * + * @notapi */ void mac_lld_init(void) { unsigned i; @@ -228,13 +234,15 @@ void mac_lld_init(void) { } /** - * @brief Low level MAC address setup. + * @brief Low level MAC address setup. + * + * @param[in] macp pointer to the @p MACDriver object + * @param[in] p pointer to a six bytes buffer containing the MAC + * address. If this parameter is set to @p NULL then + * a system default MAC is used. The MAC address must + * be aligned with the most significant byte first. * - * @param[in] macp pointer to the @p MACDriver object - * @param[in] p pointer to a six bytes buffer containing the MAC address. If - * this parameter is set to @p NULL then a system default MAC is - * used. The MAC address must be aligned with the most significant - * byte first. + * @notapi */ void mac_lld_set_address(MACDriver *macp, const uint8_t *p) { @@ -245,15 +253,17 @@ void mac_lld_set_address(MACDriver *macp, const uint8_t *p) { } /** - * @brief Returns a transmission descriptor. + * @brief Returns a transmission descriptor. * @details One of the available transmission descriptors is locked and * returned. * - * @param[in] macp pointer to the @p MACDriver object - * @param[out] tdp pointer to a @p MACTransmitDescriptor structure - * @return The operation status. - * @retval RDY_OK the descriptor was obtained. - * @retval RDY_TIMEOUT descriptor not available. + * @param[in] macp pointer to the @p MACDriver object + * @param[out] tdp pointer to a @p MACTransmitDescriptor structure + * @return The operation status. + * @retval RDY_OK the descriptor has been obtained. + * @retval RDY_TIMEOUT descriptor not available. + * + * @notapi */ msg_t max_lld_get_transmit_descriptor(MACDriver *macp, MACTransmitDescriptor *tdp) { @@ -288,14 +298,18 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp, } /** - * @brief Writes to a transmit descriptor's stream. + * @brief Writes to a transmit descriptor's stream. * - * @param[in] tdp pointer to a @p MACTransmitDescriptor structure - * @param[in] buf pointer to the buffer cointaining the data to be written - * @param[in] size number of bytes to be written - * @return The number of bytes written into the descriptor's stream, this - * value can be less than the amount specified in the parameter - * @p size if the maximum frame size is reached. + * @param[in] tdp pointer to a @p MACTransmitDescriptor structure + * @param[in] buf pointer to the buffer cointaining the data to be + * written + * @param[in] size number of bytes to be written + * @return The number of bytes written into the descriptor's + * stream, this value can be less than the amount + * specified in the parameter @p size if the maximum + * frame size is reached. + * + * @notapi */ size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp, uint8_t *buf, @@ -313,10 +327,12 @@ size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp, } /** - * @brief Releases a transmit descriptor and starts the transmission of the - * enqueued data as a single frame. + * @brief Releases a transmit descriptor and starts the transmission of the + * enqueued data as a single frame. + * + * @param[in] tdp the pointer to the @p MACTransmitDescriptor structure * - * @param[in] tdp the pointer to the @p MACTransmitDescriptor structure + * @notapi */ void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) { @@ -329,13 +345,15 @@ void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) { } /** - * @brief Returns a receive descriptor. + * @brief Returns a receive descriptor. + * + * @param[in] macp pointer to the @p MACDriver object + * @param[out] rdp pointer to a @p MACReceiveDescriptor structure + * @return The operation status. + * @retval RDY_OK the descriptor has been obtained. + * @retval RDY_TIMEOUT descriptor not available. * - * @param[in] macp pointer to the @p MACDriver object - * @param[out] rdp pointer to a @p MACReceiveDescriptor structure - * @return The operation status. - * @retval RDY_OK the descriptor was obtained. - * @retval RDY_TIMEOUT descriptor not available. + * @notapi */ msg_t max_lld_get_receive_descriptor(MACDriver *macp, MACReceiveDescriptor *rdp) { @@ -402,14 +420,17 @@ restart: } /** - * @brief Reads from a receive descriptor's stream. + * @brief Reads from a receive descriptor's stream. * - * @param[in] rdp pointer to a @p MACReceiveDescriptor structure - * @param[in] buf pointer to the buffer that will receive the read data - * @param[in] size number of bytes to be read - * @return The number of bytes read from the descriptor's stream, this - * value can be less than the amount specified in the parameter - * @p size if there are no more bytes to read. + * @param[in] rdp pointer to a @p MACReceiveDescriptor structure + * @param[in] buf pointer to the buffer that will receive the read data + * @param[in] size number of bytes to be read + * @return The number of bytes read from the descriptor's + * stream, this value can be less than the amount + * specified in the parameter @p size if there are + * no more bytes to read. + * + * @notapi */ size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp, uint8_t *buf, @@ -434,11 +455,13 @@ size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp, } /** - * @brief Releases a receive descriptor. + * @brief Releases a receive descriptor. * @details The descriptor and its buffer are made available for more incoming * frames. * - * @param[in] rdp the pointer to the @p MACReceiveDescriptor structure + * @param[in] rdp the pointer to the @p MACReceiveDescriptor structure + * + * @notapi */ void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) { bool_t done; @@ -464,12 +487,14 @@ void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) { } /** - * @brief Updates and returns the link status. + * @brief Updates and returns the link status. + * + * @param[in] macp pointer to the @p MACDriver object + * @return The link status. + * @retval TRUE if the link is active. + * @retval FALSE if the link is down. * - * @param[in] macp pointer to the @p MACDriver object - * @return The link status. - * @retval TRUE if the link is active. - * @retval FALSE if the link is down. + * @notapi */ bool_t mac_lld_poll_link_status(MACDriver *macp) { uint32_t ncfgr, bmsr, bmcr, lpa; diff --git a/os/hal/platforms/AT91SAM7/mac_lld.h b/os/hal/platforms/AT91SAM7/mac_lld.h index c98afc0f8..ff8638d75 100644 --- a/os/hal/platforms/AT91SAM7/mac_lld.h +++ b/os/hal/platforms/AT91SAM7/mac_lld.h @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/mac_lld.h - * @brief AT91SAM7 low level MAC driver header. + * @file AT91SAM7/mac_lld.h + * @brief AT91SAM7 low level MAC driver header. + * * @addtogroup AT91SAM7_MAC * @{ */ @@ -81,28 +82,28 @@ /*===========================================================================*/ /** - * @brief Number of available transmit buffers. + * @brief Number of available transmit buffers. */ #if !defined(MAC_TRANSMIT_BUFFERS) || defined(__DOXYGEN__) #define MAC_TRANSMIT_BUFFERS 2 #endif /** - * @brief Number of available receive buffers. + * @brief Number of available receive buffers. */ #if !defined(MAC_RECEIVE_BUFFERS) || defined(__DOXYGEN__) #define MAC_RECEIVE_BUFFERS 2 #endif /** - * @brief Maximum supported frame size. + * @brief Maximum supported frame size. */ #if !defined(MAC_BUFFERS_SIZE) || defined(__DOXYGEN__) #define MAC_BUFFERS_SIZE 1518 #endif /** - * @brief Interrupt priority level for the EMAC device. + * @brief Interrupt priority level for the EMAC device. */ #if !defined(EMAC_INTERRUPT_PRIORITY) || defined(__DOXYGEN__) #define EMAC_INTERRUPT_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 3) @@ -117,8 +118,8 @@ /*===========================================================================*/ /** - * @brief Structure representing a buffer physical descriptor. - * @note It represents both descriptor types. + * @brief Structure representing a buffer physical descriptor. + * @note It represents both descriptor types. */ typedef struct { uint32_t w1; @@ -126,7 +127,7 @@ typedef struct { } EMACDescriptor; /** - * @brief Structure representing a MAC driver. + * @brief Structure representing a MAC driver. */ typedef struct { Semaphore md_tdsem; /**< Transmit semaphore. */ @@ -138,7 +139,7 @@ typedef struct { } MACDriver; /** - * @brief Structure representing a transmit descriptor. + * @brief Structure representing a transmit descriptor. */ typedef struct { size_t td_offset; /**< Current write offset. */ @@ -149,7 +150,7 @@ typedef struct { } MACTransmitDescriptor; /** - * @brief Structure representing a receive descriptor. + * @brief Structure representing a receive descriptor. */ typedef struct { size_t rd_offset; /**< Current read offset. */ diff --git a/os/hal/platforms/AT91SAM7/pal_lld.c b/os/hal/platforms/AT91SAM7/pal_lld.c index 3ea061f07..6545be0e6 100644 --- a/os/hal/platforms/AT91SAM7/pal_lld.c +++ b/os/hal/platforms/AT91SAM7/pal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/pal_lld.c - * @brief AT91SAM7 PIO low level driver code. + * @file AT91SAM7/pal_lld.c + * @brief AT91SAM7 PIO low level driver code. + * * @addtogroup AT91SAM7_PAL * @{ */ @@ -50,10 +51,12 @@ /*===========================================================================*/ /** - * @brief AT91SAM7 I/O ports configuration. + * @brief AT91SAM7 I/O ports configuration. * @details PIO registers initialization. * - * @param[in] config the AT91SAM7 ports configuration + * @param[in] config the AT91SAM7 ports configuration + * + * @notapi */ void _pal_lld_init(const PALConfig *config) { @@ -99,20 +102,21 @@ void _pal_lld_init(const PALConfig *config) { } /** - * @brief Pads mode setup. + * @brief Pads mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note This function is not meant to be invoked directly from the + * application code. + * @note @p PAL_MODE_RESET is implemented as input with pull-up. + * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with + * high state. + * @note @p PAL_MODE_OUTPUT_OPENDRAIN also enables the pull-up resistor. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_RESET is implemented as input with pull-up. - * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high - * state. - * @note @p PAL_MODE_OUTPUT_OPENDRAIN also enables the pull-up resistor. + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/AT91SAM7/pal_lld.h b/os/hal/platforms/AT91SAM7/pal_lld.h index 607cc040c..07e17caff 100644 --- a/os/hal/platforms/AT91SAM7/pal_lld.h +++ b/os/hal/platforms/AT91SAM7/pal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/pal_lld.h - * @brief AT91SAM7 PIO low level driver header. + * @file AT91SAM7/pal_lld.h + * @brief AT91SAM7 PIO low level driver header. + * * @addtogroup AT91SAM7_PAL * @{ */ @@ -40,7 +41,7 @@ /*===========================================================================*/ /** - * @brief PIO port setup info. + * @brief PIO port setup info. */ typedef struct { /** Initial value for ODSR register (data).*/ @@ -52,7 +53,7 @@ typedef struct { } at91sam7_pio_setup_t; /** - * @brief AT91SAM7 PIO static initializer. + * @brief AT91SAM7 PIO static initializer. * @details An instance of this structure must be passed to @p palInit() at * system startup time in order to initialize the digital I/O * subsystem. This represents only the initial setup, specific pads @@ -69,17 +70,23 @@ typedef struct { } PALConfig; /** - * @brief Width, in bits, of an I/O port. + * @brief Width, in bits, of an I/O port. */ #define PAL_IOPORTS_WIDTH 32 /** - * @brief Digital I/O port sized unsigned type. + * @brief Whole port mask. + * @details This macro specifies all the valid bits into a port. + */ +#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF) + +/** + * @brief Digital I/O port sized unsigned type. */ typedef uint32_t ioportmask_t; /** - * @brief Port Identifier. + * @brief Port Identifier. * @details This type can be a scalar or some kind of pointer, do not make * any assumption about it, use the provided macros when populating * variables of this type. @@ -91,12 +98,12 @@ typedef AT91PS_PIO ioportid_t; /*===========================================================================*/ /** - * @brief PIO port A identifier. + * @brief PIO port A identifier. */ #define IOPORT1 AT91C_BASE_PIOA /** - * @brief PIO port B identifier. + * @brief PIO port B identifier. */ #if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \ (SAM7_PLATFORM == SAM7X512) || defined(__DOXYGEN__) @@ -109,96 +116,89 @@ typedef AT91PS_PIO ioportid_t; /*===========================================================================*/ /** - * @brief Low level PAL subsystem initialization. + * @brief Low level PAL subsystem initialization. */ #define pal_lld_init(config) _pal_lld_init(config) /** - * @brief Reads the physical I/O port states. + * @brief Reads the physical I/O port states. * @details This function is implemented by reading the PIO_PDSR register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @return The port bits. + * @param[in] port the port identifier + * @return The port bits. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_readport(port) ((port)->PIO_PDSR) /** - * @brief Reads the output latch. + * @brief Reads the output latch. * @details This function is implemented by reading the PIO_ODSR register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @return The latched logical states. + * @param[in] port the port identifier + * @return The latched logical states. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_readlatch(port) ((port)->PIO_ODSR) /** - * @brief Writes a bits mask on a I/O port. + * @brief Writes a bits mask on a I/O port. * @details This function is implemented by writing the PIO_ODSR register, the * implementation has no side effects. * * @param[in] port the port identifier * @param[in] bits the bits to be written on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writeport(port, bits) { \ (port)->PIO_ODSR = (bits); \ } /** - * @brief Sets a bits mask on a I/O port. + * @brief Sets a bits mask on a I/O port. * @details This function is implemented by writing the PIO_SODR register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @param[in] bits the bits to be ORed on the specified port + * @param[in] port the port identifier + * @param[in] bits the bits to be ORed on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_setport(port, bits) { \ (port)->PIO_SODR = (bits); \ } - /** - * @brief Clears a bits mask on a I/O port. + * @brief Clears a bits mask on a I/O port. * @details This function is implemented by writing the PIO_CODR register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @param[in] bits the bits to be cleared on the specified port + * @param[in] port the port identifier + * @param[in] bits the bits to be cleared on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_clearport(port, bits) { \ (port)->PIO_CODR = (bits); \ } /** - * @brief Writes a group of bits. + * @brief Writes a group of bits. * @details This function is implemented by writing the PIO_OWER, PIO_ODSR and * PIO_OWDR registers, the implementation is not atomic because the * multiple accesses. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] offset the group bit offset within the port - * @param[in] bits the bits to be written. Values exceeding the group width - * are masked. + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] offset the group bit offset within the port + * @param[in] bits the bits to be written. Values exceeding the group + * width are masked. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writegroup(port, mask, offset, bits) { \ (port)->PIO_OWER = (mask) << (offset); \ @@ -207,31 +207,30 @@ typedef AT91PS_PIO ioportid_t; } /** - * @brief Pads group mode setup. + * @brief Pads group mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with + * high state. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high - * state. + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) /** - * @brief Writes a logical state on an output pad. + * @brief Writes a logical state on an output pad. * - * @param[in] port the port identifier - * @param[in] pad the pad number within the port - * @param[out] bit the logical value, the value must be @p 0 or @p 1 + * @param[in] port the port identifier + * @param[in] pad the pad number within the port + * @param[in] bit logical value, the value must be @p PAL_LOW or + * @p PAL_HIGH * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit) diff --git a/os/hal/platforms/AT91SAM7/serial_lld.c b/os/hal/platforms/AT91SAM7/serial_lld.c index 39e6540d4..47de0a0e6 100644 --- a/os/hal/platforms/AT91SAM7/serial_lld.c +++ b/os/hal/platforms/AT91SAM7/serial_lld.c @@ -219,6 +219,11 @@ static void notify3(void) { /*===========================================================================*/ #if USE_SAM7_USART0 || defined(__DOXYGEN__) +/** + * @brief USART0 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART0IrqHandler) { CH_IRQ_PROLOGUE(); @@ -229,6 +234,11 @@ CH_IRQ_HANDLER(USART0IrqHandler) { #endif #if USE_SAM7_USART1 || defined(__DOXYGEN__) +/** + * @brief USART1 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART1IrqHandler) { CH_IRQ_PROLOGUE(); @@ -247,6 +257,8 @@ CH_IRQ_HANDLER(USART1IrqHandler) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -291,6 +303,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -325,6 +339,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/AT91SAM7/spi_lld.c b/os/hal/platforms/AT91SAM7/spi_lld.c index 2353b76cb..d614aabb5 100644 --- a/os/hal/platforms/AT91SAM7/spi_lld.c +++ b/os/hal/platforms/AT91SAM7/spi_lld.c @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/spi_lld.c - * @brief AT91SAM7 low level SPI driver code. + * @file AT91SAM7/spi_lld.c + * @brief AT91SAM7 low level SPI driver code. + * * @addtogroup AT91SAM7_SPI * @{ */ @@ -47,7 +48,7 @@ SPIDriver SPID; /*===========================================================================*/ /** - * @brief Synchronous SPI transfer. + * @brief Synchronous SPI transfer. * * @param[in] n number of bytes to be exchanged * @@ -85,7 +86,9 @@ void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) { /*===========================================================================*/ /** - * @brief Low level SPI driver initialization. + * @brief Low level SPI driver initialization. + * + * @notapi */ void spi_lld_init(void) { @@ -95,9 +98,11 @@ void spi_lld_init(void) { } /** - * @brief Configures and activates the SPI peripheral. + * @brief Configures and activates the SPI peripheral. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_start(SPIDriver *spip) { @@ -120,9 +125,11 @@ void spi_lld_start(SPIDriver *spip) { } /** - * @brief Deactivates the SPI peripheral. + * @brief Deactivates the SPI peripheral. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_stop(SPIDriver *spip) { @@ -135,9 +142,11 @@ void spi_lld_stop(SPIDriver *spip) { } /** - * @brief Asserts the slave select signal and prepares for transfers. + * @brief Asserts the slave select signal and prepares for transfers. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_select(SPIDriver *spip) { @@ -145,10 +154,12 @@ void spi_lld_select(SPIDriver *spip) { } /** - * @brief Deasserts the slave select signal. + * @brief Deasserts the slave select signal. * @details The previously selected peripheral is unselected. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_unselect(SPIDriver *spip) { @@ -156,13 +167,15 @@ void spi_lld_unselect(SPIDriver *spip) { } /** - * @brief Ignores data on the SPI bus. + * @brief Ignores data on the SPI bus. * @details This function transmits a series of idle words on the SPI bus and * ignores the received data. This function can be invoked even * when a slave select signal has not been yet asserted. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to be ignored + * + * @notapi */ void spi_lld_ignore(SPIDriver *spip, size_t n) { @@ -171,16 +184,16 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { } /** - * @brief Exchanges data on the SPI bus. + * @brief Exchanges data on the SPI bus. * @details This function performs a simultaneous transmit/receive operation. + * @note The buffers are organized as uint8_t arrays. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to be exchanged * @param[in] txbuf the pointer to the transmit buffer * @param[out] rxbuf the pointer to the receive buffer * - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. + * @notapi */ void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { @@ -190,14 +203,14 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, } /** - * @brief Sends data over the SPI bus. + * @brief Sends data over the SPI bus. + * @note The buffers are organized as uint8_t arrays. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to send * @param[in] txbuf the pointer to the transmit buffer * - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. + * @notapi */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { @@ -206,14 +219,14 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { } /** - * @brief Receives data from the SPI bus. + * @brief Receives data from the SPI bus. + * @note The buffers are organized as uint8_t arrays. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to receive * @param[out] rxbuf the pointer to the receive buffer * - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. + * @notapi */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { diff --git a/os/hal/platforms/AT91SAM7/spi_lld.h b/os/hal/platforms/AT91SAM7/spi_lld.h index 529b284d2..4c5ed4388 100644 --- a/os/hal/platforms/AT91SAM7/spi_lld.h +++ b/os/hal/platforms/AT91SAM7/spi_lld.h @@ -18,8 +18,9 @@ */ /** - * @file AT91SAM7/spi_lld.h - * @brief AT91SAM7 low level SPI driver header. + * @file AT91SAM7/spi_lld.h + * @brief AT91SAM7 low level SPI driver header. + * * @addtogroup AT91SAM7_SPI * @{ */ @@ -46,9 +47,9 @@ /*===========================================================================*/ /** - * @brief SPI driver enable switch. + * @brief SPI driver enable switch. * @details If set to @p TRUE the support for SPI0 is included. - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(USE_AT91SAM7_SPI) || defined(__DOXYGEN__) #define USE_AT91SAM7_SPI TRUE @@ -63,7 +64,7 @@ /*===========================================================================*/ /** - * @brief Driver configuration structure. + * @brief Driver configuration structure. */ typedef struct { /** diff --git a/os/hal/platforms/AVR/hal_lld.c b/os/hal/platforms/AVR/hal_lld.c index a2bed98ed..c0e694804 100644 --- a/os/hal/platforms/AVR/hal_lld.c +++ b/os/hal/platforms/AVR/hal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file AVR/hal_lld.c - * @brief AVR HAL subsystem low level driver code. + * @file AVR/hal_lld.c + * @brief AVR HAL subsystem low level driver code. + * * @addtogroup AVR_HAL * @{ */ @@ -48,7 +49,9 @@ /*===========================================================================*/ /** - * @brief Low level HAL driver initialization. + * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { diff --git a/os/hal/platforms/AVR/hal_lld.h b/os/hal/platforms/AVR/hal_lld.h index 6e7c8fe77..9ffd46d7a 100644 --- a/os/hal/platforms/AVR/hal_lld.h +++ b/os/hal/platforms/AVR/hal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file AVR/hal_lld.h - * @brief AVR HAL subsystem low level driver header. + * @file AVR/hal_lld.h + * @brief AVR HAL subsystem low level driver header. + * * @addtogroup AVR_HAL * @{ */ diff --git a/os/hal/platforms/AVR/serial_lld.c b/os/hal/platforms/AVR/serial_lld.c index 8512fb873..74f8c63b4 100644 --- a/os/hal/platforms/AVR/serial_lld.c +++ b/os/hal/platforms/AVR/serial_lld.c @@ -149,6 +149,11 @@ static void usart1_deinit(void) { /*===========================================================================*/ #if USE_AVR_USART0 || defined(__DOXYGEN__) +/** + * @brief USART0 RX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART0_RX_vect) { uint8_t sra; @@ -164,6 +169,11 @@ CH_IRQ_HANDLER(USART0_RX_vect) { CH_IRQ_EPILOGUE(); } +/** + * @brief USART0 TX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART0_UDRE_vect) { msg_t b; @@ -182,6 +192,11 @@ CH_IRQ_HANDLER(USART0_UDRE_vect) { #endif /* USE_AVR_USART0 */ #if USE_AVR_USART1 || defined(__DOXYGEN__) +/** + * @brief USART1 RX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART1_RX_vect) { uint8_t sra; @@ -197,6 +212,11 @@ CH_IRQ_HANDLER(USART1_RX_vect) { CH_IRQ_EPILOGUE(); } +/** + * @brief USART1 TX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART1_UDRE_vect) { msg_t b; @@ -220,6 +240,8 @@ CH_IRQ_HANDLER(USART1_UDRE_vect) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -238,6 +260,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -264,6 +288,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/LPC11xx/hal_lld.c b/os/hal/platforms/LPC11xx/hal_lld.c index e7077cad9..8c8460852 100644 --- a/os/hal/platforms/LPC11xx/hal_lld.c +++ b/os/hal/platforms/LPC11xx/hal_lld.c @@ -66,6 +66,8 @@ const PALConfig pal_default_config = { /** * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { @@ -81,6 +83,9 @@ void hal_lld_init(void) { /** * @brief LPC11xx clocks and PLL initialization. * @note All the involved constants come from the file @p board.h. + * @note This function must be invoked only after the system reset. + * + * @special */ void lpc111x_clock_init(void) { unsigned i; diff --git a/os/hal/platforms/LPC11xx/pal_lld.c b/os/hal/platforms/LPC11xx/pal_lld.c index d4112fe2c..769dcba17 100644 --- a/os/hal/platforms/LPC11xx/pal_lld.c +++ b/os/hal/platforms/LPC11xx/pal_lld.c @@ -50,10 +50,12 @@ /* Driver exported functions. */ /*===========================================================================*/ /** - * @brief LPC11xx I/O ports configuration. + * @brief LPC11xx I/O ports configuration. * @details GPIO unit registers initialization. * - * @param[in] config the LPC11xx ports configuration + * @param[in] config the LPC11xx ports configuration + * + * @notapi */ void _pal_lld_init(const PALConfig *config) { @@ -68,20 +70,19 @@ void _pal_lld_init(const PALConfig *config) { } /** - * @brief Pads mode setup. + * @brief Pads mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with + * high state. + * @note This function does not alter the @p PINSELx registers. Alternate + * functions setup must be handled by device-specific code. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high - * state. - * @note This function does not alter the @p PINSELx registers. Alternate - * functions setup must be handled by device-specific code. + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/LPC11xx/pal_lld.h b/os/hal/platforms/LPC11xx/pal_lld.h index 55f2ea2b9..42e2ac247 100644 --- a/os/hal/platforms/LPC11xx/pal_lld.h +++ b/os/hal/platforms/LPC11xx/pal_lld.h @@ -44,7 +44,7 @@ /*===========================================================================*/ /** - * @brief GPIO port setup info. + * @brief GPIO port setup info. */ typedef struct { /** Initial value for FIO_PIN register.*/ @@ -134,6 +134,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @brief Low level PAL subsystem initialization. * * @param[in] config architecture-dependent ports configuration + * + * @notapi */ #define pal_lld_init(config) _pal_lld_init(config) @@ -144,6 +146,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @return The port bits. + * + * @notapi */ #define pal_lld_readport(port) ((port)->DATA) @@ -156,6 +160,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @return The latched logical states. + * + * @notapi */ #define pal_lld_readlatch(port) ((port)->DATA) @@ -166,6 +172,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be written on the specified port + * + * @notapi */ #define pal_lld_writeport(port, bits) ((port)->DATA = (bits)) @@ -179,6 +187,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be ORed on the specified port + * + * @notapi */ #define pal_lld_setport(port, bits) ((port)->MASKED_ACCESS[bits] = 0xFFFFFFFF) @@ -192,6 +202,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be cleared on the specified port + * + * @notapi */ #define pal_lld_clearport(port, bits) ((port)->MASKED_ACCESS[bits] = 0) @@ -207,6 +219,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @param[in] mask group mask * @param[in] offset group bit offset within the port * @return The group logical states. + * + * @notapi */ #define pal_lld_readgroup(port, mask, offset) \ ((port)->MASKED_ACCESS[(mask) << (offset)]) @@ -224,6 +238,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @param[in] offset group bit offset within the port * @param[in] bits bits to be written. Values exceeding the group width * are masked. + * + * @notapi */ #define pal_lld_writegroup(port, mask, offset, bits) \ ((port)->MASKED_ACCESS[(mask) << (offset)] = (bits)) @@ -239,6 +255,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @param[in] port port identifier * @param[in] mask group mask * @param[in] mode group mode + * + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) @@ -253,8 +271,10 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] pad pad number within the port - * @param[out] bit logical value, the value must be @p PAL_LOW or + * @param[in] bit logical value, the value must be @p PAL_LOW or * @p PAL_HIGH + * + * @notapi */ #define pal_lld_writepad(port, pad, bit) \ ((port)->MASKED_ACCESS[(mask) << (pad)] = (bit) << (pad)) @@ -269,6 +289,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] pad pad number within the port + * + * @notapi */ #define pal_lld_setpad(port, pad) \ ((port)->MASKED_ACCESS[1 << (pad)] = 1 << (pad)) @@ -283,6 +305,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] pad pad number within the port + * + * @notapi */ #define pal_lld_clearpad(port, pad) \ ((port)->MASKED_ACCESS[1 << (pad)] = 0) diff --git a/os/hal/platforms/LPC11xx/serial_lld.c b/os/hal/platforms/LPC11xx/serial_lld.c index 881087bc6..9f782cafe 100644 --- a/os/hal/platforms/LPC11xx/serial_lld.c +++ b/os/hal/platforms/LPC11xx/serial_lld.c @@ -210,6 +210,8 @@ static void notify1(void) { /** * @brief UART0 IRQ handler. + * + * @isr */ #if USE_LPC11xx_UART0 || defined(__DOXYGEN__) CH_IRQ_HANDLER(Vector94) { @@ -228,6 +230,8 @@ CH_IRQ_HANDLER(Vector94) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -246,6 +250,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -270,6 +276,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/LPC11xx/serial_lld.h b/os/hal/platforms/LPC11xx/serial_lld.h index bb91680cf..4a5a69d36 100644 --- a/os/hal/platforms/LPC11xx/serial_lld.h +++ b/os/hal/platforms/LPC11xx/serial_lld.h @@ -125,7 +125,7 @@ /*===========================================================================*/ /** - * @brief Serial Driver condition flags type. + * @brief Serial Driver condition flags type. */ typedef uint32_t sdflags_t; @@ -150,7 +150,7 @@ typedef struct { } SerialConfig; /** - * @brief @p SerialDriver specific data. + * @brief @p SerialDriver specific data. */ #define _serial_driver_data \ _base_asynchronous_channel_data \ diff --git a/os/hal/platforms/LPC13xx/hal_lld.c b/os/hal/platforms/LPC13xx/hal_lld.c index a3415ee90..37421f752 100644 --- a/os/hal/platforms/LPC13xx/hal_lld.c +++ b/os/hal/platforms/LPC13xx/hal_lld.c @@ -42,7 +42,7 @@ /*===========================================================================*/ /** - * @brief PAL setup. + * @brief PAL setup. * @details Digital I/O ports static configuration as defined in @p board.h. */ const PALConfig pal_default_config = { @@ -66,6 +66,8 @@ const PALConfig pal_default_config = { /** * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { @@ -81,6 +83,9 @@ void hal_lld_init(void) { /** * @brief LPC13xx clocks and PLL initialization. * @note All the involved constants come from the file @p board.h. + * @note This function must be invoked only after the system reset. + * + * @special */ void LPC13xx_clock_init(void) { unsigned i; diff --git a/os/hal/platforms/LPC13xx/pal_lld.c b/os/hal/platforms/LPC13xx/pal_lld.c index f63650c0f..f1e766c4d 100644 --- a/os/hal/platforms/LPC13xx/pal_lld.c +++ b/os/hal/platforms/LPC13xx/pal_lld.c @@ -50,10 +50,12 @@ /* Driver exported functions. */ /*===========================================================================*/ /** - * @brief LPC13xx I/O ports configuration. + * @brief LPC13xx I/O ports configuration. * @details GPIO unit registers initialization. * * @param[in] config the LPC13xx ports configuration + * + * @notapi */ void _pal_lld_init(const PALConfig *config) { @@ -68,20 +70,19 @@ void _pal_lld_init(const PALConfig *config) { } /** - * @brief Pads mode setup. + * @brief Pads mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with + * high state. + * @note This function does not alter the @p PINSELx registers. Alternate + * functions setup must be handled by device-specific code. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high - * state. - * @note This function does not alter the @p PINSELx registers. Alternate - * functions setup must be handled by device-specific code. + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/LPC13xx/pal_lld.h b/os/hal/platforms/LPC13xx/pal_lld.h index 4e145be80..aefaa3be2 100644 --- a/os/hal/platforms/LPC13xx/pal_lld.h +++ b/os/hal/platforms/LPC13xx/pal_lld.h @@ -44,7 +44,7 @@ /*===========================================================================*/ /** - * @brief GPIO port setup info. + * @brief GPIO port setup info. */ typedef struct { /** Initial value for FIO_PIN register.*/ @@ -134,6 +134,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @brief Low level PAL subsystem initialization. * * @param[in] config architecture-dependent ports configuration + * + * @notapi */ #define pal_lld_init(config) _pal_lld_init(config) @@ -144,6 +146,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @return The port bits. + * + * @notapi */ #define pal_lld_readport(port) ((port)->DATA) @@ -156,6 +160,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @return The latched logical states. + * + * @notapi */ #define pal_lld_readlatch(port) ((port)->DATA) @@ -166,6 +172,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be written on the specified port + * + * @notapi */ #define pal_lld_writeport(port, bits) ((port)->DATA = (bits)) @@ -179,6 +187,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be ORed on the specified port + * + * @notapi */ #define pal_lld_setport(port, bits) ((port)->MASKED_ACCESS[bits] = 0xFFFFFFFF) @@ -192,6 +202,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be cleared on the specified port + * + * @notapi */ #define pal_lld_clearport(port, bits) ((port)->MASKED_ACCESS[bits] = 0) @@ -207,6 +219,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @param[in] mask group mask * @param[in] offset group bit offset within the port * @return The group logical states. + * + * @notapi */ #define pal_lld_readgroup(port, mask, offset) \ ((port)->MASKED_ACCESS[(mask) << (offset)]) @@ -224,6 +238,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @param[in] offset group bit offset within the port * @param[in] bits bits to be written. Values exceeding the group width * are masked. + * + * @notapi */ #define pal_lld_writegroup(port, mask, offset, bits) \ ((port)->MASKED_ACCESS[(mask) << (offset)] = (bits)) @@ -239,6 +255,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * @param[in] port port identifier * @param[in] mask group mask * @param[in] mode group mode + * + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) @@ -253,8 +271,10 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] pad pad number within the port - * @param[out] bit logical value, the value must be @p PAL_LOW or + * @param[in] bit logical value, the value must be @p PAL_LOW or * @p PAL_HIGH + * + * @notapi */ #define pal_lld_writepad(port, pad, bit) \ ((port)->MASKED_ACCESS[(mask) << (pad)] = (bit) << (pad)) @@ -269,6 +289,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] pad pad number within the port + * + * @notapi */ #define pal_lld_setpad(port, pad) \ ((port)->MASKED_ACCESS[1 << (pad)] = 1 << (pad)) @@ -283,6 +305,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] pad pad number within the port + * + * @notapi */ #define pal_lld_clearpad(port, pad) \ ((port)->MASKED_ACCESS[1 << (pad)] = 0) diff --git a/os/hal/platforms/LPC13xx/serial_lld.c b/os/hal/platforms/LPC13xx/serial_lld.c index 2c5b7f47e..12da197e8 100644 --- a/os/hal/platforms/LPC13xx/serial_lld.c +++ b/os/hal/platforms/LPC13xx/serial_lld.c @@ -210,6 +210,8 @@ static void notify1(void) { /** * @brief UART0 IRQ handler. + * + * @isr */ #if USE_LPC13xx_UART0 || defined(__DOXYGEN__) CH_IRQ_HANDLER(VectorF8) { @@ -228,6 +230,8 @@ CH_IRQ_HANDLER(VectorF8) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -246,6 +250,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -270,6 +276,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/LPC13xx/serial_lld.h b/os/hal/platforms/LPC13xx/serial_lld.h index 0426c6d5f..54207d39d 100644 --- a/os/hal/platforms/LPC13xx/serial_lld.h +++ b/os/hal/platforms/LPC13xx/serial_lld.h @@ -150,7 +150,7 @@ typedef struct { } SerialConfig; /** - * @brief @p SerialDriver specific data. + * @brief @p SerialDriver specific data. */ #define _serial_driver_data \ _base_asynchronous_channel_data \ diff --git a/os/hal/platforms/LPC214x/hal_lld.c b/os/hal/platforms/LPC214x/hal_lld.c index 1deac96fb..352f5c736 100644 --- a/os/hal/platforms/LPC214x/hal_lld.c +++ b/os/hal/platforms/LPC214x/hal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file LPC214x/hal_lld.c - * @brief LPC214x HAL subsystem low level driver source. + * @file LPC214x/hal_lld.c + * @brief LPC214x HAL subsystem low level driver source. + * * @addtogroup LPC214x_HAL * @{ */ @@ -36,7 +37,7 @@ /*===========================================================================*/ /** - * @brief PAL setup. + * @brief PAL setup. * @details Digital I/O ports static configuration as defined in @p board.h. */ const PALConfig pal_default_config = @@ -75,7 +76,9 @@ static CH_IRQ_HANDLER(irq_handler) { /*===========================================================================*/ /** - * @brief Low level HAL driver initialization. + * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { @@ -85,8 +88,11 @@ void hal_lld_init(void) { } /** - * @brief LPC214x clocks and PLL initialization. - * @note All the involved constants come from the file @p board.h. + * @brief LPC214x clocks and PLL initialization. + * @note All the involved constants come from the file @p board.h. + * @note This function must be invoked only after the system reset. + * + * @special */ void lpc214x_clock_init(void) { diff --git a/os/hal/platforms/LPC214x/hal_lld.h b/os/hal/platforms/LPC214x/hal_lld.h index 0c231e4e5..4b88f13fc 100644 --- a/os/hal/platforms/LPC214x/hal_lld.h +++ b/os/hal/platforms/LPC214x/hal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file LPC214x/hal_lld.h - * @brief LPC214x HAL subsystem low level driver header. + * @file LPC214x/hal_lld.h + * @brief LPC214x HAL subsystem low level driver header. + * * @addtogroup LPC214x_HAL * @{ */ @@ -44,7 +45,7 @@ /*===========================================================================*/ /** - * @brief Default action for the non vectored IRQ handler, nothing. + * @brief Default action for the non vectored IRQ handler, nothing. */ #if !defined(LPC214x_NON_VECTORED_IRQ_HOOK) || defined(__DOXYGEN__) #define LPC214x_NON_VECTORED_IRQ_HOOK() diff --git a/os/hal/platforms/LPC214x/pal_lld.c b/os/hal/platforms/LPC214x/pal_lld.c index bc563be28..9e145ed48 100644 --- a/os/hal/platforms/LPC214x/pal_lld.c +++ b/os/hal/platforms/LPC214x/pal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file LPC214x/pal_lld.c - * @brief LPC214x FIO low level driver code. + * @file LPC214x/pal_lld.c + * @brief LPC214x FIO low level driver code. + * * @addtogroup LPC214x_PAL * @{ */ @@ -50,10 +51,12 @@ /*===========================================================================*/ /** - * @brief LPC214x I/O ports configuration. + * @brief LPC214x I/O ports configuration. * @details FIO units and PINSEL registers initialization. * - * @param[in] config the LPC214x ports configuration + * @param[in] config the LPC214x ports configuration + * + * @notapi */ void _pal_lld_init(const PALConfig *config) { @@ -76,20 +79,19 @@ void _pal_lld_init(const PALConfig *config) { } /** - * @brief Pads mode setup. + * @brief Pads mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with + * high state. + * @note This function does not alter the @p PINSELx registers. Alternate + * functions setup must be handled by device-specific code. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high - * state. - * @note This function does not alter the @p PINSELx registers. Alternate - * functions setup must be handled by device-specific code. + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/LPC214x/pal_lld.h b/os/hal/platforms/LPC214x/pal_lld.h index 4a0ca5106..f9e41b358 100644 --- a/os/hal/platforms/LPC214x/pal_lld.h +++ b/os/hal/platforms/LPC214x/pal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file LPC214x/pal_lld.h - * @brief LPC214x FIO low level driver header. + * @file LPC214x/pal_lld.h + * @brief LPC214x FIO low level driver header. + * * @addtogroup LPC214x_PAL * @{ */ @@ -42,7 +43,7 @@ /*===========================================================================*/ /** - * @brief FIO port setup info. + * @brief FIO port setup info. */ typedef struct { /** Initial value for FIO_PIN register.*/ @@ -52,7 +53,7 @@ typedef struct { } lpc214x_fio_setup_t; /** - * @brief LPC214x FIO static initializer. + * @brief LPC214x FIO static initializer. * @details An instance of this structure must be passed to @p palInit() at * system startup time in order to initialize the digital I/O * subsystem. This represents only the initial setup, specific pads @@ -72,17 +73,23 @@ typedef struct { } PALConfig; /** - * @brief Width, in bits, of an I/O port. + * @brief Width, in bits, of an I/O port. */ #define PAL_IOPORTS_WIDTH 32 /** - * @brief Digital I/O port sized unsigned type. + * @brief Whole port mask. + * @details This macro specifies all the valid bits into a port. + */ +#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF) + +/** + * @brief Digital I/O port sized unsigned type. */ typedef uint32_t ioportmask_t; /** - * @brief Port Identifier. + * @brief Port Identifier. */ typedef FIO * ioportid_t; @@ -91,12 +98,12 @@ typedef FIO * ioportid_t; /*===========================================================================*/ /** - * @brief FIO port 0 identifier. + * @brief FIO port 0 identifier. */ #define IOPORT1 FIO0Base /** - * @brief FIO port 1 identifier. + * @brief FIO port 1 identifier. */ #define IOPORT2 FIO1Base @@ -106,91 +113,85 @@ typedef FIO * ioportid_t; /*===========================================================================*/ /** - * @brief FIO subsystem initialization. + * @brief FIO subsystem initialization. * @details Enables the access through the fast registers. */ #define pal_lld_init(config) _pal_lld_init(config) /** - * @brief Reads an I/O port. + * @brief Reads an I/O port. * @details This function is implemented by reading the FIO PIN register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @return the port bits + * @param[in] port the port identifier + * @return The port bits. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_readport(port) ((port)->FIO_PIN) /** - * @brief Reads the output latch. + * @brief Reads the output latch. * @details This function is implemented by reading the FIO SET register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @return The latched logical states. + * @param[in] port the port identifier + * @return The latched logical states. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_readlatch(port) ((port)->FIO_SET) /** - * @brief Writes a bits mask on a I/O port. + * @brief Writes a bits mask on a I/O port. * @details This function is implemented by writing the FIO PIN register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @param[in] bits the bits to be written on the specified port + * @param[in] port the port identifier + * @param[in] bits the bits to be written on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writeport(port, bits) ((port)->FIO_PIN = (bits)) /** - * @brief Sets a bits mask on a I/O port. + * @brief Sets a bits mask on a I/O port. * @details This function is implemented by writing the FIO SET register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @param[in] bits the bits to be ORed on the specified port + * @param[in] port the port identifier + * @param[in] bits the bits to be ORed on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_setport(port, bits) ((port)->FIO_SET = (bits)) /** - * @brief Clears a bits mask on a I/O port. + * @brief Clears a bits mask on a I/O port. * @details This function is implemented by writing the FIO CLR register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @param[in] bits the bits to be cleared on the specified port + * @param[in] port the port identifier + * @param[in] bits the bits to be cleared on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_clearport(port, bits) ((port)->FIO_CLR = (bits)) /** - * @brief Writes a value on an I/O bus. + * @brief Writes a value on an I/O bus. * @details This function is implemented by writing the FIO PIN and MASK * registers, the implementation is not atomic because the multiple * accesses. * - * @param[in] port the port identifier - * @param[in] mask the group mask, a logical AND is performed on the output - * data - * @param[in] offset the group bit offset within the port - * @param[in] bits the bits to be written. Values exceeding the group width - * are masked. + * @param[in] port the port identifier + * @param[in] mask the group mask, a logical AND is performed on the + * output data + * @param[in] offset the group bit offset within the port + * @param[in] bits the bits to be written. Values exceeding the group + * width are masked. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writegroup(port, mask, offset, bits) { \ (port)->FIO_MASK = ~((mask) << (offset)); \ @@ -199,39 +200,40 @@ typedef FIO * ioportid_t; } /** - * @brief Pads group mode setup. + * @brief Pads group mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with + * high state. + * @note This function does not alter the @p PINSELx registers. Alternate + * functions setup must be handled by device-specific code. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high - * state. - * @note This function does not alter the @p PINSELx registers. Alternate - * functions setup must be handled by device-specific code. + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) /** - * @brief Writes a logical state on an output pad. + * @brief Writes a logical state on an output pad. * - * @param[in] port the port identifier - * @param[in] pad the pad number within the port - * @param[out] bit the logical value, the value must be @p 0 or @p 1 + * @param[in] port the port identifier + * @param[in] pad the pad number within the port + * @param[in] bit logical value, the value must be @p PAL_LOW or + * @p PAL_HIGH * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit) /** - * @brief FIO port setup. + * @brief FIO port setup. * @details This function programs the pins direction within a port. + * + * @notapi */ #define pal_lld_lpc214x_set_direction(port, dir) { \ (port)->FIO_DIR = (dir); \ diff --git a/os/hal/platforms/LPC214x/serial_lld.c b/os/hal/platforms/LPC214x/serial_lld.c index 87699aeb1..a1db8c537 100644 --- a/os/hal/platforms/LPC214x/serial_lld.c +++ b/os/hal/platforms/LPC214x/serial_lld.c @@ -227,6 +227,8 @@ static void notify2(void) { /** * @brief UART0 IRQ handler. + * + * @isr */ #if USE_LPC214x_UART0 || defined(__DOXYGEN__) CH_IRQ_HANDLER(UART0IrqHandler) { @@ -242,6 +244,8 @@ CH_IRQ_HANDLER(UART0IrqHandler) { /** * @brief UART1 IRQ handler. + * + * @isr */ #if USE_LPC214x_UART1 || defined(__DOXYGEN__) CH_IRQ_HANDLER(UART1IrqHandler) { @@ -261,6 +265,8 @@ CH_IRQ_HANDLER(UART1IrqHandler) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -283,6 +289,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -312,6 +320,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/LPC214x/serial_lld.h b/os/hal/platforms/LPC214x/serial_lld.h index a5cea7538..7b11cad38 100644 --- a/os/hal/platforms/LPC214x/serial_lld.h +++ b/os/hal/platforms/LPC214x/serial_lld.h @@ -121,7 +121,7 @@ typedef struct { } SerialConfig; /** - * @brief @p SerialDriver specific data. + * @brief @p SerialDriver specific data. */ #define _serial_driver_data \ _base_asynchronous_channel_data \ diff --git a/os/hal/platforms/LPC214x/spi_lld.c b/os/hal/platforms/LPC214x/spi_lld.c index 44c668db8..d829c3d62 100644 --- a/os/hal/platforms/LPC214x/spi_lld.c +++ b/os/hal/platforms/LPC214x/spi_lld.c @@ -18,8 +18,9 @@ */ /** - * @file LPC214x/spi_lld.c - * @brief LPC214x low level SPI driver code. + * @file LPC214x/spi_lld.c + * @brief LPC214x low level SPI driver code. + * * @addtogroup LPC214x_SPI * @{ */ @@ -47,14 +48,13 @@ SPIDriver SPID1; /*===========================================================================*/ /** - * @brief Synchronous SSP transfer. + * @brief Synchronous SSP transfer. * * @param[in] n number of bytes to be exchanged - * * @param[in] txbuf the pointer to the transmit buffer or @p NULL * @param[out] rxbuf the pointer to the receive buffer or @p NULL */ -void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) { +static void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) { size_t ntx = n; while (n > 0) { @@ -85,7 +85,9 @@ void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) { /*===========================================================================*/ /** - * @brief Low level SPI driver initialization. + * @brief Low level SPI driver initialization. + * + * @notapi */ void spi_lld_init(void) { @@ -95,9 +97,11 @@ void spi_lld_init(void) { } /** - * @brief Configures and activates the SPI peripheral. + * @brief Configures and activates the SPI peripheral. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_start(SPIDriver *spip) { @@ -116,9 +120,11 @@ void spi_lld_start(SPIDriver *spip) { } /** - * @brief Deactivates the SPI peripheral. + * @brief Deactivates the SPI peripheral. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_stop(SPIDriver *spip) { @@ -131,9 +137,11 @@ void spi_lld_stop(SPIDriver *spip) { } /** - * @brief Asserts the slave select signal and prepares for transfers. + * @brief Asserts the slave select signal and prepares for transfers. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_select(SPIDriver *spip) { @@ -141,10 +149,12 @@ void spi_lld_select(SPIDriver *spip) { } /** - * @brief Deasserts the slave select signal. + * @brief Deasserts the slave select signal. * @details The previously selected peripheral is unselected. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_unselect(SPIDriver *spip) { @@ -152,13 +162,15 @@ void spi_lld_unselect(SPIDriver *spip) { } /** - * @brief Ignores data on the SPI bus. + * @brief Ignores data on the SPI bus. * @details This function transmits a series of idle words on the SPI bus and * ignores the received data. This function can be invoked even * when a slave select signal has not been yet asserted. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to be ignored + * + * @notapi */ void spi_lld_ignore(SPIDriver *spip, size_t n) { @@ -167,16 +179,16 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { } /** - * @brief Exchanges data on the SPI bus. + * @brief Exchanges data on the SPI bus. * @details This function performs a simultaneous transmit/receive operation. + * @note The buffers are organized as uint8_t arrays. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to be exchanged * @param[in] txbuf the pointer to the transmit buffer * @param[out] rxbuf the pointer to the receive buffer * - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. + * @notapi */ void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { @@ -186,14 +198,14 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, } /** - * @brief Sends data ever the SPI bus. + * @brief Sends data ever the SPI bus. + * @note The buffers are organized as uint8_t arrays. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to send * @param[in] txbuf the pointer to the transmit buffer * - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. + * @notapi */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { @@ -202,14 +214,14 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { } /** - * @brief Receives data from the SPI bus. + * @brief Receives data from the SPI bus. + * @note The buffers are organized as uint8_t arrays. * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to receive * @param[out] rxbuf the pointer to the receive buffer * - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. + * @notapi */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { diff --git a/os/hal/platforms/LPC214x/spi_lld.h b/os/hal/platforms/LPC214x/spi_lld.h index cf6a06df4..d3d271cf0 100644 --- a/os/hal/platforms/LPC214x/spi_lld.h +++ b/os/hal/platforms/LPC214x/spi_lld.h @@ -18,8 +18,9 @@ */ /** - * @file LPC214x/spi_lld.h - * @brief LPC214x low level SPI driver header. + * @file LPC214x/spi_lld.h + * @brief LPC214x low level SPI driver header. + * * @addtogroup LPC214x_SPI * @{ */ @@ -38,9 +39,9 @@ /*===========================================================================*/ /** - * @brief SPI1 (SSP) driver enable switch. + * @brief SPI1 (SSP) driver enable switch. * @details If set to @p TRUE the support for SPI0 is included. - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(USE_LPC214x_SPI1) || defined(__DOXYGEN__) #define USE_LPC214x_SPI1 TRUE @@ -55,7 +56,7 @@ /*===========================================================================*/ /** - * @brief Driver configuration structure. + * @brief Driver configuration structure. */ typedef struct { /** @@ -81,7 +82,7 @@ typedef struct { } SPIConfig; /** - * @brief Structure representing a SPI driver. + * @brief Structure representing a SPI driver. */ typedef struct { /** diff --git a/os/hal/platforms/LPC214x/vic.c b/os/hal/platforms/LPC214x/vic.c index c4e11231f..97dbf4851 100644 --- a/os/hal/platforms/LPC214x/vic.c +++ b/os/hal/platforms/LPC214x/vic.c @@ -30,6 +30,8 @@ /** * @brief VIC Initialization. * @note Better reset everything in the VIC, it is a HUGE source of trouble. + * + * @notapi */ void vic_init(void) { int i; @@ -52,6 +54,8 @@ void vic_init(void) { * @param[in] handler the pointer to the IRQ service routine * @param[in] vector the vector number * @param[in] source the IRQ source to be associated to the vector + * + * @api */ void SetVICVector(void *handler, int vector, int source) { diff --git a/os/hal/platforms/MSP430/hal_lld.c b/os/hal/platforms/MSP430/hal_lld.c index 490c0f505..6cbc0c2f1 100644 --- a/os/hal/platforms/MSP430/hal_lld.c +++ b/os/hal/platforms/MSP430/hal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file MSP430/hal_lld.c - * @brief MSP430 HAL subsystem low level driver source. + * @file MSP430/hal_lld.c + * @brief MSP430 HAL subsystem low level driver source. + * * @addtogroup MSP430_HAL * @{ */ @@ -32,7 +33,7 @@ /*===========================================================================*/ /** - * @brief PAL setup. + * @brief PAL setup. * @details Digital I/O ports static configuration as defined in @p board.h. */ const PALConfig pal_default_config = @@ -74,7 +75,9 @@ const PALConfig pal_default_config = /*===========================================================================*/ /** - * @brief Low level HAL driver initialization. + * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { diff --git a/os/hal/platforms/MSP430/hal_lld.h b/os/hal/platforms/MSP430/hal_lld.h index 9d730744c..681392645 100644 --- a/os/hal/platforms/MSP430/hal_lld.h +++ b/os/hal/platforms/MSP430/hal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file MSP430/hal_lld.h - * @brief MSP430 HAL subsystem low level driver header. + * @file MSP430/hal_lld.h + * @brief MSP430 HAL subsystem low level driver header. + * * @addtogroup MSP430_HAL * @{ */ @@ -46,11 +47,11 @@ /*===========================================================================*/ /** - * @brief Clock source. + * @brief Clock source. * @details The clock source can be selected from: - * - @p MSP430_CLOCK_SOURCE_XT2CLK. - * - @p MSP430_CLOCK_SOURCE_DCOCLK. - * . + * - @p MSP430_CLOCK_SOURCE_XT2CLK. + * - @p MSP430_CLOCK_SOURCE_DCOCLK. + * . */ #if !defined(MSP430_USE_CLOCK) || defined(__DOXYGEN__) #define MSP430_USE_CLOCK MSP430_CLOCK_SOURCE_XT2CLK diff --git a/os/hal/platforms/MSP430/pal_lld.c b/os/hal/platforms/MSP430/pal_lld.c index 9a8cf5605..419b1ca82 100644 --- a/os/hal/platforms/MSP430/pal_lld.c +++ b/os/hal/platforms/MSP430/pal_lld.c @@ -18,8 +18,9 @@ */ /** - * @file MSP430/pal_lld.c - * @brief MSP430 Digital I/O low level driver code. + * @file MSP430/pal_lld.c + * @brief MSP430 Digital I/O low level driver code. + * * @addtogroup MSP430_PAL * @{ */ @@ -50,12 +51,13 @@ /*===========================================================================*/ /** - * @brief MSP430 I/O ports configuration. + * @brief MSP430 I/O ports configuration. + * @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT + * and @p PxDIR are configured as specified. * * @param[in] config the MSP430 ports configuration * - * @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT - * and @p PxDIR are configured as specified. + * @notapi */ void _pal_lld_init(const PALConfig *config) { @@ -101,21 +103,20 @@ void _pal_lld_init(const PALConfig *config) { } /** - * @brief Pads mode setup. + * @brief Pads mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by + * the MSP430x1xx Family User's Guide. Unconnected pads are set to + * high logic state by default. + * @note This function does not alter the @p PxSEL registers. Alternate + * functions setup must be handled by device-specific code. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by - * the MSP430x1xx Family User's Guide. Unconnected pads are set to - * high logic state by default. - * @note This function does not alter the @p PxSEL registers. Alternate - * functions setup must be handled by device-specific code. + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/MSP430/pal_lld.h b/os/hal/platforms/MSP430/pal_lld.h index b1a12c924..e9b67bf18 100644 --- a/os/hal/platforms/MSP430/pal_lld.h +++ b/os/hal/platforms/MSP430/pal_lld.h @@ -18,8 +18,9 @@ */ /** - * @file MSP430/pal_lld.h - * @brief MSP430 Digital I/O low level driver header. + * @file MSP430/pal_lld.h + * @brief MSP430 Digital I/O low level driver header. + * * @addtogroup MSP430_PAL * @{ */ @@ -43,7 +44,7 @@ /*===========================================================================*/ /** - * @brief Simplified MSP430 I/O port representation. + * @brief Simplified MSP430 I/O port representation. * @details This structure represents the common part of all the MSP430 I/O * ports. */ @@ -54,7 +55,7 @@ struct msp430_port_common { }; /** - * @brief Generic MSP430 I/O port. + * @brief Generic MSP430 I/O port. */ typedef union { struct msp430_port_common iop_common; @@ -63,7 +64,7 @@ typedef union { } msp430_ioport_t; /** - * @brief Setup registers common to all the MSP430 ports. + * @brief Setup registers common to all the MSP430 ports. */ typedef struct { ioregister_t out; @@ -71,7 +72,7 @@ typedef struct { } msp430_dio_setup_t; /** - * @brief MSP430 I/O ports static initializer. + * @brief MSP430 I/O ports static initializer. * @details An instance of this structure must be passed to @p palInit() at * system startup time in order to initialize the digital I/O * subsystem. This represents only the initial setup, specific pads @@ -117,23 +118,23 @@ typedef struct { } PALConfig; /** - * @brief Width, in bits, of an I/O port. + * @brief Width, in bits, of an I/O port. */ #define PAL_IOPORTS_WIDTH 8 /** - * @brief Whole port mask. - * @brief This macro specifies all the valid bits into a port. + * @brief Whole port mask. + * @details This macro specifies all the valid bits into a port. */ #define PAL_WHOLE_PORT ((ioportmask_t)0xFF) /** - * @brief Digital I/O port sized unsigned type. + * @brief Digital I/O port sized unsigned type. */ typedef uint8_t ioportmask_t; /** - * @brief Port Identifier. + * @brief Port Identifier. * @details This type can be a scalar or some kind of pointer, do not make * any assumption about it, use the provided macros when populating * variables of this type. @@ -145,7 +146,7 @@ typedef union msp430_ioport_t *ioportid_t; /*===========================================================================*/ /** - * @brief I/O port A identifier. + * @brief I/O port A identifier. * @details This port identifier is mapped on the MSP430 port 1 (P1). */ #if defined(__MSP430_HAS_PORT1__) || \ @@ -155,7 +156,7 @@ typedef union msp430_ioport_t *ioportid_t; #endif /** - * @brief I/O port B identifier. + * @brief I/O port B identifier. * @details This port identifier is mapped on the MSP430 port 2 (P2). */ #if defined(__MSP430_HAS_PORT2__) || \ @@ -165,7 +166,7 @@ typedef union msp430_ioport_t *ioportid_t; #endif /** - * @brief I/O port C identifier. + * @brief I/O port C identifier. * @details This port identifier is mapped on the MSP430 port 3 (P3). */ #if defined(__MSP430_HAS_PORT3__) || \ @@ -175,7 +176,7 @@ typedef union msp430_ioport_t *ioportid_t; #endif /** - * @brief I/O port D identifier. + * @brief I/O port D identifier. * @details This port identifier is mapped on the MSP430 port 4 (P4). */ #if defined(__MSP430_HAS_PORT4__) || \ @@ -185,7 +186,7 @@ typedef union msp430_ioport_t *ioportid_t; #endif /** - * @brief I/O port E identifier. + * @brief I/O port E identifier. * @details This port identifier is mapped on the MSP430 port 5 (P5). */ #if defined(__MSP430_HAS_PORT5__) || \ @@ -195,7 +196,7 @@ typedef union msp430_ioport_t *ioportid_t; #endif /** - * @brief I/O port F identifier. + * @brief I/O port F identifier. * @details This port identifier is mapped on the MSP430 port 6 (P6). */ #if defined(__MSP430_HAS_PORT6__) || \ @@ -210,69 +211,67 @@ typedef union msp430_ioport_t *ioportid_t; /*===========================================================================*/ /** - * @brief Low level PAL subsystem initialization. + * @brief Low level PAL subsystem initialization. * @details In MSP430 programs all the ports as input. * * @param[in] config the MSP430 ports configuration + * + * @notapi */ #define pal_lld_init(config) _pal_lld_init(config) /** - * @brief Reads the physical I/O port states. + * @brief Reads the physical I/O port states. * @details This function is implemented by reading the PxIN register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @return The port bits. + * @param[in] port the port identifier + * @return The port bits. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_readport(port) ((port)->iop_common.in.reg_p) /** - * @brief Reads the output latch. + * @brief Reads the output latch. * @details This function is implemented by reading the PxOUT register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @return The latched logical states. + * @param[in] port the port identifier + * @return The latched logical states. * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_readlatch(port) ((port)->iop_common.out.reg_p) /** - * @brief Writes a bits mask on a I/O port. + * @brief Writes a bits mask on a I/O port. * @details This function is implemented by writing the PxOUT register, the * implementation has no side effects. * - * @param[in] port the port identifier - * @param[in] bits the bits to be written on the specified port + * @param[in] port the port identifier + * @param[in] bits the bits to be written on the specified port * - * @note This function is not meant to be invoked directly by the application - * code. + * @notapi */ #define pal_lld_writeport(port, bits) { \ (port)->iop_common.out.reg_p = (bits); \ } /** - * @brief Pads group mode setup. + * @brief Pads group mode setup. * @details This function programs a pads group belonging to the same port * with the specified mode. + * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by + * the MSP430x1xx Family User's Guide. + * @note This function does not alter the @p PxSEL registers. Alternate + * functions setup must be handled by device-specific code. * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode * - * @note This function is not meant to be invoked directly by the application - * code. - * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by - * the MSP430x1xx Family User's Guide. - * @note This function does not alter the @p PxSEL registers. Alternate - * functions setup must be handled by device-specific code. + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) diff --git a/os/hal/platforms/MSP430/serial_lld.c b/os/hal/platforms/MSP430/serial_lld.c index 4ab12a872..25d3d06cd 100644 --- a/os/hal/platforms/MSP430/serial_lld.c +++ b/os/hal/platforms/MSP430/serial_lld.c @@ -169,6 +169,11 @@ static void usart1_deinit(void) { /*===========================================================================*/ #if USE_MSP430_USART0 || defined(__DOXYGEN__) +/** + * @brief USART0 TX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART0TX_VECTOR) { msg_t b; @@ -185,6 +190,11 @@ CH_IRQ_HANDLER(USART0TX_VECTOR) { CH_IRQ_EPILOGUE(); } +/** + * @brief USART0 RX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART0RX_VECTOR) { uint8_t urctl; @@ -201,6 +211,11 @@ CH_IRQ_HANDLER(USART0RX_VECTOR) { #endif /* USE_MSP430_USART0 */ #if USE_MSP430_USART1 || defined(__DOXYGEN__) +/** + * @brief USART1 TX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART1TX_VECTOR) { msg_t b; @@ -217,6 +232,11 @@ CH_IRQ_HANDLER(USART1TX_VECTOR) { CH_IRQ_EPILOGUE(); } +/** + * @brief USART1 RX interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART1RX_VECTOR) { uint8_t urctl; @@ -238,6 +258,8 @@ CH_IRQ_HANDLER(USART1RX_VECTOR) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -261,6 +283,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -287,6 +311,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/MSP430/serial_lld.h b/os/hal/platforms/MSP430/serial_lld.h index d19c9160d..b81333133 100644 --- a/os/hal/platforms/MSP430/serial_lld.h +++ b/os/hal/platforms/MSP430/serial_lld.h @@ -90,7 +90,7 @@ typedef struct { } SerialConfig; /** - * @brief @p SerialDriver specific data. + * @brief @p SerialDriver specific data. */ #define _serial_driver_data \ _base_asynchronous_channel_data \ diff --git a/os/hal/platforms/SPC56x/hal_lld.c b/os/hal/platforms/SPC56x/hal_lld.c index c5d15dcfa..a855a70a2 100644 --- a/os/hal/platforms/SPC56x/hal_lld.c +++ b/os/hal/platforms/SPC56x/hal_lld.c @@ -50,6 +50,8 @@ /** * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { extern void _vectors(void); @@ -107,6 +109,9 @@ void hal_lld_init(void) { * @brief SPC563 clocks and PLL initialization. * @note All the involved constants come from the file @p board.h and * @p hal_lld.h + * @note This function must be invoked only after the system reset. + * + * @special */ void spc563_clock_init(void) { diff --git a/os/hal/platforms/SPC56x/serial_lld.c b/os/hal/platforms/SPC56x/serial_lld.c index c99146d02..363381750 100644 --- a/os/hal/platforms/SPC56x/serial_lld.c +++ b/os/hal/platforms/SPC56x/serial_lld.c @@ -215,6 +215,8 @@ static void notify2(void) { #if USE_SPC563_ESCIA || defined(__DOXYGEN__) /** * @brief eSCI-A interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(vector146) { @@ -229,6 +231,8 @@ CH_IRQ_HANDLER(vector146) { #if USE_SPC563_ESCIB || defined(__DOXYGEN__) /** * @brief eSCI-B interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(vector149) { @@ -246,6 +250,8 @@ CH_IRQ_HANDLER(vector149) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -271,6 +277,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -283,6 +291,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * @brief Low level serial driver stop. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/STM32/adc_lld.c b/os/hal/platforms/STM32/adc_lld.c index fa748aa84..7c7657a5c 100644 --- a/os/hal/platforms/STM32/adc_lld.c +++ b/os/hal/platforms/STM32/adc_lld.c @@ -54,6 +54,8 @@ ADCDriver ADCD1; #if STM32_ADC_USE_ADC1 || defined(__DOXYGEN__) /** * @brief ADC1 DMA interrupt handler (channel 1). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) { uint32_t isr; @@ -110,6 +112,8 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) { /** * @brief Low level ADC driver initialization. + * + * @notapi */ void adc_lld_init(void) { @@ -151,6 +155,8 @@ void adc_lld_init(void) { * @brief Configures and activates the ADC peripheral. * * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi */ void adc_lld_start(ADCDriver *adcp) { @@ -177,6 +183,8 @@ void adc_lld_start(ADCDriver *adcp) { * @brief Deactivates the ADC peripheral. * * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi */ void adc_lld_stop(ADCDriver *adcp) { @@ -198,6 +206,8 @@ void adc_lld_stop(ADCDriver *adcp) { * @brief Starts an ADC conversion. * * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi */ void adc_lld_start_conversion(ADCDriver *adcp) { uint32_t ccr, n; @@ -234,6 +244,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) { * @brief Stops an ongoing conversion. * * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi */ void adc_lld_stop_conversion(ADCDriver *adcp) { diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c index 7b390bb7e..526ecb98e 100644 --- a/os/hal/platforms/STM32/can_lld.c +++ b/os/hal/platforms/STM32/can_lld.c @@ -51,8 +51,10 @@ CANDriver CAND1; /* Driver interrupt handlers. */ /*===========================================================================*/ -/* - * CAN1 TX interrupt handler. +/** + * @brief CAN1 TX interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(CAN1_TX_IRQHandler) { @@ -70,7 +72,9 @@ CH_IRQ_HANDLER(CAN1_TX_IRQHandler) { } /* - * CAN1 RX0 interrupt handler. + * @brief CAN1 RX0 interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) { uint32_t rf0r; @@ -99,8 +103,10 @@ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) { CH_IRQ_EPILOGUE(); } -/* - * CAN1 RX1 interrupt handler. +/** + * @brief CAN1 RX1 interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) { @@ -111,8 +117,10 @@ CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) { CH_IRQ_EPILOGUE(); } -/* - * CAN1 SCE interrupt handler. +/** + * @brief CAN1 SCE interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) { uint32_t msr; @@ -151,6 +159,8 @@ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) { /** * @brief Low level CAN driver initialization. + * + * @notapi */ void can_lld_init(void) { @@ -169,6 +179,8 @@ void can_lld_init(void) { * @brief Configures and activates the CAN peripheral. * * @param[in] canp pointer to the @p CANDriver object + * + * @notapi */ void can_lld_start(CANDriver *canp) { @@ -253,6 +265,8 @@ void can_lld_start(CANDriver *canp) { * @brief Deactivates the CAN peripheral. * * @param[in] canp pointer to the @p CANDriver object + * + * @notapi */ void can_lld_stop(CANDriver *canp) { @@ -280,6 +294,8 @@ void can_lld_stop(CANDriver *canp) { * @return The queue space availability. * @retval FALSE no space in the transmit queue. * @retval TRUE transmit slot available. + * + * @notapi */ bool_t can_lld_can_transmit(CANDriver *canp) { @@ -291,6 +307,8 @@ bool_t can_lld_can_transmit(CANDriver *canp) { * * @param[in] canp pointer to the @p CANDriver object * @param[in] ctfp pointer to the CAN frame to be transmitted + * + * @notapi */ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) { uint32_t tir; @@ -319,6 +337,8 @@ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) { * @return The queue space availability. * @retval FALSE no space in the transmit queue. * @retval TRUE transmit slot available. + * + * @notapi */ bool_t can_lld_can_receive(CANDriver *canp) { @@ -330,6 +350,8 @@ bool_t can_lld_can_receive(CANDriver *canp) { * * @param[in] canp pointer to the @p CANDriver object * @param[out] crfp pointer to the buffer where the CAN frame is copied + * + * @notapi */ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) { uint32_t r; @@ -363,6 +385,8 @@ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) { * @brief Enters the sleep mode. * * @param[in] canp pointer to the @p CANDriver object + * + * @notapi */ void can_lld_sleep(CANDriver *canp) { @@ -373,6 +397,8 @@ void can_lld_sleep(CANDriver *canp) { * @brief Enforces leaving the sleep mode. * * @param[in] canp pointer to the @p CANDriver object + * + * @notapi */ void can_lld_wakeup(CANDriver *canp) { diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index c8d7b1335..1b8fc8009 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -39,7 +39,7 @@ /*===========================================================================*/ /** - * @brief PAL setup. + * @brief PAL setup. * @details Digital I/O ports static configuration as defined in @p board.h. */ const PALConfig pal_default_config = @@ -70,7 +70,9 @@ const PALConfig pal_default_config = /*===========================================================================*/ /** - * @brief Low level HAL driver initialization. + * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { @@ -87,8 +89,11 @@ void hal_lld_init(void) { } /** - * @brief STM32 clocks and PLL initialization. - * @note All the involved constants come from the file @p board.h. + * @brief STM32 clocks and PLL initialization. + * @note All the involved constants come from the file @p board.h. + * @note This function must be invoked only after the system reset. + * + * @special */ #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || \ defined(STM32F10X_HD) || defined(__DOXYGEN__) diff --git a/os/hal/platforms/STM32/pal_lld.c b/os/hal/platforms/STM32/pal_lld.c index 4ddb13359..f16b3abd0 100644 --- a/os/hal/platforms/STM32/pal_lld.c +++ b/os/hal/platforms/STM32/pal_lld.c @@ -81,6 +81,8 @@ * @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled. * * @param[in] config the STM32 ports configuration + * + * @notapi */ void _pal_lld_init(const PALConfig *config) { @@ -136,6 +138,8 @@ void _pal_lld_init(const PALConfig *config) { * @param[in] port the port identifier * @param[in] mask the group mask * @param[in] mode the mode + * + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/STM32/pal_lld.h b/os/hal/platforms/STM32/pal_lld.h index a299bce70..82afc2b2f 100644 --- a/os/hal/platforms/STM32/pal_lld.h +++ b/os/hal/platforms/STM32/pal_lld.h @@ -95,7 +95,7 @@ typedef struct { /** * @brief Whole port mask. - * @brief This macro specifies all the valid bits into a port. + * @details This macro specifies all the valid bits into a port. */ #define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF) @@ -164,6 +164,8 @@ typedef GPIO_TypeDef * ioportid_t; /** * @brief GPIO ports subsystem initialization. + * + * @notapi */ #define pal_lld_init(config) _pal_lld_init(config) @@ -176,6 +178,8 @@ typedef GPIO_TypeDef * ioportid_t; * * @param[in] port the port identifier * @return The port bits. + * + * @notapi */ #define pal_lld_readport(port) ((port)->IDR) @@ -188,6 +192,8 @@ typedef GPIO_TypeDef * ioportid_t; * * @param[in] port the port identifier * @return The latched logical states. + * + * @notapi */ #define pal_lld_readlatch(port) ((port)->ODR) @@ -203,6 +209,8 @@ typedef GPIO_TypeDef * ioportid_t; * * @param[in] port the port identifier * @param[in] bits the bits to be written on the specified port + * + * @notapi */ #define pal_lld_writeport(port, bits) ((port)->ODR = (bits)) @@ -218,6 +226,8 @@ typedef GPIO_TypeDef * ioportid_t; * * @param[in] port the port identifier * @param[in] bits the bits to be ORed on the specified port + * + * @notapi */ #define pal_lld_setport(port, bits) ((port)->BSRR = (bits)) @@ -233,6 +243,8 @@ typedef GPIO_TypeDef * ioportid_t; * * @param[in] port the port identifier * @param[in] bits the bits to be cleared on the specified port + * + * @notapi */ #define pal_lld_clearport(port, bits) ((port)->BRR = (bits)) @@ -251,6 +263,8 @@ typedef GPIO_TypeDef * ioportid_t; * @param[in] offset the group bit offset within the port * @param[in] bits the bits to be written. Values exceeding the group * width are masked. + * + * @notapi */ #define pal_lld_writegroup(port, mask, offset, bits) { \ (port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \ @@ -270,6 +284,8 @@ typedef GPIO_TypeDef * ioportid_t; * @param[in] port the port identifier * @param[in] mask the group mask * @param[in] mode the mode + * + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) @@ -286,6 +302,8 @@ typedef GPIO_TypeDef * ioportid_t; * @param[in] pad the pad number within the port * @param[in] bit logical value, the value must be @p PAL_LOW or * @p PAL_HIGH + * + * @notapi */ #define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit) diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c index 851cf07c2..eeb1282bd 100644 --- a/os/hal/platforms/STM32/pwm_lld.c +++ b/os/hal/platforms/STM32/pwm_lld.c @@ -62,7 +62,7 @@ PWMDriver PWMD3; * @brief PWM4 driver identifier. * @note The driver PWM4 allocates the timer TIM4 when enabled. */ -#if defined(USE_STM32_PWM4) || defined(__DOXYGEN__) +#if defined(STM32_PWM_USE_TIM4) || defined(__DOXYGEN__) PWMDriver PWMD4; #endif @@ -91,7 +91,8 @@ static void stop_channels(PWMDriver *pwmp) { pwmp->pd_tim->CCMR2 = 0; /* Channels 3 and 4 frozen. */ } -#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || USE_STM32_PWM4 || defined(__DOXYGEN__) +#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 || \ + defined(__DOXYGEN__) /** * @brief Common TIM2...TIM4 IRQ handler. * @note It is assumed that the various sources are only activated if the @@ -115,7 +116,7 @@ static void serve_interrupt(PWMDriver *pwmp) { if ((sr & TIM_SR_UIF) != 0) pwmp->pd_config->pc_callback(); } -#endif /* STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || USE_STM32_PWM4 */ +#endif /* STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 */ /*===========================================================================*/ /* Driver interrupt handlers. */ @@ -127,6 +128,8 @@ static void serve_interrupt(PWMDriver *pwmp) { * @note It is assumed that this interrupt is only activated if the callback * pointer is not equal to @p NULL in order to not perform an extra * check in a potentially critical interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) { @@ -143,6 +146,8 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) { * @note It is assumed that the various sources are only activated if the * associated callback pointer is not equal to @p NULL in order to not * perform an extra check in a potentially critical interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) { uint16_t sr; @@ -166,7 +171,9 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) { #if STM32_PWM_USE_TIM2 /** - * @brief TIM2 interrupt handler. + * @brief TIM2 interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(TIM2_IRQHandler) { @@ -180,7 +187,9 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) { #if STM32_PWM_USE_TIM3 /** - * @brief TIM3 interrupt handler. + * @brief TIM3 interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(TIM3_IRQHandler) { @@ -192,9 +201,11 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) { } #endif /* STM32_PWM_USE_TIM3 */ -#if USE_STM32_PWM4 +#if STM32_PWM_USE_TIM4 /** - * @brief TIM4 interrupt handler. + * @brief TIM4 interrupt handler. + * + * @isr */ CH_IRQ_HANDLER(TIM4_IRQHandler) { @@ -204,7 +215,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) { CH_IRQ_EPILOGUE(); } -#endif /* USE_STM32_PWM4 */ +#endif /* STM32_PWM_USE_TIM4 */ /*===========================================================================*/ /* Driver exported functions. */ @@ -212,6 +223,8 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) { /** * @brief Low level PWM driver initialization. + * + * @notapi */ void pwm_lld_init(void) { @@ -248,7 +261,7 @@ void pwm_lld_init(void) { PWMD3.pd_tim = TIM3; #endif -#if USE_STM32_PWM4 +#if STM32_PWM_USE_TIM4 /* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/ RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST; RCC->APB1RSTR = 0; @@ -264,6 +277,8 @@ void pwm_lld_init(void) { * @brief Configures and activates the PWM peripheral. * * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi */ void pwm_lld_start(PWMDriver *pwmp) { uint16_t ccer; @@ -293,7 +308,7 @@ void pwm_lld_start(PWMDriver *pwmp) { RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; } #endif -#if USE_STM32_PWM4 +#if STM32_PWM_USE_TIM4 if (&PWMD4 == pwmp) { NVICEnableVector(TIM4_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_PWM4_IRQ_PRIORITY)); @@ -358,6 +373,8 @@ void pwm_lld_start(PWMDriver *pwmp) { * @brief Deactivates the PWM peripheral. * * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi */ void pwm_lld_stop(PWMDriver *pwmp) { /* If in ready state then disables the PWM clock.*/ @@ -401,6 +418,8 @@ void pwm_lld_stop(PWMDriver *pwmp) { * @param[in] pwmp pointer to a @p PWMDriver object * @param[in] channel PWM channel identifier * @param[in] width PWM pulse width as clock pulses number + * + * @notapi */ void pwm_lld_enable_channel(PWMDriver *pwmp, pwmchannel_t channel, @@ -476,6 +495,8 @@ void pwm_lld_enable_channel(PWMDriver *pwmp, * * @param[in] pwmp pointer to a @p PWMDriver object * @param[in] channel PWM channel identifier + * + * @notapi */ void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c index f6df553e6..ebae98f97 100644 --- a/os/hal/platforms/STM32/serial_lld.c +++ b/os/hal/platforms/STM32/serial_lld.c @@ -222,6 +222,11 @@ static void notify5(void) { /*===========================================================================*/ #if STM32_SERIAL_USE_USART1 || defined(__DOXYGEN__) +/** + * @brief USART1 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART1_IRQHandler) { CH_IRQ_PROLOGUE(); @@ -233,6 +238,11 @@ CH_IRQ_HANDLER(USART1_IRQHandler) { #endif #if STM32_SERIAL_USE_USART2 || defined(__DOXYGEN__) +/** + * @brief USART2 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART2_IRQHandler) { CH_IRQ_PROLOGUE(); @@ -244,6 +254,11 @@ CH_IRQ_HANDLER(USART2_IRQHandler) { #endif #if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__) +/** + * @brief USART3 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(USART3_IRQHandler) { CH_IRQ_PROLOGUE(); @@ -255,6 +270,11 @@ CH_IRQ_HANDLER(USART3_IRQHandler) { #endif #if STM32_SERIAL_USE_UART4 || defined(__DOXYGEN__) +/** + * @brief UART4 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(UART4_IRQHandler) { CH_IRQ_PROLOGUE(); @@ -266,6 +286,11 @@ CH_IRQ_HANDLER(UART4_IRQHandler) { #endif #if STM32_SERIAL_USE_UART5 || defined(__DOXYGEN__) +/** + * @brief UART5 interrupt handler. + * + * @isr + */ CH_IRQ_HANDLER(UART5_IRQHandler) { CH_IRQ_PROLOGUE(); @@ -282,6 +307,8 @@ CH_IRQ_HANDLER(UART5_IRQHandler) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -318,6 +345,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -370,6 +399,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c index 5f8d9526a..c12b410c8 100644 --- a/os/hal/platforms/STM32/spi_lld.c +++ b/os/hal/platforms/STM32/spi_lld.c @@ -90,6 +90,8 @@ static void spi_start_wait(SPIDriver *spip) { #if STM32_SPI_USE_SPI1 || defined(__DOXYGEN__) /** * @brief SPI1 RX DMA interrupt handler (channel 2). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) { @@ -106,6 +108,8 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) { /** * @brief SPI1 TX DMA interrupt handler (channel 3). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) { @@ -121,6 +125,8 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) { #if STM32_SPI_USE_SPI2 || defined(__DOXYGEN__) /** * @brief SPI2 RX DMA interrupt handler (channel 4). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) { @@ -137,6 +143,8 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) { /** * @brief SPI2 TX DMA interrupt handler (channel 5). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { @@ -152,6 +160,8 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { #if STM32_SPI_USE_SPI3 || defined(__DOXYGEN__) /** * @brief SPI3 RX DMA interrupt handler (DMA2, channel 1). + * + * @isr */ CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) { @@ -168,6 +178,8 @@ CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) { /** * @brief SPI3 TX DMA2 interrupt handler (DMA2, channel 2). + * + * @isr */ CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) { @@ -186,6 +198,8 @@ CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) { /** * @brief Low level SPI driver initialization. + * + * @notapi */ void spi_lld_init(void) { @@ -224,6 +238,8 @@ void spi_lld_init(void) { * @brief Configures and activates the SPI peripheral. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_start(SPIDriver *spip) { @@ -284,6 +300,8 @@ void spi_lld_start(SPIDriver *spip) { * @brief Deactivates the SPI peripheral. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_stop(SPIDriver *spip) { @@ -324,6 +342,8 @@ void spi_lld_stop(SPIDriver *spip) { * @brief Asserts the slave select signal and prepares for transfers. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_select(SPIDriver *spip) { @@ -335,6 +355,8 @@ void spi_lld_select(SPIDriver *spip) { * @details The previously selected peripheral is unselected. * * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi */ void spi_lld_unselect(SPIDriver *spip) { @@ -349,6 +371,8 @@ void spi_lld_unselect(SPIDriver *spip) { * * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to be ignored + * + * @notapi */ void spi_lld_ignore(SPIDriver *spip, size_t n) { uint16_t dummyrx; @@ -371,6 +395,8 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) { * @param[in] n number of words to be exchanged * @param[in] txbuf the pointer to the transmit buffer * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi */ void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) { @@ -390,6 +416,8 @@ void spi_lld_exchange(SPIDriver *spip, size_t n, * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to send * @param[in] txbuf the pointer to the transmit buffer + * + * @notapi */ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { uint16_t dummyrx; @@ -409,6 +437,8 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { * @param[in] spip pointer to the @p SPIDriver object * @param[in] n number of words to receive * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi */ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { uint16_t dummytx = 0xFFFF; diff --git a/os/hal/platforms/STM32/stm32_dma.c b/os/hal/platforms/STM32/stm32_dma.c index 5a24f45b2..995e33a12 100644 --- a/os/hal/platforms/STM32/stm32_dma.c +++ b/os/hal/platforms/STM32/stm32_dma.c @@ -54,6 +54,8 @@ static cnt_t dmacnt2; /** * @brief STM32 DMA helper initialization. + * + * @init */ void dmaInit(void) { int i; @@ -74,6 +76,8 @@ void dmaInit(void) { * @brief Enables the specified DMA controller clock. * * @param[in] dma the DMA controller id + * + * @api */ void dmaEnable(uint32_t dma) { @@ -99,6 +103,8 @@ void dmaEnable(uint32_t dma) { * @brief Disables the specified DMA controller clock. * * @param[in] dma the DMA controller id + * + * @api */ void dmaDisable(uint32_t dma) { diff --git a/os/hal/platforms/STM32/stm32_dma.h b/os/hal/platforms/STM32/stm32_dma.h index 226ec9b7f..20873116e 100644 --- a/os/hal/platforms/STM32/stm32_dma.h +++ b/os/hal/platforms/STM32/stm32_dma.h @@ -130,6 +130,8 @@ typedef struct { * * @param[in] dmachp dmachp to a stm32_dma_channel_t structure * @param[in] cpar value to be written in the CPAR register + * + * @api */ #define dmaChannelSetPeripheral(dmachp, cpar) { \ (dmachp)->CPAR = (uint32_t)(cpar); \ @@ -145,6 +147,8 @@ typedef struct { * @param[in] cndtr value to be written in the CNDTR register * @param[in] cmar value to be written in the CMAR register * @param[in] ccr value to be written in the CCR register + * + * @api */ #define dmaChannelSetup(dmachp, cndtr, cmar, ccr) { \ (dmachp)->CNDTR = (uint32_t)(cndtr); \ @@ -156,6 +160,8 @@ typedef struct { * @brief DMA channel enable by channel pointer. * * @param[in] dmachp dmachp to a stm32_dma_channel_t structure + * + * @api */ #define dmaChannelEnable(dmachp) { \ (dmachp)->CCR |= DMA_CCR1_EN; \ @@ -166,6 +172,8 @@ typedef struct { * @brief DMA channel disable by channel pointer. * * @param[in] dmachp dmachp to a stm32_dma_channel_t structure + * + * @api */ #define dmaChannelDisable(dmachp) { \ (dmachp)->CCR = 0; \ @@ -184,6 +192,8 @@ typedef struct { * @param[in] cndtr value to be written in the CNDTR register * @param[in] cmar value to be written in the CMAR register * @param[in] ccr value to be written in the CCR register + * + * @api */ #define dmaSetupChannel(dmap, ch, cndtr, cmar, ccr) { \ dmaChannelSetup(&(dmap)->channels[ch], (cndtr), (cmar), (ccr)); \ @@ -196,6 +206,8 @@ typedef struct { * * @param[in] dmap pointer to a stm32_dma_t structure * @param[in] ch channel number + * + * @api */ #define dmaEnableChannel(dmap, ch) { \ dmaChannelEnable(&(dmap)->channels[ch]); \ @@ -208,6 +220,8 @@ typedef struct { * * @param[in] dmap pointer to a stm32_dma_t structure * @param[in] ch channel number + * + * @api */ #define dmaDisableChannel(dmap, ch) { \ dmaChannelDisable(&(dmap)->channels[ch]); \ @@ -222,6 +236,8 @@ typedef struct { * * @param[in] dmap pointer to a stm32_dma_t structure * @param[in] ch channel number + * + * @api */ #define dmaClearChannel(dmap, ch){ \ (dmap)->IFCR = 1 << ((ch) * 4); \ diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c index 99373a401..0d9c533f1 100644 --- a/os/hal/platforms/STM32/uart_lld.c +++ b/os/hal/platforms/STM32/uart_lld.c @@ -225,6 +225,8 @@ static void serve_usart_irq(UARTDriver *uartp) { #if STM32_UART_USE_USART1 || defined(__DOXYGEN__) /** * @brief USART1 RX DMA interrupt handler (channel 5). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { UARTDriver *uartp; @@ -256,6 +258,8 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { /** * @brief USART1 TX DMA interrupt handler (channel 4). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) { @@ -273,6 +277,8 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) { /** * @brief USART1 IRQ handler. + * + * @isr */ CH_IRQ_HANDLER(USART1_IRQHandler) { @@ -287,6 +293,8 @@ CH_IRQ_HANDLER(USART1_IRQHandler) { #if STM32_UART_USE_USART2 || defined(__DOXYGEN__) /** * @brief USART2 RX DMA interrupt handler (channel 6). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) { UARTDriver *uartp; @@ -318,6 +326,8 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) { /** * @brief USART2 TX DMA interrupt handler (channel 7). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) { @@ -335,6 +345,8 @@ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) { /** * @brief USART2 IRQ handler. + * + * @isr */ CH_IRQ_HANDLER(USART2_IRQHandler) { @@ -349,6 +361,8 @@ CH_IRQ_HANDLER(USART2_IRQHandler) { #if STM32_UART_USE_USART3 || defined(__DOXYGEN__) /** * @brief USART3 RX DMA interrupt handler (channel 3). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) { UARTDriver *uartp; @@ -380,6 +394,8 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) { /** * @brief USART3 TX DMA interrupt handler (channel 2). + * + * @isr */ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) { @@ -397,6 +413,8 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) { /** * @brief USART3 IRQ handler. + * + * @isr */ CH_IRQ_HANDLER(USART3_IRQHandler) { @@ -414,6 +432,8 @@ CH_IRQ_HANDLER(USART3_IRQHandler) { /** * @brief Low level UART driver initialization. + * + * @notapi */ void uart_lld_init(void) { @@ -455,6 +475,8 @@ void uart_lld_init(void) { * @brief Configures and activates the UART peripheral. * * @param[in] uartp pointer to the @p UARTDriver object + * + * @notapi */ void uart_lld_start(UARTDriver *uartp) { @@ -519,6 +541,8 @@ void uart_lld_start(UARTDriver *uartp) { * @brief Deactivates the UART peripheral. * * @param[in] uartp pointer to the @p UARTDriver object + * + * @notapi */ void uart_lld_stop(UARTDriver *uartp) { @@ -568,6 +592,8 @@ void uart_lld_stop(UARTDriver *uartp) { * @param[in] uartp pointer to the @p UARTDriver object * @param[in] n number of data frames to send * @param[in] txbuf the pointer to the transmit buffer + * + * @notapi */ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) { @@ -586,6 +612,8 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) { * * @return The number of data frames not transmitted by the * stopped transmit operation. + * + * @notapi */ size_t uart_lld_stop_send(UARTDriver *uartp) { @@ -602,6 +630,8 @@ size_t uart_lld_stop_send(UARTDriver *uartp) { * @param[in] uartp pointer to the @p UARTDriver object * @param[in] n number of data frames to send * @param[in] rxbuf the pointer to the receive buffer + * + * @notapi */ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) { @@ -624,6 +654,8 @@ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) { * * @return The number of data frames not received by the * stopped receive operation. + * + * @notapi */ size_t uart_lld_stop_receive(UARTDriver *uartp) { size_t n; diff --git a/os/hal/platforms/STM8/hal_lld.c b/os/hal/platforms/STM8/hal_lld.c index 77458da41..b67513f5b 100644 --- a/os/hal/platforms/STM8/hal_lld.c +++ b/os/hal/platforms/STM8/hal_lld.c @@ -73,6 +73,8 @@ ROMCONST PALConfig pal_default_config = /** * @brief Low level HAL driver initialization. + * + * @notapi */ void hal_lld_init(void) { diff --git a/os/hal/platforms/STM8/pal_lld.c b/os/hal/platforms/STM8/pal_lld.c index 5ec3b2fcc..14b5fe8c7 100644 --- a/os/hal/platforms/STM8/pal_lld.c +++ b/os/hal/platforms/STM8/pal_lld.c @@ -61,6 +61,8 @@ * @param[in] port the port identifier * @param[in] mask the group mask * @param[in] mode the mode + * + * @notapi */ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, diff --git a/os/hal/platforms/STM8/pal_lld.h b/os/hal/platforms/STM8/pal_lld.h index 7f2fb2cd9..ae992594f 100644 --- a/os/hal/platforms/STM8/pal_lld.h +++ b/os/hal/platforms/STM8/pal_lld.h @@ -156,6 +156,8 @@ typedef GPIO_TypeDef *ioportid_t; * @brief Low level PAL subsystem initialization. * * @param[in] config architecture-dependent ports configuration + * + * @notapi */ #define pal_lld_init(config) *IOPORTS = *(config) @@ -166,6 +168,8 @@ typedef GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @return The port bits. + * + * @notapi */ #define pal_lld_readport(port) ((port)->IDR) @@ -178,6 +182,8 @@ typedef GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @return The latched logical states. + * + * @notapi */ #define pal_lld_readlatch(port) ((port)->ODR) @@ -188,6 +194,8 @@ typedef GPIO_TypeDef *ioportid_t; * * @param[in] port port identifier * @param[in] bits bits to be written on the specified port + * + * @notapi */ #define pal_lld_writeport(port, bits) ((port)->ODR = (bits)) @@ -203,6 +211,8 @@ typedef GPIO_TypeDef *ioportid_t; * @param[in] port port identifier * @param[in] mask group mask * @param[in] mode group mode + * + * @notapi */ #define pal_lld_setgroupmode(port, mask, mode) \ _pal_lld_setgroupmode(port, mask, mode) diff --git a/os/hal/platforms/STM8/serial_lld.c b/os/hal/platforms/STM8/serial_lld.c index a51c1b00e..b60c20130 100644 --- a/os/hal/platforms/STM8/serial_lld.c +++ b/os/hal/platforms/STM8/serial_lld.c @@ -217,6 +217,11 @@ static void uart3_deinit(void) { /*===========================================================================*/ #if USE_STM8_UART1 || defined(__DOXYGEN__) +/** + * @brief IRQ 17 service routine. + * + * @isr + */ CH_IRQ_HANDLER(17) { msg_t b; @@ -233,6 +238,11 @@ CH_IRQ_HANDLER(17) { CH_IRQ_EPILOGUE(); } +/** + * @brief IRQ 18 service routine. + * + * @isr + */ CH_IRQ_HANDLER(18) { uint8_t sr = UART1->SR; @@ -250,6 +260,11 @@ CH_IRQ_HANDLER(18) { #endif /* USE_STM8_UART1 */ #if USE_STM8_UART2 || defined(__DOXYGEN__) +/** + * @brief IRQ 20 service routine. + * + * @isr + */ CH_IRQ_HANDLER(20) { msg_t b; @@ -266,6 +281,11 @@ CH_IRQ_HANDLER(20) { CH_IRQ_EPILOGUE(); } +/** + * @brief IRQ 21 service routine. + * + * @isr + */ CH_IRQ_HANDLER(21) { uint8_t sr = UART2->SR; @@ -283,6 +303,11 @@ CH_IRQ_HANDLER(21) { #endif /* USE_STM8_UART2 */ #if USE_STM8_UART3 || defined(__DOXYGEN__) +/** + * @brief IRQ 20 service routine. + * + * @isr + */ CH_IRQ_HANDLER(20) { msg_t b; @@ -299,6 +324,11 @@ CH_IRQ_HANDLER(20) { CH_IRQ_EPILOGUE(); } +/** + * @brief IRQ 21 service routine. + * + * @isr + */ CH_IRQ_HANDLER(21) { uint8_t sr = UART3->SR; @@ -321,6 +351,8 @@ CH_IRQ_HANDLER(21) { /** * @brief Low level serial driver initialization. + * + * @notapi */ void sd_lld_init(void) { @@ -350,6 +382,8 @@ void sd_lld_init(void) { * @param[in] config the architecture-dependent serial driver configuration. * If this parameter is set to @p NULL then a default * configuration is used. + * + * @notapi */ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { @@ -382,6 +416,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi */ void sd_lld_stop(SerialDriver *sdp) { -- cgit v1.2.3