From 4e3e0d62789355cfc630012dfcab96c78d3fec2e Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Thu, 12 Jan 2012 18:26:26 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3797
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/STM32L1xx/hal_lld.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

(limited to 'os/hal/platforms/STM32L1xx')

diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c
index 4e1b385a3..e4b21ede3 100644
--- a/os/hal/platforms/STM32L1xx/hal_lld.c
+++ b/os/hal/platforms/STM32L1xx/hal_lld.c
@@ -46,8 +46,8 @@
  */
 static void hal_lld_backup_domain_init(void) {
 
-  /* Backup domain access enabled during initialization.*/
-  PWR->CR |= PWR_CR_DBP;
+  /* Backup domain access enabled and left open.*/
+  PWR->CR = PWR_CR_DBP;
 
   /* If enabled then the LSE is started.*/
 #if STM32_LSE_ENABLED
@@ -72,9 +72,6 @@ static void hal_lld_backup_domain_init(void) {
     RCC->CSR |= RCC_CSR_RTCEN;
   }
 #endif /* STM32_RTCSEL != STM32_RTCSEL_NOCLOCK */
-
-  /*  Backup domain access disabled for operations safety.*/
-  PWR->CR &= ~PWR_CR_DBP;
 }
 
 /*===========================================================================*/
-- 
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