From f083a30ce8d6b93c9fa23c94874e4488e79d053f Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Wed, 28 Mar 2012 14:19:40 +0000
Subject: More work on the STM32 OTG driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4059 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32F4xx/platform.mk |  4 +++-
 os/hal/platforms/STM32F4xx/stm32_rcc.h | 31 +++++++++++++++++++++++++++++++
 2 files changed, 34 insertions(+), 1 deletion(-)

(limited to 'os/hal/platforms/STM32F4xx')

diff --git a/os/hal/platforms/STM32F4xx/platform.mk b/os/hal/platforms/STM32F4xx/platform.mk
index 475a5b35c..2decebca4 100644
--- a/os/hal/platforms/STM32F4xx/platform.mk
+++ b/os/hal/platforms/STM32F4xx/platform.mk
@@ -11,10 +11,12 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F4xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \
+              ${CHIBIOS}/os/hal/platforms/STM32/OTGv1/usb_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/RTCv2/rtc_lld.c
 
 # Required include directories
 PLATFORMINC = ${CHIBIOS}/os/hal/platforms/STM32F4xx \
               ${CHIBIOS}/os/hal/platforms/STM32 \
               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2 \
-              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2
\ No newline at end of file
+              ${CHIBIOS}/os/hal/platforms/STM32/OTGv1 \
+              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h
index f459c192a..de8f1a11e 100644
--- a/os/hal/platforms/STM32F4xx/stm32_rcc.h
+++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h
@@ -538,6 +538,37 @@
 #define rccResetI2C3() rccResetAPB1(RCC_APB1RSTR_I2C3RST)
 /** @} */
 
+
+/**
+ * @name    OTG peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief   Enables the OTG_FS peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableOTG_FS(lp) rccEnableAHB2(RCC_AHB2LPENR_OTGFSLPEN, lp)
+
+/**
+ * @brief   Disables the OTG_FS peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableOTG_FS(lp) rccEnableAHB2(RCC_AHB2LPENR_OTGFSLPEN, lp)
+
+/**
+ * @brief   Resets the OTG_FS peripheral.
+ *
+ * @api
+ */
+#define rccResetOTG_FS() rccResetAHB2(RCC_AHB2RSTR_OTGFSRST)
+/** @} */
+
 /**
  * @name    SPI peripherals specific RCC operations
  * @{
-- 
cgit v1.2.3