From 690fd6364bd682ade14f27e86cb3821c84524d78 Mon Sep 17 00:00:00 2001
From: barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Mon, 5 Mar 2012 16:44:56 +0000
Subject: SDC. Code merged to fresh branch.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4021 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32F4xx/hal_lld.h   |  4 ++++
 os/hal/platforms/STM32F4xx/platform.mk |  5 +++--
 os/hal/platforms/STM32F4xx/stm32_rcc.h | 33 +++++++++++++++++++++++++++++++++
 3 files changed, 40 insertions(+), 2 deletions(-)

(limited to 'os/hal/platforms/STM32F4xx')

diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h
index c88ac3a96..a058e848a 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.h
+++ b/os/hal/platforms/STM32F4xx/hal_lld.h
@@ -339,6 +339,9 @@
 
 /* SDIO attributes.*/
 #define STM32_HAS_SDIO          TRUE
+#define STM32_SDC_SDIO_DMA_MSK  (STM32_DMA_STREAM_ID_MSK(2, 3) |            \
+                                 STM32_DMA_STREAM_ID_MSK(2, 6))
+#define STM32_SDC_SDIO_DMA_CHN  0x04004000
 
 /* SPI attributes.*/
 #define STM32_HAS_SPI1          TRUE
@@ -492,6 +495,7 @@
 #define TIM8_CC_IRQHandler      VectorF8    /**< TIM8 Capture Compare.      */
 #define DMA1_Stream7_IRQHandler VectorFC    /**< DMA1 Stream 7.             */
 #define FSMC_IRQHandler         Vector100   /**< FSMC.                      */
+#define SDIO_IRQHandler         Vector104   /**< SDIO.                      */
 #define TIM5_IRQHandler         Vector108   /**< TIM5.                      */
 #define SPI3_IRQHandler         Vector10C   /**< SPI3.                      */
 #define UART4_IRQHandler        Vector110   /**< UART4.                     */
diff --git a/os/hal/platforms/STM32F4xx/platform.mk b/os/hal/platforms/STM32F4xx/platform.mk
index 475a5b35c..fa9caef41 100644
--- a/os/hal/platforms/STM32F4xx/platform.mk
+++ b/os/hal/platforms/STM32F4xx/platform.mk
@@ -11,10 +11,11 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F4xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \
-              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2/rtc_lld.c
+              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2/rtc_lld.c \
+              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2/sdc_lld.c
 
 # Required include directories
 PLATFORMINC = ${CHIBIOS}/os/hal/platforms/STM32F4xx \
               ${CHIBIOS}/os/hal/platforms/STM32 \
               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2 \
-              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2
\ No newline at end of file
+              ${CHIBIOS}/os/hal/platforms/STM32/RTCv2
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h
index c7f5c8a51..181a2547c 100644
--- a/os/hal/platforms/STM32F4xx/stm32_rcc.h
+++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h
@@ -502,6 +502,39 @@
 #define rccResetI2C3() rccResetAPB1(RCC_APB1RSTR_I2C3RST)
 /** @} */
 
+/**
+ * @name    SDIO peripheral specific RCC operations
+ * @{
+ */
+/**
+ * @brief   Enables the SDIO peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableSDIO(lp) rccEnableAPB2(RCC_APB2ENR_SDIOEN, lp)
+
+/**
+ * @brief   Disables the SDIO peripheral clock.
+ * @note    The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableSDIO(lp) rccDisableAPB2(RCC_APB2ENR_SDIOEN, lp)
+
+/**
+ * @brief   Resets the SDIO peripheral.
+ * @note    Not supported in this family, does nothing.
+ *
+ * @api
+ */
+#define rccResetSDIO() rccResetAPB2(RCC_APB2RSTR_SDIORST)
+/** @} */
+
 /**
  * @name    SPI peripherals specific RCC operations
  * @{
-- 
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