From 12ac530cd9d25dae33fac9afb62d73238bd7ad1d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 3 Dec 2013 14:22:47 +0000 Subject: Added SPI4/SPI5/SPI6 support to the STM32v1 SPIv1 low level driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6530 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F4xx/hal_lld.h | 41 +++++++++++-- os/hal/platforms/STM32F4xx/stm32_rcc.h | 105 +++++++++++++++++++++++++++++++++ 2 files changed, 140 insertions(+), 6 deletions(-) (limited to 'os/hal/platforms/STM32F4xx') diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index 83f2a5347..2a8e076eb 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -482,6 +482,35 @@ STM32_DMA_STREAM_ID_MSK(1, 7)) #define STM32_SPI3_TX_DMA_CHN 0x00000000 +#ifdef STM32F429_439xx +#define STM32_HAS_SPI4 TRUE +#define STM32_SPI4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) | \ + STM32_DMA_STREAM_ID_MSK(2, 3)) +#define STM32_SPI4_RX_DMA_CHN 0x00005004 +#define STM32_SPI4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 1) | \ + STM32_DMA_STREAM_ID_MSK(2, 4)) +#define STM32_SPI4_TX_DMA_CHN 0x00050040 + +#define STM32_HAS_SPI5 TRUE +#define STM32_SPI5_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3) | \ + STM32_DMA_STREAM_ID_MSK(2, 5)) +#define STM32_SPI5_RX_DMA_CHN 0x00702000 +#define STM32_SPI5_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 4) | \ + STM32_DMA_STREAM_ID_MSK(2, 6)) +#define STM32_SPI5_TX_DMA_CHN 0x07020000 + +#define STM32_HAS_SPI6 TRUE +#define STM32_SPI6_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 6)) +#define STM32_SPI6_RX_DMA_CHN 0x01000000 +#define STM32_SPI6_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5)) +#define STM32_SPI6_TX_DMA_CHN 0x00100000 + +#else +#define STM32_HAS_SPI4 FALSE +#define STM32_HAS_SPI5 FALSE +#define STM32_HAS_SPI6 FALSE +#endif /* STM32F429_439xx */ + /* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE @@ -640,13 +669,13 @@ #define I2C3_EV_IRQHandler Vector160 /**< I2C3 Event. */ #define I2C3_ER_IRQHandler Vector164 /**< I2C3 Error. */ #define OTG_HS_EP1_OUT_IRQHandler Vector168 /**< USB OTG HS End Point 1 Out.*/ -#define OTG_HS_EP1_IN_IRQHandler Vector16C /**< USB OTG HS End Point 1 In. */ +#define OTG_HS_EP1_IN_IRQHandler Vector16C /**< USB OTG HS End Point 1 In. */ #define OTG_HS_WKUP_IRQHandler Vector170 /**< USB OTG HS Wakeup through EXTI line. */ -#define OTG_HS_IRQHandler Vector174 /**< USB OTG HS. */ -#define DCMI_IRQHandler Vector178 /**< DCMI. */ -#define CRYP_IRQHandler Vector17C /**< CRYP. */ -#define HASH_RNG_IRQHandler Vector180 /**< Hash and Rng. */ +#define OTG_HS_IRQHandler Vector174 /**< USB OTG HS. */ +#define DCMI_IRQHandler Vector178 /**< DCMI. */ +#define CRYP_IRQHandler Vector17C /**< CRYP. */ +#define HASH_RNG_IRQHandler Vector180 /**< Hash and Rng. */ #if defined(STM32F4XX) || defined(__DOXYGEN__) #define FPU_IRQHandler Vector184 /**< Floating Point Unit. */ #endif @@ -1691,7 +1720,7 @@ typedef uint32_t halrtcnt_t; /* External declarations. */ /*===========================================================================*/ -/* STM32 ISR, DMA and RCC helpers.*/ +/* STM32 helpers and custom drivers.*/ #include "stm32_isr.h" #include "stm32_dma.h" #include "stm32_rcc.h" diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index c12988495..9178f67da 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -777,6 +777,81 @@ * @api */ #define rccResetSPI3() rccResetAPB1(RCC_APB1RSTR_SPI3RST) + +/** + * @brief Enables the SPI4 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableSPI4(lp) rccEnableAPB2(RCC_APB2ENR_SPI4EN, lp) + +/** + * @brief Disables the SPI4 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableSPI4(lp) rccDisableAPB2(RCC_APB2ENR_SPI4EN, lp) + +/** + * @brief Resets the SPI4 peripheral. + * + * @api + */ +#define rccResetSPI4() rccResetAPB2(RCC_APB2RSTR_SPI4RST) + +/** + * @brief Enables the SPI5 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableSPI5(lp) rccEnableAPB2(RCC_APB2ENR_SPI5EN, lp) + +/** + * @brief Disables the SPI5 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableSPI5(lp) rccDisableAPB2(RCC_APB2ENR_SPI5EN, lp) + +/** + * @brief Resets the SPI5 peripheral. + * + * @api + */ +#define rccResetSPI5() rccResetAPB2(RCC_APB2RSTR_SPI5RST) + +/** + * @brief Enables the SPI6 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableSPI6(lp) rccEnableAPB2(RCC_APB2ENR_SPI6EN, lp) + +/** + * @brief Disables the SPI6 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableSPI6(lp) rccDisableAPB2(RCC_APB2ENR_SPI6EN, lp) + +/** + * @brief Resets the SPI6 peripheral. + * + * @api + */ +#define rccResetSPI6() rccResetAPB2(RCC_APB2RSTR_SPI6RST) /** @} */ /** @@ -1261,6 +1336,36 @@ #define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST) /** @} */ +/** + * @name LTDC peripheral specific RCC operations + * @{ + */ +/** + * @brief Enables the LTDC peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableLTDC(lp) rccEnableAPB2(RCC_APB2ENR_LTDCEN, lp) + +/** + * @brief Disables the LTDC peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableLTDC(lp) rccDisableAPB2(RCC_APB2ENR_LTDCEN, lp) + +/** + * @brief Resets the LTDC peripheral. + * + * @api + */ +#define rccResetLTDC() rccResetAPB2(RCC_APB2RSTR_LTDCRST) +/** @} */ + /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ -- cgit v1.2.3