From f50d9fb0480b9ce521e80af21ffbff79e0ca5b44 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 18 Aug 2012 13:17:03 +0000 Subject: Added support for STM32 OTH_HS peripheral (not tested yet). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4578 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F2xx/stm32_rcc.h | 29 +++++++++++++++++++++++++++-- os/hal/platforms/STM32F2xx/stm32f2xx.h | 10 ++++++---- 2 files changed, 33 insertions(+), 6 deletions(-) (limited to 'os/hal/platforms/STM32F2xx') diff --git a/os/hal/platforms/STM32F2xx/stm32_rcc.h b/os/hal/platforms/STM32F2xx/stm32_rcc.h index 0bd3a6401..2b2051332 100644 --- a/os/hal/platforms/STM32F2xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F2xx/stm32_rcc.h @@ -603,7 +603,7 @@ * * @api */ -#define rccEnableOTG_FS(lp) rccEnableAHB2(RCC_AHB2LPENR_OTGFSLPEN, lp) +#define rccEnableOTG_FS(lp) rccEnableAHB2(RCC_AHB2ENR_OTGFSEN, lp) /** * @brief Disables the OTG_FS peripheral clock. @@ -612,7 +612,7 @@ * * @api */ -#define rccDisableOTG_FS(lp) rccEnableAHB2(RCC_AHB2LPENR_OTGFSLPEN, lp) +#define rccDisableOTG_FS(lp) rccEnableAHB2(RCC_AHB2ENR_OTGFSEN, lp) /** * @brief Resets the OTG_FS peripheral. @@ -620,6 +620,31 @@ * @api */ #define rccResetOTG_FS() rccResetAHB2(RCC_AHB2RSTR_OTGFSRST) + +/** + * @brief Enables the OTG_HS peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableOTG_HS(lp) rccEnableAHB1(RCC_AHB1ENR_OTGHSEN, lp) + +/** + * @brief Disables the OTG_HS peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableOTG_HS(lp) rccEnableAHB1(RCC_AHB1ENR_OTGHSEN, lp) + +/** + * @brief Resets the OTG_HS peripheral. + * + * @api + */ +#define rccResetOTG_HS() rccResetAHB1(RCC_AHB1RSTR_OTGHSRST) /** @} */ /** diff --git a/os/hal/platforms/STM32F2xx/stm32f2xx.h b/os/hal/platforms/STM32F2xx/stm32f2xx.h index 6409ba1bb..297e26997 100644 --- a/os/hal/platforms/STM32F2xx/stm32f2xx.h +++ b/os/hal/platforms/STM32F2xx/stm32f2xx.h @@ -12,15 +12,15 @@ * is using in the C source code, usually in main.c. This file contains: * - Configuration section that allows to select: * - The device used in the target application - * - To use or not the peripheral’s drivers in application code(i.e. - * code will be based on direct access to peripheral’s registers + * - To use or not the peripheral�s drivers in application code(i.e. + * code will be based on direct access to peripheral�s registers * rather than drivers API), this option is controlled by * "#define USE_STDPERIPH_DRIVER" * - To change few application-specific parameters such as the HSE * crystal frequency * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral�s registers hardware * ****************************************************************************** * @attention @@ -4897,7 +4897,9 @@ typedef struct #define RCC_AHB2RSTR_CRYPRST ((uint32_t)0x00000010) #define RCC_AHB2RSTR_HSAHRST ((uint32_t)0x00000020) #define RCC_AHB2RSTR_RNGRST ((uint32_t)0x00000040) -#define RCC_AHB2RSTR_OTGFSRST ((uint32_t)0x00000080) +/* CHIBIOS FIX */ +/*#define RCC_AHB1RSTR_OTGHRST ((uint32_t)0x10000000)*/ +#define RCC_AHB1RSTR_OTGHSRST ((uint32_t)0x10000000) /******************** Bit definition for RCC_AHB3RSTR register **************/ #define RCC_AHB3RSTR_FSMCRST ((uint32_t)0x00000001) -- cgit v1.2.3