From 7112dfa32e35f35998bf4ab05888317ef5aed59a Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Tue, 23 Oct 2012 20:51:36 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4777
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/STM32F0xx/hal_lld.c | 10 ++++++++++
 os/hal/platforms/STM32F0xx/hal_lld.h |  2 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

(limited to 'os/hal/platforms/STM32F0xx')

diff --git a/os/hal/platforms/STM32F0xx/hal_lld.c b/os/hal/platforms/STM32F0xx/hal_lld.c
index 401afe7e3..1e7a83e36 100644
--- a/os/hal/platforms/STM32F0xx/hal_lld.c
+++ b/os/hal/platforms/STM32F0xx/hal_lld.c
@@ -29,6 +29,10 @@
 #include "ch.h"
 #include "hal.h"
 
+/* TODO: LSEBYP like in F3.*/
+/* TODO: LSEDRV like in F3.*/
+/* TODO: PREDIV like in F3.*/
+
 /*===========================================================================*/
 /* Driver exported variables.                                                */
 /*===========================================================================*/
@@ -142,7 +146,13 @@ void stm32_clock_init(void) {
 
 #if STM32_HSE_ENABLED
   /* HSE activation.*/
+#if defined(STM32_HSE_BYPASS)
+  /* HSE Bypass.*/
+  RCC->CR |= RCC_CR_HSEON | RCC_CR_HSEBYP;
+#else
+  /* No HSE Bypass.*/
   RCC->CR |= RCC_CR_HSEON;
+#endif
   while (!(RCC->CR & RCC_CR_HSERDY))
     ;                                       /* Waits until HSE is stable.   */
 #endif
diff --git a/os/hal/platforms/STM32F0xx/hal_lld.h b/os/hal/platforms/STM32F0xx/hal_lld.h
index 4e64865ab..b8abe4bd5 100644
--- a/os/hal/platforms/STM32F0xx/hal_lld.h
+++ b/os/hal/platforms/STM32F0xx/hal_lld.h
@@ -792,7 +792,7 @@
 #elif (STM32_SW == STM32_SW_HSE)
 #define STM32_SYSCLK                STM32_HSECLK
 #else
-#error "invalid STM32_SYSCLK_SW value specified"
+#error "invalid STM32_SW value specified"
 #endif
 
 /* Check on the system clock.*/
-- 
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